Lines Matching refs:GET_BITFIELD
51 #define GET_BITFIELD(v, lo, hi) \ macro
75 #define DRAM_RULE_ENABLE(reg) GET_BITFIELD(reg, 0, 0)
76 #define A7MODE(reg) GET_BITFIELD(reg, 26, 26)
146 return GET_BITFIELD(reg, table[interleave].start, in sad_pkg()
161 #define GET_TOLM(reg) ((GET_BITFIELD(reg, 0, 3) << 28) | 0x3ffffff)
162 #define GET_TOHM(reg) ((GET_BITFIELD(reg, 0, 20) << 25) | 0x3ffffff)
168 #define SOURCE_ID(reg) GET_BITFIELD(reg, 9, 11)
170 #define SOURCE_ID_KNL(reg) GET_BITFIELD(reg, 12, 14)
183 #define TAD_LIMIT(reg) ((GET_BITFIELD(reg, 12, 31) << 26) | 0x3ffffff)
184 #define TAD_SOCK(reg) GET_BITFIELD(reg, 10, 11)
185 #define TAD_CH(reg) GET_BITFIELD(reg, 8, 9)
186 #define TAD_TGT3(reg) GET_BITFIELD(reg, 6, 7)
187 #define TAD_TGT2(reg) GET_BITFIELD(reg, 4, 5)
188 #define TAD_TGT1(reg) GET_BITFIELD(reg, 2, 3)
189 #define TAD_TGT0(reg) GET_BITFIELD(reg, 0, 1)
196 #define IS_ECC_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 2, 2)
197 #define IS_LOCKSTEP_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 1, 1)
198 #define IS_CLOSE_PG(mcmtr) GET_BITFIELD(mcmtr, 0, 0)
203 #define IS_MIRROR_ENABLED(reg) GET_BITFIELD(reg, 0, 0)
213 #define RANK_DISABLE(mtr) GET_BITFIELD(mtr, 16, 19)
214 #define IS_DIMM_PRESENT(mtr) GET_BITFIELD(mtr, 14, 14)
215 #define RANK_CNT_BITS(mtr) GET_BITFIELD(mtr, 12, 13)
216 #define RANK_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 2, 4)
217 #define COL_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 0, 1)
224 #define CHN_IDX_OFFSET(reg) GET_BITFIELD(reg, 28, 29)
225 #define TAD_OFFSET(reg) (GET_BITFIELD(reg, 6, 25) << 26)
232 #define IS_RIR_VALID(reg) GET_BITFIELD(reg, 31, 31)
233 #define RIR_WAY(reg) GET_BITFIELD(reg, 28, 29)
246 GET_BITFIELD(reg, 20, 23) : GET_BITFIELD(reg, 16, 19))
249 GET_BITFIELD(reg, 2, 15) : GET_BITFIELD(reg, 2, 14))
257 #define RANK_ODD_OV(reg) GET_BITFIELD(reg, 31, 31)
258 #define RANK_ODD_ERR_CNT(reg) GET_BITFIELD(reg, 16, 30)
259 #define RANK_EVEN_OV(reg) GET_BITFIELD(reg, 15, 15)
260 #define RANK_EVEN_ERR_CNT(reg) GET_BITFIELD(reg, 0, 14)
272 #define RANK_ODD_ERR_THRSLD(reg) GET_BITFIELD(reg, 16, 30)
273 #define RANK_EVEN_ERR_THRSLD(reg) GET_BITFIELD(reg, 0, 14)
831 return ((u64)GET_BITFIELD(reg, 1, 10) << 29) | 0x1fffffff; in rir_limit()
836 return (GET_BITFIELD(reg, 6, 25) << 26) | 0x3ffffff; in sad_limit()
841 return GET_BITFIELD(reg, 1, 1); in interleave_mode()
846 return GET_BITFIELD(reg, 2, 3); in dram_attr()
851 return (GET_BITFIELD(reg, 7, 26) << 26) | 0x3ffffff; in knl_sad_limit()
856 return GET_BITFIELD(reg, 1, 2); in knl_interleave_mode()
873 return GET_BITFIELD(reg, 3, 4); in dram_attr_knl()
885 if (GET_BITFIELD(reg, 11, 11)) in get_memory_type()
908 if (GET_BITFIELD(reg, 16, 16)) in haswell_get_memory_type()
912 if (GET_BITFIELD(reg, 14, 14)) { in haswell_get_memory_type()
965 return __ibridge_get_width(GET_BITFIELD(mtr, 7, 8)); in ibridge_get_width()
971 return __ibridge_get_width(GET_BITFIELD(mtr, 8, 9)); in broadwell_get_width()
984 return GET_BITFIELD(reg, 0, 2); in get_node_id()
992 return GET_BITFIELD(reg, 0, 3); in haswell_get_node_id()
1000 return GET_BITFIELD(reg, 0, 2); in knl_get_node_id()
1042 return (GET_BITFIELD(reg, 26, 31) << 26) | 0x3ffffff; in haswell_get_tolm()
1051 rc = GET_BITFIELD(reg, 26, 31); in haswell_get_tohm()
1063 return (GET_BITFIELD(reg, 26, 31) << 26) | 0x3ffffff; in knl_get_tolm()
1080 return (((u64)GET_BITFIELD(reg, 1, 11) + 1) << 29) - 1; in haswell_rir_limit()
1177 if (!GET_BITFIELD(reg_limit_lo, 0, 0)) in knl_get_tad()
1180 way_id = GET_BITFIELD(reg_limit_lo, 3, 5); in knl_get_tad()
1196 *offset = ((u64) GET_BITFIELD(reg_offset_lo, 6, 31) << 6) | in knl_get_tad()
1197 ((u64) GET_BITFIELD(reg_hi, 0, 15) << 32); in knl_get_tad()
1198 *limit = ((u64) GET_BITFIELD(reg_limit_lo, 6, 31) << 6) | 63 | in knl_get_tad()
1199 ((u64) GET_BITFIELD(reg_hi, 16, 31) << 32); in knl_get_tad()
1230 return GET_BITFIELD(reg, entry*3, (entry*3)+2); in knl_get_edc_route()
1256 mc = GET_BITFIELD(reg, entry*3, (entry*3)+2); in knl_get_mc_route()
1257 chan = GET_BITFIELD(reg, (entry*2) + 18, (entry*2) + 18 + 1); in knl_get_mc_route()
1298 #define KNL_EDRAM(reg) GET_BITFIELD(reg, 29, 29)
1301 #define KNL_CACHEABLE(reg) GET_BITFIELD(reg, 28, 28)
1304 #define KNL_EDRAM_ONLY(reg) GET_BITFIELD(reg, 29, 29)
1307 #define KNL_CACHEABLE(reg) GET_BITFIELD(reg, 28, 28)
1310 #define KNL_MOD3(reg) GET_BITFIELD(reg, 27, 27)
1707 pvt->is_chan_hash = GET_BITFIELD(reg, 21, 21); in get_dimm_config()
1708 if (GET_BITFIELD(reg, 28, 28)) { in get_dimm_config()
2038 bits = GET_BITFIELD(addr, 7, 8) << 1; in get_memory_error_data()
2039 bits |= GET_BITFIELD(addr, 9, 9); in get_memory_error_data()
2041 bits = GET_BITFIELD(addr, 6, 8); in get_memory_error_data()
2045 idx = GET_BITFIELD(addr, 16, 18); in get_memory_error_data()
2057 shiftup = GET_BITFIELD(reg, 22, 22); in get_memory_error_data()
2244 u32 reg, channel = GET_BITFIELD(m->status, 0, 3); in get_memory_error_data_from_mce()
2954 bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0); in sbridge_mce_output_error()
2955 bool overflow = GET_BITFIELD(m->status, 62, 62); in sbridge_mce_output_error()
2956 bool uncorrected_error = GET_BITFIELD(m->status, 61, 61); in sbridge_mce_output_error()
2958 u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52); in sbridge_mce_output_error()
2959 u32 mscod = GET_BITFIELD(m->status, 16, 31); in sbridge_mce_output_error()
2960 u32 errcode = GET_BITFIELD(m->status, 0, 15); in sbridge_mce_output_error()
2961 u32 channel = GET_BITFIELD(m->status, 0, 3); in sbridge_mce_output_error()
2962 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in sbridge_mce_output_error()
2968 u32 lsb = GET_BITFIELD(m->misc, 0, 5); in sbridge_mce_output_error()
2977 recoverable = GET_BITFIELD(m->status, 56, 56); in sbridge_mce_output_error()
3147 if (!GET_BITFIELD(mce->status, 58, 58)) in sbridge_mce_check_error()
3151 if (!GET_BITFIELD(mce->status, 59, 59)) in sbridge_mce_check_error()
3155 if (GET_BITFIELD(mce->misc, 6, 8) != 2) in sbridge_mce_check_error()