Lines Matching refs:writew_relaxed
59 writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR); in zx_direction_input()
78 writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR); in zx_direction_output()
81 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1); in zx_direction_output()
83 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0); in zx_direction_output()
101 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1); in zx_set_value()
103 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0); in zx_set_value()
147 writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE); in zx_irq_type()
148 writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP); in zx_irq_type()
149 writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN); in zx_irq_type()
150 writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV); in zx_irq_type()
167 writew_relaxed(pending, chip->base + ZX_GPIO_IC); in zx_irq_handler()
186 writew_relaxed(gpioie, chip->base + ZX_GPIO_IM); in zx_irq_mask()
188 writew_relaxed(gpioie, chip->base + ZX_GPIO_IE); in zx_irq_mask()
201 writew_relaxed(gpioie, chip->base + ZX_GPIO_IM); in zx_irq_unmask()
203 writew_relaxed(gpioie, chip->base + ZX_GPIO_IE); in zx_irq_unmask()
247 writew_relaxed(0xffff, chip->base + ZX_GPIO_IM); in zx_gpio_probe()
248 writew_relaxed(0, chip->base + ZX_GPIO_IE); in zx_gpio_probe()