Lines Matching refs:u8
15 u8 signature[20]; /**< Always starts with 'VBT$' */
19 u8 vbt_checksum;
20 u8 reserved0;
27 u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
35 u8 type; /* 0 == desktop, 1 == mobile */
36 u8 relstage;
37 u8 chipset;
38 u8 lvds_present:1;
39 u8 tv_present:1;
40 u8 rsvd2:6; /* finish byte */
41 u8 rsvd3[4];
42 u8 signon[155];
43 u8 copyright[61];
45 u8 dos_boot_mode;
46 u8 bandwidth_percent;
47 u8 rsvd4; /* popup memory size */
48 u8 resize_pci_bios;
49 u8 rsvd5; /* is crt already on ddc2 */
93 u8 panel_fitting:2;
94 u8 flexaim:1;
95 u8 msg_enable:1;
96 u8 clear_screen:3;
97 u8 color_flip:1;
100 u8 download_ext_vbt:1;
101 u8 enable_ssc:1;
102 u8 ssc_freq:1;
103 u8 enable_lfp_on_override:1;
104 u8 disable_ssc_ddt:1;
105 u8 rsvd8:3; /* finish byte */
108 u8 disable_smooth_vision:1;
109 u8 single_dvi:1;
110 u8 rsvd9:6; /* finish byte */
113 u8 legacy_monitor_detect;
116 u8 int_crt_support:1;
117 u8 int_tv_support:1;
118 u8 int_efp_support:1;
119 u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
120 u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
121 u8 rsvd11:3; /* finish byte */
185 u8 device_id[10]; /* ascii string */
187 u8 dvo_port; /* See Device_PORT_* above */
188 u8 i2c_pin;
189 u8 slave_addr;
190 u8 ddc_pin;
192 u8 dvo_cfg; /* See DEVICE_CFG_* above */
193 u8 dvo2_port;
194 u8 i2c2_pin;
195 u8 slave2_addr;
196 u8 ddc2_pin;
197 u8 capabilities;
198 u8 dvo_wiring;/* See DEVICE_WIRE_* above */
199 u8 dvo2_wiring;
201 u8 dvo_function;
207 u8 crt_ddc_gmbus_pin;
210 u8 dpms_acpi:1;
211 u8 skip_boot_crt_detect:1;
212 u8 dpms_aim:1;
213 u8 rsvd1:5; /* finish byte */
216 u8 boot_display[2];
217 u8 child_dev_size;
234 u8 panel_type;
235 u8 rsvd1;
237 u8 pfit_mode:2;
238 u8 pfit_text_mode_enhanced:1;
239 u8 pfit_gfx_mode_enhanced:1;
240 u8 pfit_ratio_auto:1;
241 u8 pixel_dither:1;
242 u8 lvds_edid:1;
243 u8 rsvd2:1;
244 u8 rsvd4;
248 u8 type:2;
249 u8 pol:1;
250 u8 gpio:3;
251 u8 gmbus:2;
253 u8 minbrightness;
254 u8 i2caddr;
255 u8 brightnesscmd;
262 u8 fp_table_size;
264 u8 dvo_table_size;
266 u8 pnp_table_size;
270 u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
293 u8 hactive_lo;
294 u8 hblank_lo;
295 u8 hblank_hi:4;
296 u8 hactive_hi:4;
297 u8 vactive_lo;
298 u8 vblank_lo;
299 u8 vblank_hi:4;
300 u8 vactive_hi:4;
301 u8 hsync_off_lo;
302 u8 hsync_pulse_width;
303 u8 vsync_pulse_width:4;
304 u8 vsync_off:4;
305 u8 rsvd0:6;
306 u8 hsync_off_hi:2;
307 u8 h_image;
308 u8 v_image;
309 u8 max_hv;
310 u8 h_border;
311 u8 v_border;
312 u8 rsvd1:3;
313 u8 digital:2;
314 u8 vsync_positive:1;
315 u8 hsync_positive:1;
316 u8 rsvd2:1;
323 u8 mfg_week;
324 u8 mfg_year;
346 u8 aimdb_id;
352 u8 fp_timing_size;
354 u8 dvo_timing_size;
356 u8 text_fitting_size;
358 u8 graphics_fitting_size;
367 u8 panel_backlight;
368 u8 h40_set_panel_type;
369 u8 panel_type;
370 u8 ssc_clk_freq;
373 u8 sclalarcoeff_tab_row_num;
374 u8 sclalarcoeff_tab_row_size;
375 u8 coefficient[8];
376 u8 panel_misc_bits_1;
377 u8 panel_misc_bits_2;
378 u8 panel_misc_bits_3;
379 u8 panel_misc_bits_4;
388 u8 boot_dev_algorithm:1;
389 u8 block_display_switch:1;
390 u8 allow_display_switch:1;
391 u8 hotplug_dvo:1;
392 u8 dual_view_zoom:1;
393 u8 int15h_hook:1;
394 u8 sprite_in_clone:1;
395 u8 primary_lfp_id:1;
399 u8 boot_mode_bpp;
400 u8 boot_mode_refresh;
417 u8 static_display:1;
418 u8 reserved2:7;
421 u8 legacy_crt_max_refresh;
423 u8 hdmi_termination;
424 u8 custom_vbt_version;
453 u8 rate:4;
454 u8 lanes:4;
455 u8 preemphasis:4;
456 u8 vswing:4;