844 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val)  in A4XX_CGC_HLSQ_EARLY_CYC()  argument
846 	return ((val) << A4XX_CGC_HLSQ_EARLY_CYC__SHIFT) & A4XX_CGC_HLSQ_EARLY_CYC__MASK;  in A4XX_CGC_HLSQ_EARLY_CYC()
901 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()  argument
903 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_WID…  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
907 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()  argument
909 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_HE…  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
923 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val)  in A4XX_RB_MODE_CONTROL_WIDTH()  argument
925 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_WIDTH__SHIFT) & A4XX_RB_MODE_CONTROL_WIDTH__MASK;  in A4XX_RB_MODE_CONTROL_WIDTH()
929 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val)  in A4XX_RB_MODE_CONTROL_HEIGHT()  argument
931 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT) & A4XX_RB_MODE_CONTROL_HEIGHT__MASK;  in A4XX_RB_MODE_CONTROL_HEIGHT()
943 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val)  in A4XX_RB_MSAA_CONTROL_SAMPLES()  argument
945 	return ((val) << A4XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) & A4XX_RB_MSAA_CONTROL_SAMPLES__MASK;  in A4XX_RB_MSAA_CONTROL_SAMPLES()
951 static inline uint32_t A4XX_RB_RENDER_CONTROL2_COORD_MASK(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_COORD_MASK()  argument
953 …return ((val) << A4XX_RB_RENDER_CONTROL2_COORD_MASK__SHIFT) & A4XX_RB_RENDER_CONTROL2_COORD_MASK__…  in A4XX_RB_RENDER_CONTROL2_COORD_MASK()
960 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()  argument
962 …return ((val) << A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__SHIFT) & A4XX_RB_RENDER_CONTROL2_MSAA_SAMPL…  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
979 static inline uint32_t A4XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)  in A4XX_RB_MRT_CONTROL_ROP_CODE()  argument
981 	return ((val) << A4XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A4XX_RB_MRT_CONTROL_ROP_CODE__MASK;  in A4XX_RB_MRT_CONTROL_ROP_CODE()
985 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
987 …return ((val) << A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A4XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
993 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
995 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
999 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a4xx_tile_mode val)  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
1001 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
1005 static inline uint32_t A4XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
1007 	return ((val) << A4XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()
1011 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
1013 	return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()
1018 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()  argument
1020 …return ((val >> 4) << A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_BU…  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
1028 static inline uint32_t A4XX_RB_MRT_CONTROL3_STRIDE(uint32_t val)  in A4XX_RB_MRT_CONTROL3_STRIDE()  argument
1030 	return ((val) << A4XX_RB_MRT_CONTROL3_STRIDE__SHIFT) & A4XX_RB_MRT_CONTROL3_STRIDE__MASK;  in A4XX_RB_MRT_CONTROL3_STRIDE()
1036 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
1038 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB_…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
1042 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
1044 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RG…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
1048 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
1050 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
1054 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
1056 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_AL…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
1060 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
1062 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
1066 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
1068 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_A…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
1074 static inline uint32_t A4XX_RB_BLEND_RED_UINT(uint32_t val)  in A4XX_RB_BLEND_RED_UINT()  argument
1076 	return ((val) << A4XX_RB_BLEND_RED_UINT__SHIFT) & A4XX_RB_BLEND_RED_UINT__MASK;  in A4XX_RB_BLEND_RED_UINT()
1080 static inline uint32_t A4XX_RB_BLEND_RED_SINT(uint32_t val)  in A4XX_RB_BLEND_RED_SINT()  argument
1082 	return ((val) << A4XX_RB_BLEND_RED_SINT__SHIFT) & A4XX_RB_BLEND_RED_SINT__MASK;  in A4XX_RB_BLEND_RED_SINT()
1086 static inline uint32_t A4XX_RB_BLEND_RED_FLOAT(float val)  in A4XX_RB_BLEND_RED_FLOAT()  argument
1088 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_RED_FLOAT__SHIFT) & A4XX_RB_BLEND_RED_FLOAT__MA…  in A4XX_RB_BLEND_RED_FLOAT()
1094 static inline uint32_t A4XX_RB_BLEND_RED_F32(float val)  in A4XX_RB_BLEND_RED_F32()  argument
1096 	return ((fui(val)) << A4XX_RB_BLEND_RED_F32__SHIFT) & A4XX_RB_BLEND_RED_F32__MASK;  in A4XX_RB_BLEND_RED_F32()
1102 static inline uint32_t A4XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_UINT()  argument
1104 	return ((val) << A4XX_RB_BLEND_GREEN_UINT__SHIFT) & A4XX_RB_BLEND_GREEN_UINT__MASK;  in A4XX_RB_BLEND_GREEN_UINT()
1108 static inline uint32_t A4XX_RB_BLEND_GREEN_SINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_SINT()  argument
1110 	return ((val) << A4XX_RB_BLEND_GREEN_SINT__SHIFT) & A4XX_RB_BLEND_GREEN_SINT__MASK;  in A4XX_RB_BLEND_GREEN_SINT()
1114 static inline uint32_t A4XX_RB_BLEND_GREEN_FLOAT(float val)  in A4XX_RB_BLEND_GREEN_FLOAT()  argument
1116 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A4XX_RB_BLEND_GREEN_FLOAT…  in A4XX_RB_BLEND_GREEN_FLOAT()
1122 static inline uint32_t A4XX_RB_BLEND_GREEN_F32(float val)  in A4XX_RB_BLEND_GREEN_F32()  argument
1124 	return ((fui(val)) << A4XX_RB_BLEND_GREEN_F32__SHIFT) & A4XX_RB_BLEND_GREEN_F32__MASK;  in A4XX_RB_BLEND_GREEN_F32()
1130 static inline uint32_t A4XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_UINT()  argument
1132 	return ((val) << A4XX_RB_BLEND_BLUE_UINT__SHIFT) & A4XX_RB_BLEND_BLUE_UINT__MASK;  in A4XX_RB_BLEND_BLUE_UINT()
1136 static inline uint32_t A4XX_RB_BLEND_BLUE_SINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_SINT()  argument
1138 	return ((val) << A4XX_RB_BLEND_BLUE_SINT__SHIFT) & A4XX_RB_BLEND_BLUE_SINT__MASK;  in A4XX_RB_BLEND_BLUE_SINT()
1142 static inline uint32_t A4XX_RB_BLEND_BLUE_FLOAT(float val)  in A4XX_RB_BLEND_BLUE_FLOAT()  argument
1144 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A4XX_RB_BLEND_BLUE_FLOAT__…  in A4XX_RB_BLEND_BLUE_FLOAT()
1150 static inline uint32_t A4XX_RB_BLEND_BLUE_F32(float val)  in A4XX_RB_BLEND_BLUE_F32()  argument
1152 	return ((fui(val)) << A4XX_RB_BLEND_BLUE_F32__SHIFT) & A4XX_RB_BLEND_BLUE_F32__MASK;  in A4XX_RB_BLEND_BLUE_F32()
1158 static inline uint32_t A4XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_UINT()  argument
1160 	return ((val) << A4XX_RB_BLEND_ALPHA_UINT__SHIFT) & A4XX_RB_BLEND_ALPHA_UINT__MASK;  in A4XX_RB_BLEND_ALPHA_UINT()
1164 static inline uint32_t A4XX_RB_BLEND_ALPHA_SINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_SINT()  argument
1166 	return ((val) << A4XX_RB_BLEND_ALPHA_SINT__SHIFT) & A4XX_RB_BLEND_ALPHA_SINT__MASK;  in A4XX_RB_BLEND_ALPHA_SINT()
1170 static inline uint32_t A4XX_RB_BLEND_ALPHA_FLOAT(float val)  in A4XX_RB_BLEND_ALPHA_FLOAT()  argument
1172 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A4XX_RB_BLEND_ALPHA_FLOAT…  in A4XX_RB_BLEND_ALPHA_FLOAT()
1178 static inline uint32_t A4XX_RB_BLEND_ALPHA_F32(float val)  in A4XX_RB_BLEND_ALPHA_F32()  argument
1180 	return ((fui(val)) << A4XX_RB_BLEND_ALPHA_F32__SHIFT) & A4XX_RB_BLEND_ALPHA_F32__MASK;  in A4XX_RB_BLEND_ALPHA_F32()
1186 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
1188 	return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()
1193 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
1195 …return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
1201 static inline uint32_t A4XX_RB_FS_OUTPUT_ENABLE_BLEND(uint32_t val)  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()  argument
1203 	return ((val) << A4XX_RB_FS_OUTPUT_ENABLE_BLEND__SHIFT) & A4XX_RB_FS_OUTPUT_ENABLE_BLEND__MASK;  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()
1208 static inline uint32_t A4XX_RB_FS_OUTPUT_SAMPLE_MASK(uint32_t val)  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()  argument
1210 	return ((val) << A4XX_RB_FS_OUTPUT_SAMPLE_MASK__SHIFT) & A4XX_RB_FS_OUTPUT_SAMPLE_MASK__MASK;  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()
1217 static inline uint32_t A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR(uint32_t val)  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()  argument
1219 …return ((val >> 2) << A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT) & A4XX_RB_SAMPLE_COUNT_CONTROL_ADD…  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()
1225 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT0()  argument
1227 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT0()
1231 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT1()  argument
1233 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT1()
1237 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT2()  argument
1239 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT2()
1243 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT3()  argument
1245 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT3()
1249 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT4()  argument
1251 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT4()
1255 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT5()  argument
1257 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT5()
1261 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT6()  argument
1263 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT6()
1267 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT7()  argument
1269 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT7()
1275 static inline uint32_t A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()  argument
1277 …return ((val) << A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) & A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__MA…  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()
1281 static inline uint32_t A4XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)  in A4XX_RB_COPY_CONTROL_MODE()  argument
1283 	return ((val) << A4XX_RB_COPY_CONTROL_MODE__SHIFT) & A4XX_RB_COPY_CONTROL_MODE__MASK;  in A4XX_RB_COPY_CONTROL_MODE()
1287 static inline uint32_t A4XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)  in A4XX_RB_COPY_CONTROL_FASTCLEAR()  argument
1289 	return ((val) << A4XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A4XX_RB_COPY_CONTROL_FASTCLEAR__MASK;  in A4XX_RB_COPY_CONTROL_FASTCLEAR()
1293 static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)  in A4XX_RB_COPY_CONTROL_GMEM_BASE()  argument
1295 …return ((val >> 14) << A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A4XX_RB_COPY_CONTROL_GMEM_BASE__MA…  in A4XX_RB_COPY_CONTROL_GMEM_BASE()
1301 static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val)  in A4XX_RB_COPY_DEST_BASE_BASE()  argument
1303 	return ((val >> 5) << A4XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A4XX_RB_COPY_DEST_BASE_BASE__MASK;  in A4XX_RB_COPY_DEST_BASE_BASE()
1309 static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)  in A4XX_RB_COPY_DEST_PITCH_PITCH()  argument
1311 	return ((val >> 5) << A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A4XX_RB_COPY_DEST_PITCH_PITCH__MASK;  in A4XX_RB_COPY_DEST_PITCH_PITCH()
1317 static inline uint32_t A4XX_RB_COPY_DEST_INFO_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_COPY_DEST_INFO_FORMAT()  argument
1319 	return ((val) << A4XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A4XX_RB_COPY_DEST_INFO_FORMAT__MASK;  in A4XX_RB_COPY_DEST_INFO_FORMAT()
1323 static inline uint32_t A4XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)  in A4XX_RB_COPY_DEST_INFO_SWAP()  argument
1325 	return ((val) << A4XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A4XX_RB_COPY_DEST_INFO_SWAP__MASK;  in A4XX_RB_COPY_DEST_INFO_SWAP()
1329 static inline uint32_t A4XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()  argument
1331 …return ((val) << A4XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A4XX_RB_COPY_DEST_INFO_DITHER_MODE__…  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()
1335 static inline uint32_t A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()  argument
1337 …return ((val) << A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) & A4XX_RB_COPY_DEST_INFO_COMPONEN…  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
1341 static inline uint32_t A4XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)  in A4XX_RB_COPY_DEST_INFO_ENDIAN()  argument
1343 	return ((val) << A4XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) & A4XX_RB_COPY_DEST_INFO_ENDIAN__MASK;  in A4XX_RB_COPY_DEST_INFO_ENDIAN()
1347 static inline uint32_t A4XX_RB_COPY_DEST_INFO_TILE(enum a4xx_tile_mode val)  in A4XX_RB_COPY_DEST_INFO_TILE()  argument
1349 	return ((val) << A4XX_RB_COPY_DEST_INFO_TILE__SHIFT) & A4XX_RB_COPY_DEST_INFO_TILE__MASK;  in A4XX_RB_COPY_DEST_INFO_TILE()
1355 static inline uint32_t A4XX_RB_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_RB_FS_OUTPUT_REG_MRT()  argument
1357 	return ((val) << A4XX_RB_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_RB_FS_OUTPUT_REG_MRT__MASK;  in A4XX_RB_FS_OUTPUT_REG_MRT()
1367 static inline uint32_t A4XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)  in A4XX_RB_DEPTH_CONTROL_ZFUNC()  argument
1369 	return ((val) << A4XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A4XX_RB_DEPTH_CONTROL_ZFUNC__MASK;  in A4XX_RB_DEPTH_CONTROL_ZFUNC()
1381 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum a4xx_depth_format val)  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()  argument
1383 	return ((val) << A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()
1387 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()  argument
1389 	return ((val >> 12) << A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()
1395 static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val)  in A4XX_RB_DEPTH_PITCH()  argument
1397 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH__SHIFT) & A4XX_RB_DEPTH_PITCH__MASK;  in A4XX_RB_DEPTH_PITCH()
1403 static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val)  in A4XX_RB_DEPTH_PITCH2()  argument
1405 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH2__SHIFT) & A4XX_RB_DEPTH_PITCH2__MASK;  in A4XX_RB_DEPTH_PITCH2()
1414 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC()  argument
1416 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC()
1420 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL()  argument
1422 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL()
1426 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS()  argument
1428 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS()
1432 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL()  argument
1434 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL()
1438 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
1440 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()
1444 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
1446 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()
1450 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
1452 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()
1456 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
1458 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()
1468 static inline uint32_t A4XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val)  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()  argument
1470 …return ((val >> 12) << A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A4XX_RB_STENCIL_INFO_STENCIL_BA…  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()
1476 static inline uint32_t A4XX_RB_STENCIL_PITCH(uint32_t val)  in A4XX_RB_STENCIL_PITCH()  argument
1478 	return ((val >> 5) << A4XX_RB_STENCIL_PITCH__SHIFT) & A4XX_RB_STENCIL_PITCH__MASK;  in A4XX_RB_STENCIL_PITCH()
1484 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILREF()  argument
1486 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILREF__MA…  in A4XX_RB_STENCILREFMASK_STENCILREF()
1490 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILMASK()  argument
1492 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILMASK__…  in A4XX_RB_STENCILREFMASK_STENCILMASK()
1496 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
1498 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILW…  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()
1504 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
1506 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCILR…  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()
1510 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
1512 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCIL…  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()
1516 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
1518 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_ST…  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
1525 static inline uint32_t A4XX_RB_BIN_OFFSET_X(uint32_t val)  in A4XX_RB_BIN_OFFSET_X()  argument
1527 	return ((val) << A4XX_RB_BIN_OFFSET_X__SHIFT) & A4XX_RB_BIN_OFFSET_X__MASK;  in A4XX_RB_BIN_OFFSET_X()
1531 static inline uint32_t A4XX_RB_BIN_OFFSET_Y(uint32_t val)  in A4XX_RB_BIN_OFFSET_Y()  argument
1533 	return ((val) << A4XX_RB_BIN_OFFSET_Y__SHIFT) & A4XX_RB_BIN_OFFSET_Y__MASK;  in A4XX_RB_BIN_OFFSET_Y()
2199 static inline uint32_t A4XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)  in A4XX_CP_PROTECT_REG_BASE_ADDR()  argument
2201 	return ((val) << A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A4XX_CP_PROTECT_REG_BASE_ADDR__MASK;  in A4XX_CP_PROTECT_REG_BASE_ADDR()
2205 static inline uint32_t A4XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)  in A4XX_CP_PROTECT_REG_MASK_LEN()  argument
2207 	return ((val) << A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A4XX_CP_PROTECT_REG_MASK_LEN__MASK;  in A4XX_CP_PROTECT_REG_MASK_LEN()
2211 static inline uint32_t A4XX_CP_PROTECT_REG_TRAP_WRITE(uint32_t val)  in A4XX_CP_PROTECT_REG_TRAP_WRITE()  argument
2213 	return ((val) << A4XX_CP_PROTECT_REG_TRAP_WRITE__SHIFT) & A4XX_CP_PROTECT_REG_TRAP_WRITE__MASK;  in A4XX_CP_PROTECT_REG_TRAP_WRITE()
2217 static inline uint32_t A4XX_CP_PROTECT_REG_TRAP_READ(uint32_t val)  in A4XX_CP_PROTECT_REG_TRAP_READ()  argument
2219 	return ((val) << A4XX_CP_PROTECT_REG_TRAP_READ__SHIFT) & A4XX_CP_PROTECT_REG_TRAP_READ__MASK;  in A4XX_CP_PROTECT_REG_TRAP_READ()
2299 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_VS_CTRL_REG0_THREADMODE()  argument
2301 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADMODE()
2307 static inline uint32_t A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2309 …return ((val) << A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
2313 static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2315 …return ((val) << A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
2319 static inline uint32_t A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()  argument
2321 …return ((val) << A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_VS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()
2325 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
2327 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()
2335 static inline uint32_t A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()  argument
2337 	return ((val) << A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()
2341 static inline uint32_t A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()  argument
2343 …return ((val) << A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A4XX_SP_VS_CTRL_REG1_INITIALOUT…  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
2349 static inline uint32_t A4XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_POSREGID()  argument
2351 	return ((val) << A4XX_SP_VS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_VS_PARAM_REG_POSREGID()
2355 static inline uint32_t A4XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()  argument
2357 	return ((val) << A4XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_PSIZEREGID__MASK;  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()
2361 static inline uint32_t A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()  argument
2363 …return ((val) << A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) & A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__…  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
2371 static inline uint32_t A4XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_REGID()  argument
2373 	return ((val) << A4XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_A_REGID__MASK;  in A4XX_SP_VS_OUT_REG_A_REGID()
2377 static inline uint32_t A4XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_COMPMASK()  argument
2379 	return ((val) << A4XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_A_COMPMASK()
2383 static inline uint32_t A4XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_REGID()  argument
2385 	return ((val) << A4XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_B_REGID__MASK;  in A4XX_SP_VS_OUT_REG_B_REGID()
2389 static inline uint32_t A4XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_COMPMASK()  argument
2391 	return ((val) << A4XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_B_COMPMASK()
2399 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
2401 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()
2405 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
2407 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()
2411 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
2413 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()
2417 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
2419 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()
2425 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2427 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_C…  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2431 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2433 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2447 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_FS_CTRL_REG0_THREADMODE()  argument
2449 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADMODE()
2455 static inline uint32_t A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2457 …return ((val) << A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
2461 static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2463 …return ((val) << A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
2467 static inline uint32_t A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()  argument
2469 …return ((val) << A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_FS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()
2473 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
2475 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()
2483 static inline uint32_t A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()  argument
2485 	return ((val) << A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()
2494 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2496 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_C…  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2500 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2502 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2516 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_MRT()  argument
2518 	return ((val) << A4XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_SP_FS_OUTPUT_REG_MRT__MASK;  in A4XX_SP_FS_OUTPUT_REG_MRT()
2523 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()  argument
2525 …return ((val) << A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MA…  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
2529 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()  argument
2531 …return ((val) << A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK…  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()
2539 static inline uint32_t A4XX_SP_FS_MRT_REG_REGID(uint32_t val)  in A4XX_SP_FS_MRT_REG_REGID()  argument
2541 	return ((val) << A4XX_SP_FS_MRT_REG_REGID__SHIFT) & A4XX_SP_FS_MRT_REG_REGID__MASK;  in A4XX_SP_FS_MRT_REG_REGID()
2546 static inline uint32_t A4XX_SP_FS_MRT_REG_MRTFORMAT(enum a4xx_color_fmt val)  in A4XX_SP_FS_MRT_REG_MRTFORMAT()  argument
2548 	return ((val) << A4XX_SP_FS_MRT_REG_MRTFORMAT__SHIFT) & A4XX_SP_FS_MRT_REG_MRTFORMAT__MASK;  in A4XX_SP_FS_MRT_REG_MRTFORMAT()
2569 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2571 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_C…  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2575 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2577 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2591 static inline uint32_t A4XX_SP_DS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_DS_PARAM_REG_POSREGID()  argument
2593 	return ((val) << A4XX_SP_DS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_DS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_DS_PARAM_REG_POSREGID()
2597 static inline uint32_t A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()  argument
2599 …return ((val) << A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()
2607 static inline uint32_t A4XX_SP_DS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_REGID()  argument
2609 	return ((val) << A4XX_SP_DS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_A_REGID__MASK;  in A4XX_SP_DS_OUT_REG_A_REGID()
2613 static inline uint32_t A4XX_SP_DS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_COMPMASK()  argument
2615 	return ((val) << A4XX_SP_DS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_A_COMPMASK()
2619 static inline uint32_t A4XX_SP_DS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_REGID()  argument
2621 	return ((val) << A4XX_SP_DS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_B_REGID__MASK;  in A4XX_SP_DS_OUT_REG_B_REGID()
2625 static inline uint32_t A4XX_SP_DS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_COMPMASK()  argument
2627 	return ((val) << A4XX_SP_DS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_B_COMPMASK()
2635 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()  argument
2637 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()
2641 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()  argument
2643 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()
2647 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()  argument
2649 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()
2653 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()  argument
2655 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()
2661 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2663 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_C…  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2667 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2669 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2683 static inline uint32_t A4XX_SP_GS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_POSREGID()  argument
2685 	return ((val) << A4XX_SP_GS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_GS_PARAM_REG_POSREGID()
2689 static inline uint32_t A4XX_SP_GS_PARAM_REG_PRIMREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_PRIMREGID()  argument
2691 	return ((val) << A4XX_SP_GS_PARAM_REG_PRIMREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_PRIMREGID__MASK;  in A4XX_SP_GS_PARAM_REG_PRIMREGID()
2695 static inline uint32_t A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()  argument
2697 …return ((val) << A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()
2705 static inline uint32_t A4XX_SP_GS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_REGID()  argument
2707 	return ((val) << A4XX_SP_GS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_A_REGID__MASK;  in A4XX_SP_GS_OUT_REG_A_REGID()
2711 static inline uint32_t A4XX_SP_GS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_COMPMASK()  argument
2713 	return ((val) << A4XX_SP_GS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_A_COMPMASK()
2717 static inline uint32_t A4XX_SP_GS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_REGID()  argument
2719 	return ((val) << A4XX_SP_GS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_B_REGID__MASK;  in A4XX_SP_GS_OUT_REG_B_REGID()
2723 static inline uint32_t A4XX_SP_GS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_COMPMASK()  argument
2725 	return ((val) << A4XX_SP_GS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_B_COMPMASK()
2733 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()  argument
2735 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()
2739 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()  argument
2741 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()
2745 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()  argument
2747 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()
2751 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()  argument
2753 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()
2759 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2761 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_C…  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2765 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2767 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2795 static inline uint32_t A4XX_VPC_ATTR_TOTALATTR(uint32_t val)  in A4XX_VPC_ATTR_TOTALATTR()  argument
2797 	return ((val) << A4XX_VPC_ATTR_TOTALATTR__SHIFT) & A4XX_VPC_ATTR_TOTALATTR__MASK;  in A4XX_VPC_ATTR_TOTALATTR()
2802 static inline uint32_t A4XX_VPC_ATTR_THRDASSIGN(uint32_t val)  in A4XX_VPC_ATTR_THRDASSIGN()  argument
2804 	return ((val) << A4XX_VPC_ATTR_THRDASSIGN__SHIFT) & A4XX_VPC_ATTR_THRDASSIGN__MASK;  in A4XX_VPC_ATTR_THRDASSIGN()
2811 static inline uint32_t A4XX_VPC_PACK_NUMBYPASSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMBYPASSVAR()  argument
2813 	return ((val) << A4XX_VPC_PACK_NUMBYPASSVAR__SHIFT) & A4XX_VPC_PACK_NUMBYPASSVAR__MASK;  in A4XX_VPC_PACK_NUMBYPASSVAR()
2817 static inline uint32_t A4XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMFPNONPOSVAR()  argument
2819 	return ((val) << A4XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) & A4XX_VPC_PACK_NUMFPNONPOSVAR__MASK;  in A4XX_VPC_PACK_NUMFPNONPOSVAR()
2823 static inline uint32_t A4XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMNONPOSVSVAR()  argument
2825 	return ((val) << A4XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) & A4XX_VPC_PACK_NUMNONPOSVSVAR__MASK;  in A4XX_VPC_PACK_NUMNONPOSVSVAR()
2841 static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A4XX_VSC_BIN_SIZE_WIDTH()  argument
2843 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A4XX_VSC_BIN_SIZE_WIDTH__MASK;  in A4XX_VSC_BIN_SIZE_WIDTH()
2847 static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A4XX_VSC_BIN_SIZE_HEIGHT()  argument
2849 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A4XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A4XX_VSC_BIN_SIZE_HEIGHT()
2863 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_X()  argument
2865 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_X()
2869 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_Y()  argument
2871 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_Y()
2875 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_W()  argument
2877 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_W()
2881 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_H()  argument
2883 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_H()
2925 static inline uint32_t A4XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()  argument
2927 	return ((val) << A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) & A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK;  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()
2931 static inline uint32_t A4XX_VFD_CONTROL_0_BYPASSATTROVS(uint32_t val)  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()  argument
2933 	return ((val) << A4XX_VFD_CONTROL_0_BYPASSATTROVS__SHIFT) & A4XX_VFD_CONTROL_0_BYPASSATTROVS__MASK;  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()
2937 static inline uint32_t A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()  argument
2939 …return ((val) << A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__…  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()
2943 static inline uint32_t A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()  argument
2945 …return ((val) << A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMFETCHINSTRC…  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
2951 static inline uint32_t A4XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)  in A4XX_VFD_CONTROL_1_MAXSTORAGE()  argument
2953 	return ((val) << A4XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) & A4XX_VFD_CONTROL_1_MAXSTORAGE__MASK;  in A4XX_VFD_CONTROL_1_MAXSTORAGE()
2957 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4VTX()  argument
2959 	return ((val) << A4XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A4XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A4XX_VFD_CONTROL_1_REGID4VTX()
2963 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4INST()  argument
2965 	return ((val) << A4XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A4XX_VFD_CONTROL_1_REGID4INST__MASK;  in A4XX_VFD_CONTROL_1_REGID4INST()
2973 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_VTXCNT(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()  argument
2975 	return ((val) << A4XX_VFD_CONTROL_3_REGID_VTXCNT__SHIFT) & A4XX_VFD_CONTROL_3_REGID_VTXCNT__MASK;  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()
2979 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSX()  argument
2981 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSX()
2985 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSY()  argument
2987 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSY()
2999 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()  argument
3001 	return ((val) << A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK;  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()
3005 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()  argument
3007 	return ((val) << A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK;  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
3017 static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_2_SIZE()  argument
3019 	return ((val) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;  in A4XX_VFD_FETCH_INSTR_2_SIZE()
3025 static inline uint32_t A4XX_VFD_FETCH_INSTR_3_STEPRATE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()  argument
3027 	return ((val) << A4XX_VFD_FETCH_INSTR_3_STEPRATE__SHIFT) & A4XX_VFD_FETCH_INSTR_3_STEPRATE__MASK;  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()
3035 static inline uint32_t A4XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)  in A4XX_VFD_DECODE_INSTR_WRITEMASK()  argument
3037 	return ((val) << A4XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) & A4XX_VFD_DECODE_INSTR_WRITEMASK__MASK;  in A4XX_VFD_DECODE_INSTR_WRITEMASK()
3042 static inline uint32_t A4XX_VFD_DECODE_INSTR_FORMAT(enum a4xx_vtx_fmt val)  in A4XX_VFD_DECODE_INSTR_FORMAT()  argument
3044 	return ((val) << A4XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A4XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A4XX_VFD_DECODE_INSTR_FORMAT()
3048 static inline uint32_t A4XX_VFD_DECODE_INSTR_REGID(uint32_t val)  in A4XX_VFD_DECODE_INSTR_REGID()  argument
3050 	return ((val) << A4XX_VFD_DECODE_INSTR_REGID__SHIFT) & A4XX_VFD_DECODE_INSTR_REGID__MASK;  in A4XX_VFD_DECODE_INSTR_REGID()
3055 static inline uint32_t A4XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A4XX_VFD_DECODE_INSTR_SWAP()  argument
3057 	return ((val) << A4XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A4XX_VFD_DECODE_INSTR_SWAP__MASK;  in A4XX_VFD_DECODE_INSTR_SWAP()
3061 static inline uint32_t A4XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()  argument
3063 	return ((val) << A4XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) & A4XX_VFD_DECODE_INSTR_SHIFTCNT__MASK;  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()
3093 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_VS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_VS()  argument
3095 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_VS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_VS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_VS()
3099 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_HS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_HS()  argument
3101 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_HS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_HS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_HS()
3105 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_DS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_DS()  argument
3107 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_DS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_DS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_DS()
3111 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_GS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_GS()  argument
3113 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_GS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_GS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_GS()
3167 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()  argument
3169 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
3173 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()  argument
3175 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()
3181 static inline uint32_t A4XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_XOFFSET_0()  argument
3183 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_XOFFSET_0()
3189 static inline uint32_t A4XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_XSCALE_0()  argument
3191 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_XSCALE_0()
3197 static inline uint32_t A4XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_YOFFSET_0()  argument
3199 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_YOFFSET_0()
3205 static inline uint32_t A4XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_YSCALE_0()  argument
3207 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_YSCALE_0()
3213 static inline uint32_t A4XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
3215 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()
3221 static inline uint32_t A4XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_ZSCALE_0()  argument
3223 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_ZSCALE_0()
3229 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MIN()  argument
3231 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MIN()
3235 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MAX()  argument
3237 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MAX()
3243 static inline uint32_t A4XX_GRAS_SU_POINT_SIZE(float val)  in A4XX_GRAS_SU_POINT_SIZE()  argument
3245 …return ((((int32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_SIZE__SHIFT) & A4XX_GRAS_SU_POINT_SIZE__MA…  in A4XX_GRAS_SU_POINT_SIZE()
3255 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
3257 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()
3263 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
3265 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()
3271 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_CLAMP(float val)  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()  argument
3273 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_CLAMP__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_CLAMP__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()
3279 static inline uint32_t A4XX_GRAS_DEPTH_CONTROL_FORMAT(enum a4xx_depth_format val)  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()  argument
3281 	return ((val) << A4XX_GRAS_DEPTH_CONTROL_FORMAT__SHIFT) & A4XX_GRAS_DEPTH_CONTROL_FORMAT__MASK;  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()
3290 static inline uint32_t A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()  argument
3292 …return ((((int32_t)(val * 4.0))) << A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A4XX_GRAS_SU…  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
3301 static inline uint32_t A4XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()  argument
3303 	return ((val) << A4XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RENDER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()
3307 static inline uint32_t A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(uint32_t val)  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()  argument
3309 …return ((val) << A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) & A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MA…  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
3314 static inline uint32_t A4XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()  argument
3316 	return ((val) << A4XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RASTER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()
3323 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()  argument
3325 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
3329 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()  argument
3331 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
3338 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()  argument
3340 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
3344 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()  argument
3346 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
3353 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
3355 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
3359 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
3361 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
3368 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
3370 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
3374 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
3376 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
3383 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()  argument
3385 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()
3389 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()  argument
3391 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()
3398 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()  argument
3400 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()
3404 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()  argument
3406 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()
3466 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
3468 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
3476 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()  argument
3478 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__MA…  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()
3488 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()  argument
3490 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_VSTHREADSI…  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
3496 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_COORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()  argument
3498 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_COORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_COORDREGID__…  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()
3502 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()  argument
3504 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREG…  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()
3510 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()  argument
3512 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_PRIM…  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
3516 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
3518 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()
3522 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()  argument
3524 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLEID…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()
3528 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()  argument
3530 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLE…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()
3536 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()  argument
3538 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP…  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()
3542 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()  argument
3544 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_LINE…  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()
3548 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()  argument
3550 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_PE…  in A4XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()
3554 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()  argument
3556 …return ((val) << A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_IJ_L…  in A4XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()
3562 static inline uint32_t A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(uint32_t val)  in A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()  argument
3564 …return ((val) << A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__SHIFT) & A4XX_HLSQ_CONTROL_4_REG_IJ_PERS…  in A4XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()
3568 static inline uint32_t A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(uint32_t val)  in A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()  argument
3570 …return ((val) << A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__SHIFT) & A4XX_HLSQ_CONTROL_4_REG_IJ_LIN…  in A4XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()
3576 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()  argument
3578 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
3582 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3584 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CON…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()
3590 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()  argument
3592 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_SHADE…  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()
3596 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()  argument
3598 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
3604 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()  argument
3606 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
3610 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3612 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CON…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()
3618 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()  argument
3620 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_SHADE…  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()
3624 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()  argument
3626 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
3632 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()  argument
3634 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()
3638 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3640 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CON…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()
3646 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()  argument
3648 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_SHADE…  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()
3652 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()  argument
3654 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()
3660 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()  argument
3662 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()
3666 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3668 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CON…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()
3674 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()  argument
3676 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_SHADE…  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()
3680 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()  argument
3682 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()
3688 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()  argument
3690 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()
3694 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3696 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CON…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()
3702 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()  argument
3704 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_SHADE…  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()
3708 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()  argument
3710 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()
3716 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH()  argument
3718 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH()
3722 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3724 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_CON…  in A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET()
3730 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET()  argument
3732 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_SHADE…  in A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET()
3736 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH()  argument
3738 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH()
3744 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM()  argument
3746 	return ((val) << A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__MASK;  in A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM()
3750 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX()  argument
3752 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX()
3756 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY()  argument
3758 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY()
3762 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ()  argument
3764 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ()
3770 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_1_SIZE_X(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_1_SIZE_X()  argument
3772 	return ((val) << A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__SHIFT) & A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__MASK;  in A4XX_HLSQ_CL_NDRANGE_1_SIZE_X()
3780 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y()  argument
3782 	return ((val) << A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__SHIFT) & A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__MASK;  in A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y()
3790 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z()  argument
3792 	return ((val) << A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__SHIFT) & A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__MASK;  in A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z()
3800 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID()  argument
3802 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__…  in A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID()
3806 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID()  argument
3808 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID…  in A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID()
3853 static inline uint32_t A4XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val)  in A4XX_PC_VSTREAM_CONTROL_SIZE()  argument
3855 	return ((val) << A4XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) & A4XX_PC_VSTREAM_CONTROL_SIZE__MASK;  in A4XX_PC_VSTREAM_CONTROL_SIZE()
3859 static inline uint32_t A4XX_PC_VSTREAM_CONTROL_N(uint32_t val)  in A4XX_PC_VSTREAM_CONTROL_N()  argument
3861 	return ((val) << A4XX_PC_VSTREAM_CONTROL_N__SHIFT) & A4XX_PC_VSTREAM_CONTROL_N__MASK;  in A4XX_PC_VSTREAM_CONTROL_N()
3867 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()  argument
3869 	return ((val) << A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) & A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()
3878 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE()  argument
3880 …return ((val) << A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__SHIFT) & A4XX_PC_PRIM_VTX_CNTL2_POLY…  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE()
3884 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE()  argument
3886 …return ((val) << A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__SHIFT) & A4XX_PC_PRIM_VTX_CNTL2_POLYM…  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE()
3895 static inline uint32_t A4XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A4XX_PC_GS_PARAM_MAX_VERTICES()  argument
3897 	return ((val) << A4XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A4XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A4XX_PC_GS_PARAM_MAX_VERTICES()
3901 static inline uint32_t A4XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A4XX_PC_GS_PARAM_INVOCATIONS()  argument
3903 	return ((val) << A4XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A4XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A4XX_PC_GS_PARAM_INVOCATIONS()
3907 static inline uint32_t A4XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_GS_PARAM_PRIMTYPE()  argument
3909 	return ((val) << A4XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A4XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A4XX_PC_GS_PARAM_PRIMTYPE()
3916 static inline uint32_t A4XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A4XX_PC_HS_PARAM_VERTICES_OUT()  argument
3918 	return ((val) << A4XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A4XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A4XX_PC_HS_PARAM_VERTICES_OUT()
3922 static inline uint32_t A4XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A4XX_PC_HS_PARAM_SPACING()  argument
3924 	return ((val) << A4XX_PC_HS_PARAM_SPACING__SHIFT) & A4XX_PC_HS_PARAM_SPACING__MASK;  in A4XX_PC_HS_PARAM_SPACING()
4030 static inline uint32_t A4XX_TEX_SAMP_0_XY_MAG(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MAG()  argument
4032 	return ((val) << A4XX_TEX_SAMP_0_XY_MAG__SHIFT) & A4XX_TEX_SAMP_0_XY_MAG__MASK;  in A4XX_TEX_SAMP_0_XY_MAG()
4036 static inline uint32_t A4XX_TEX_SAMP_0_XY_MIN(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MIN()  argument
4038 	return ((val) << A4XX_TEX_SAMP_0_XY_MIN__SHIFT) & A4XX_TEX_SAMP_0_XY_MIN__MASK;  in A4XX_TEX_SAMP_0_XY_MIN()
4042 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_S(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_S()  argument
4044 	return ((val) << A4XX_TEX_SAMP_0_WRAP_S__SHIFT) & A4XX_TEX_SAMP_0_WRAP_S__MASK;  in A4XX_TEX_SAMP_0_WRAP_S()
4048 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_T(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_T()  argument
4050 	return ((val) << A4XX_TEX_SAMP_0_WRAP_T__SHIFT) & A4XX_TEX_SAMP_0_WRAP_T__MASK;  in A4XX_TEX_SAMP_0_WRAP_T()
4054 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_R()  argument
4056 	return ((val) << A4XX_TEX_SAMP_0_WRAP_R__SHIFT) & A4XX_TEX_SAMP_0_WRAP_R__MASK;  in A4XX_TEX_SAMP_0_WRAP_R()
4060 static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)  in A4XX_TEX_SAMP_0_ANISO()  argument
4062 	return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK;  in A4XX_TEX_SAMP_0_ANISO()
4066 static inline uint32_t A4XX_TEX_SAMP_0_LOD_BIAS(float val)  in A4XX_TEX_SAMP_0_LOD_BIAS()  argument
4068 …return ((((int32_t)(val * 256.0))) << A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A4XX_TEX_SAMP_0_LOD_BIAS_…  in A4XX_TEX_SAMP_0_LOD_BIAS()
4074 static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A4XX_TEX_SAMP_1_COMPARE_FUNC()  argument
4076 	return ((val) << A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A4XX_TEX_SAMP_1_COMPARE_FUNC()
4083 static inline uint32_t A4XX_TEX_SAMP_1_MAX_LOD(float val)  in A4XX_TEX_SAMP_1_MAX_LOD()  argument
4085 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A4XX_TEX_SAMP_1_MAX_LOD__…  in A4XX_TEX_SAMP_1_MAX_LOD()
4089 static inline uint32_t A4XX_TEX_SAMP_1_MIN_LOD(float val)  in A4XX_TEX_SAMP_1_MIN_LOD()  argument
4091 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A4XX_TEX_SAMP_1_MIN_LOD__…  in A4XX_TEX_SAMP_1_MIN_LOD()
4099 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_X(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_X()  argument
4101 	return ((val) << A4XX_TEX_CONST_0_SWIZ_X__SHIFT) & A4XX_TEX_CONST_0_SWIZ_X__MASK;  in A4XX_TEX_CONST_0_SWIZ_X()
4105 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Y(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Y()  argument
4107 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Y__MASK;  in A4XX_TEX_CONST_0_SWIZ_Y()
4111 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Z(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Z()  argument
4113 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Z__MASK;  in A4XX_TEX_CONST_0_SWIZ_Z()
4117 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_W(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_W()  argument
4119 	return ((val) << A4XX_TEX_CONST_0_SWIZ_W__SHIFT) & A4XX_TEX_CONST_0_SWIZ_W__MASK;  in A4XX_TEX_CONST_0_SWIZ_W()
4123 static inline uint32_t A4XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A4XX_TEX_CONST_0_MIPLVLS()  argument
4125 	return ((val) << A4XX_TEX_CONST_0_MIPLVLS__SHIFT) & A4XX_TEX_CONST_0_MIPLVLS__MASK;  in A4XX_TEX_CONST_0_MIPLVLS()
4129 static inline uint32_t A4XX_TEX_CONST_0_FMT(enum a4xx_tex_fmt val)  in A4XX_TEX_CONST_0_FMT()  argument
4131 	return ((val) << A4XX_TEX_CONST_0_FMT__SHIFT) & A4XX_TEX_CONST_0_FMT__MASK;  in A4XX_TEX_CONST_0_FMT()
4135 static inline uint32_t A4XX_TEX_CONST_0_TYPE(enum a4xx_tex_type val)  in A4XX_TEX_CONST_0_TYPE()  argument
4137 	return ((val) << A4XX_TEX_CONST_0_TYPE__SHIFT) & A4XX_TEX_CONST_0_TYPE__MASK;  in A4XX_TEX_CONST_0_TYPE()
4143 static inline uint32_t A4XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A4XX_TEX_CONST_1_HEIGHT()  argument
4145 	return ((val) << A4XX_TEX_CONST_1_HEIGHT__SHIFT) & A4XX_TEX_CONST_1_HEIGHT__MASK;  in A4XX_TEX_CONST_1_HEIGHT()
4149 static inline uint32_t A4XX_TEX_CONST_1_WIDTH(uint32_t val)  in A4XX_TEX_CONST_1_WIDTH()  argument
4151 	return ((val) << A4XX_TEX_CONST_1_WIDTH__SHIFT) & A4XX_TEX_CONST_1_WIDTH__MASK;  in A4XX_TEX_CONST_1_WIDTH()
4157 static inline uint32_t A4XX_TEX_CONST_2_PITCHALIGN(uint32_t val)  in A4XX_TEX_CONST_2_PITCHALIGN()  argument
4159 	return ((val) << A4XX_TEX_CONST_2_PITCHALIGN__SHIFT) & A4XX_TEX_CONST_2_PITCHALIGN__MASK;  in A4XX_TEX_CONST_2_PITCHALIGN()
4163 static inline uint32_t A4XX_TEX_CONST_2_PITCH(uint32_t val)  in A4XX_TEX_CONST_2_PITCH()  argument
4165 	return ((val) << A4XX_TEX_CONST_2_PITCH__SHIFT) & A4XX_TEX_CONST_2_PITCH__MASK;  in A4XX_TEX_CONST_2_PITCH()
4169 static inline uint32_t A4XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)  in A4XX_TEX_CONST_2_SWAP()  argument
4171 	return ((val) << A4XX_TEX_CONST_2_SWAP__SHIFT) & A4XX_TEX_CONST_2_SWAP__MASK;  in A4XX_TEX_CONST_2_SWAP()
4177 static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_3_LAYERSZ()  argument
4179 	return ((val >> 12) << A4XX_TEX_CONST_3_LAYERSZ__SHIFT) & A4XX_TEX_CONST_3_LAYERSZ__MASK;  in A4XX_TEX_CONST_3_LAYERSZ()
4183 static inline uint32_t A4XX_TEX_CONST_3_DEPTH(uint32_t val)  in A4XX_TEX_CONST_3_DEPTH()  argument
4185 	return ((val) << A4XX_TEX_CONST_3_DEPTH__SHIFT) & A4XX_TEX_CONST_3_DEPTH__MASK;  in A4XX_TEX_CONST_3_DEPTH()
4191 static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_4_LAYERSZ()  argument
4193 	return ((val >> 12) << A4XX_TEX_CONST_4_LAYERSZ__SHIFT) & A4XX_TEX_CONST_4_LAYERSZ__MASK;  in A4XX_TEX_CONST_4_LAYERSZ()
4197 static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val)  in A4XX_TEX_CONST_4_BASE()  argument
4199 	return ((val >> 5) << A4XX_TEX_CONST_4_BASE__SHIFT) & A4XX_TEX_CONST_4_BASE__MASK;  in A4XX_TEX_CONST_4_BASE()
4211 static inline uint32_t A4XX_SSBO_0_0_BASE(uint32_t val)  in A4XX_SSBO_0_0_BASE()  argument
4213 	return ((val >> 5) << A4XX_SSBO_0_0_BASE__SHIFT) & A4XX_SSBO_0_0_BASE__MASK;  in A4XX_SSBO_0_0_BASE()
4219 static inline uint32_t A4XX_SSBO_0_1_PITCH(uint32_t val)  in A4XX_SSBO_0_1_PITCH()  argument
4221 	return ((val) << A4XX_SSBO_0_1_PITCH__SHIFT) & A4XX_SSBO_0_1_PITCH__MASK;  in A4XX_SSBO_0_1_PITCH()
4227 static inline uint32_t A4XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)  in A4XX_SSBO_0_2_ARRAY_PITCH()  argument
4229 	return ((val >> 12) << A4XX_SSBO_0_2_ARRAY_PITCH__SHIFT) & A4XX_SSBO_0_2_ARRAY_PITCH__MASK;  in A4XX_SSBO_0_2_ARRAY_PITCH()
4235 static inline uint32_t A4XX_SSBO_0_3_CPP(uint32_t val)  in A4XX_SSBO_0_3_CPP()  argument
4237 	return ((val) << A4XX_SSBO_0_3_CPP__SHIFT) & A4XX_SSBO_0_3_CPP__MASK;  in A4XX_SSBO_0_3_CPP()
4243 static inline uint32_t A4XX_SSBO_1_0_CPP(uint32_t val)  in A4XX_SSBO_1_0_CPP()  argument
4245 	return ((val) << A4XX_SSBO_1_0_CPP__SHIFT) & A4XX_SSBO_1_0_CPP__MASK;  in A4XX_SSBO_1_0_CPP()
4249 static inline uint32_t A4XX_SSBO_1_0_FMT(enum a4xx_color_fmt val)  in A4XX_SSBO_1_0_FMT()  argument
4251 	return ((val) << A4XX_SSBO_1_0_FMT__SHIFT) & A4XX_SSBO_1_0_FMT__MASK;  in A4XX_SSBO_1_0_FMT()
4255 static inline uint32_t A4XX_SSBO_1_0_WIDTH(uint32_t val)  in A4XX_SSBO_1_0_WIDTH()  argument
4257 	return ((val) << A4XX_SSBO_1_0_WIDTH__SHIFT) & A4XX_SSBO_1_0_WIDTH__MASK;  in A4XX_SSBO_1_0_WIDTH()
4263 static inline uint32_t A4XX_SSBO_1_1_HEIGHT(uint32_t val)  in A4XX_SSBO_1_1_HEIGHT()  argument
4265 	return ((val) << A4XX_SSBO_1_1_HEIGHT__SHIFT) & A4XX_SSBO_1_1_HEIGHT__MASK;  in A4XX_SSBO_1_1_HEIGHT()
4269 static inline uint32_t A4XX_SSBO_1_1_DEPTH(uint32_t val)  in A4XX_SSBO_1_1_DEPTH()  argument
4271 	return ((val) << A4XX_SSBO_1_1_DEPTH__SHIFT) & A4XX_SSBO_1_1_DEPTH__MASK;  in A4XX_SSBO_1_1_DEPTH()