254 				check_offset = RBIOS16(check_offset + 0x3);  in combios_get_table_offset()
266 				check_offset = RBIOS16(check_offset + 0x5);  in combios_get_table_offset()
278 				check_offset = RBIOS16(check_offset + 0x7);  in combios_get_table_offset()
290 				check_offset = RBIOS16(check_offset + 0x9);  in combios_get_table_offset()
310 			check_offset = RBIOS16(check_offset + 0x11);  in combios_get_table_offset()
319 			check_offset = RBIOS16(check_offset + 0x13);  in combios_get_table_offset()
328 			check_offset = RBIOS16(check_offset + 0x15);  in combios_get_table_offset()
337 			check_offset = RBIOS16(check_offset + 0x17);  in combios_get_table_offset()
346 			check_offset = RBIOS16(check_offset + 0x2);  in combios_get_table_offset()
355 			check_offset = RBIOS16(check_offset + 0x4);  in combios_get_table_offset()
368 		offset = RBIOS16(rdev->bios_header_start + check_offset);  in combios_get_table_offset()
749 		p1pll->reference_freq = RBIOS16(pll_info + 0xe);  in radeon_combios_get_clock_info()
750 		p1pll->reference_div = RBIOS16(pll_info + 0x10);  in radeon_combios_get_clock_info()
766 		spll->reference_freq = RBIOS16(pll_info + 0x1a);  in radeon_combios_get_clock_info()
767 		spll->reference_div = RBIOS16(pll_info + 0x1c);  in radeon_combios_get_clock_info()
781 		mpll->reference_freq = RBIOS16(pll_info + 0x26);  in radeon_combios_get_clock_info()
782 		mpll->reference_div = RBIOS16(pll_info + 0x28);  in radeon_combios_get_clock_info()
796 		sclk = RBIOS16(pll_info + 0xa);  in radeon_combios_get_clock_info()
797 		mclk = RBIOS16(pll_info + 0x8);  in radeon_combios_get_clock_info()
828 		if (RBIOS16(igp_info + 0x4))  in radeon_combios_sideport_present()
1198 		lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19);  in radeon_combios_get_lvds_info()
1199 		lvds->native_mode.vdisplay = RBIOS16(lcd_info + 0x1b);  in radeon_combios_get_lvds_info()
1204 		lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);  in radeon_combios_get_lvds_info()
1208 		lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf;  in radeon_combios_get_lvds_info()
1209 		lvds->panel_blon_delay = (RBIOS16(lcd_info + 0x38) >> 4) & 0xf;  in radeon_combios_get_lvds_info()
1211 		lvds->panel_ref_divider = RBIOS16(lcd_info + 0x2e);  in radeon_combios_get_lvds_info()
1213 		lvds->panel_fb_divider = RBIOS16(lcd_info + 0x31);  in radeon_combios_get_lvds_info()
1255 			tmp = RBIOS16(lcd_info + 64 + i * 2);  in radeon_combios_get_lvds_info()
1259 			if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) &&  in radeon_combios_get_lvds_info()
1260 			    (RBIOS16(tmp + 2) == lvds->native_mode.vdisplay)) {  in radeon_combios_get_lvds_info()
1261 				u32 hss = (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 1) * 8;  in radeon_combios_get_lvds_info()
1267 					(RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8;  in radeon_combios_get_lvds_info()
1274 					(RBIOS16(tmp + 24) - RBIOS16(tmp + 26));  in radeon_combios_get_lvds_info()
1276 					((RBIOS16(tmp + 28) & 0x7ff) - RBIOS16(tmp + 26));  in radeon_combios_get_lvds_info()
1278 					((RBIOS16(tmp + 28) & 0xf800) >> 11);  in radeon_combios_get_lvds_info()
1280 				lvds->native_mode.clock = RBIOS16(tmp + 9) * 10;  in radeon_combios_get_lvds_info()
1356 				    RBIOS16(tmds_info + i * 10 + 0x10);  in radeon_legacy_get_tmds_info_from_combios()
1370 				    RBIOS16(tmds_info + stride + 0x10);  in radeon_legacy_get_tmds_info_from_combios()
2323 			if (!RBIOS16(entry))  in radeon_get_legacy_connector_info_from_bios()
2326 			tmp = RBIOS16(entry);  in radeon_get_legacy_connector_info_from_bios()
2744 			misc = RBIOS16(offset + 0x5 + 0x0);  in radeon_combios_get_power_modes()
2746 				misc2 = RBIOS16(offset + 0x5 + 0xe);  in radeon_combios_get_power_modes()
2760 						RBIOS16(offset + 0x5 + 0xb) * 4;  in radeon_combios_get_power_modes()
2765 					u16 voltage_table_offset = RBIOS16(offset + 0x5 + 0xc);  in radeon_combios_get_power_modes()
2768 							RBIOS16(voltage_table_offset) * 4;  in radeon_combios_get_power_modes()
2907 					id = RBIOS16(index);  in radeon_combios_external_tmds_setup()
2927 						val = RBIOS16(index);  in radeon_combios_external_tmds_setup()
2932 						val = RBIOS16(index);  in radeon_combios_external_tmds_setup()
2961 			id = RBIOS16(index);  in radeon_combios_external_tmds_setup()
2981 					val = RBIOS16(index);  in radeon_combios_external_tmds_setup()
3007 				id = RBIOS16(index);  in radeon_combios_external_tmds_setup()
3020 		while (RBIOS16(offset)) {  in combios_parse_mmio_table()
3021 			uint16_t cmd = ((RBIOS16(offset) & 0xe000) >> 13);  in combios_parse_mmio_table()
3022 			uint32_t addr = (RBIOS16(offset) & 0x1fff);  in combios_parse_mmio_table()
3059 				val = RBIOS16(offset);  in combios_parse_mmio_table()
3064 				val = RBIOS16(offset);  in combios_parse_mmio_table()
3212 				uint32_t or_mask = RBIOS16(offset);  in combios_parse_ram_reset_table()
3281 			mem_size = RBIOS16(offset + 5);  in combios_write_ram_size()