Lines Matching refs:se
76 struct geni_se se; member
157 writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL); in qcom_geni_i2c_conf()
160 writel_relaxed(val, gi2c->se.base + GENI_SER_M_CLK_CFG); in qcom_geni_i2c_conf()
165 writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS); in qcom_geni_i2c_conf()
170 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0); in geni_i2c_err_misc()
171 u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS); in geni_i2c_err_misc()
172 u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS); in geni_i2c_err_misc()
173 u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS); in geni_i2c_err_misc()
174 u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN); in geni_i2c_err_misc()
178 rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_err_misc()
179 tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_err_misc()
181 rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS); in geni_i2c_err_misc()
182 tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS); in geni_i2c_err_misc()
184 dev_dbg(gi2c->se.dev, "DMA:%d tx_stat:0x%x, rx_stat:0x%x, irq-stat:0x%x\n", in geni_i2c_err_misc()
186 dev_dbg(gi2c->se.dev, "m_cmd:0x%x, geni_status:0x%x, geni_ios:0x%x\n", in geni_i2c_err_misc()
195 dev_dbg(gi2c->se.dev, "len:%d, slv-addr:0x%x, RD/WR:%d\n", in geni_i2c_err()
199 dev_err(gi2c->se.dev, "%s\n", gi2c_log[err].msg); in geni_i2c_err()
207 void __iomem *base = gi2c->se.base; in geni_i2c_irq()
247 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n", in geni_i2c_irq()
313 geni_se_abort_m_cmd(&gi2c->se); in geni_i2c_abort_xfer()
317 val = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS); in geni_i2c_abort_xfer()
321 dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n"); in geni_i2c_abort_xfer()
329 writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST); in geni_i2c_rx_fsm_rst()
332 val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_rx_fsm_rst()
336 dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n"); in geni_i2c_rx_fsm_rst()
344 writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST); in geni_i2c_tx_fsm_rst()
347 val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_tx_fsm_rst()
351 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n"); in geni_i2c_tx_fsm_rst()
361 geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_rx_msg_cleanup()
373 geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_tx_msg_cleanup()
384 struct geni_se *se = &gi2c->se; in geni_i2c_rx_one_msg() local
392 geni_se_select_mode(se, GENI_SE_DMA); in geni_i2c_rx_one_msg()
394 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_rx_one_msg()
396 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN); in geni_i2c_rx_one_msg()
397 geni_se_setup_m_cmd(se, I2C_READ, m_param); in geni_i2c_rx_one_msg()
399 if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) { in geni_i2c_rx_one_msg()
400 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_rx_one_msg()
425 struct geni_se *se = &gi2c->se; in geni_i2c_tx_one_msg() local
433 geni_se_select_mode(se, GENI_SE_DMA); in geni_i2c_tx_one_msg()
435 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_tx_one_msg()
437 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN); in geni_i2c_tx_one_msg()
438 geni_se_setup_m_cmd(se, I2C_WRITE, m_param); in geni_i2c_tx_one_msg()
440 if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) { in geni_i2c_tx_one_msg()
441 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_tx_one_msg()
451 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG); in geni_i2c_tx_one_msg()
472 ret = pm_runtime_get_sync(gi2c->se.dev); in geni_i2c_xfer()
474 dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret); in geni_i2c_xfer()
475 pm_runtime_put_noidle(gi2c->se.dev); in geni_i2c_xfer()
477 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_xfer()
499 pm_runtime_mark_last_busy(gi2c->se.dev); in geni_i2c_xfer()
500 pm_runtime_put_autosuspend(gi2c->se.dev); in geni_i2c_xfer()
536 gi2c->se.dev = dev; in geni_i2c_probe()
537 gi2c->se.wrapper = dev_get_drvdata(dev->parent); in geni_i2c_probe()
539 gi2c->se.base = devm_ioremap_resource(dev, res); in geni_i2c_probe()
540 if (IS_ERR(gi2c->se.base)) in geni_i2c_probe()
541 return PTR_ERR(gi2c->se.base); in geni_i2c_probe()
543 gi2c->se.clk = devm_clk_get(dev, "se"); in geni_i2c_probe()
544 if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev)) in geni_i2c_probe()
545 return PTR_ERR(gi2c->se.clk); in geni_i2c_probe()
586 ret = geni_icc_get(&gi2c->se, "qup-memory"); in geni_i2c_probe()
594 gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
595 gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
596 gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out); in geni_i2c_probe()
598 ret = geni_icc_set_bw(&gi2c->se); in geni_i2c_probe()
602 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_probe()
607 proto = geni_se_read_proto(&gi2c->se); in geni_i2c_probe()
608 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); in geni_i2c_probe()
611 geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
615 geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth); in geni_i2c_probe()
616 geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, PACKING_BYTES_PW, in geni_i2c_probe()
618 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
624 ret = geni_icc_disable(&gi2c->se); in geni_i2c_probe()
631 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_probe()
632 pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY); in geni_i2c_probe()
633 pm_runtime_use_autosuspend(gi2c->se.dev); in geni_i2c_probe()
634 pm_runtime_enable(gi2c->se.dev); in geni_i2c_probe()
639 pm_runtime_disable(gi2c->se.dev); in geni_i2c_probe()
653 pm_runtime_disable(gi2c->se.dev); in geni_i2c_remove()
671 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_runtime_suspend()
680 return geni_icc_disable(&gi2c->se); in geni_i2c_runtime_suspend()
688 ret = geni_icc_enable(&gi2c->se); in geni_i2c_runtime_resume()
692 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_runtime_resume()