Lines Matching refs:WREG32
812 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, GAUDI_EVENT_INTS_REGISTER); in gaudi_late_init()
1267 WREG32(mmNIF_RTR_CTRL_0_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1269 WREG32(mmNIF_RTR_CTRL_1_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1271 WREG32(mmNIF_RTR_CTRL_2_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1273 WREG32(mmNIF_RTR_CTRL_3_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1275 WREG32(mmNIF_RTR_CTRL_4_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1277 WREG32(mmNIF_RTR_CTRL_5_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1279 WREG32(mmNIF_RTR_CTRL_6_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1281 WREG32(mmNIF_RTR_CTRL_7_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1284 WREG32(mmSIF_RTR_CTRL_0_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1286 WREG32(mmSIF_RTR_CTRL_1_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1288 WREG32(mmSIF_RTR_CTRL_2_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1290 WREG32(mmSIF_RTR_CTRL_3_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1292 WREG32(mmSIF_RTR_CTRL_4_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1294 WREG32(mmSIF_RTR_CTRL_5_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1296 WREG32(mmSIF_RTR_CTRL_6_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1298 WREG32(mmSIF_RTR_CTRL_7_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1301 WREG32(mmDMA_IF_E_N_DOWN_CH0_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1303 WREG32(mmDMA_IF_E_N_DOWN_CH1_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1305 WREG32(mmDMA_IF_E_S_DOWN_CH0_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1307 WREG32(mmDMA_IF_E_S_DOWN_CH1_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1309 WREG32(mmDMA_IF_W_N_DOWN_CH0_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1311 WREG32(mmDMA_IF_W_N_DOWN_CH1_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1313 WREG32(mmDMA_IF_W_S_DOWN_CH0_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1315 WREG32(mmDMA_IF_W_S_DOWN_CH1_SCRAM_SRAM_EN, in gaudi_init_scrambler_sram()
1331 WREG32(mmNIF_RTR_CTRL_0_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1333 WREG32(mmNIF_RTR_CTRL_1_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1335 WREG32(mmNIF_RTR_CTRL_2_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1337 WREG32(mmNIF_RTR_CTRL_3_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1339 WREG32(mmNIF_RTR_CTRL_4_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1341 WREG32(mmNIF_RTR_CTRL_5_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1343 WREG32(mmNIF_RTR_CTRL_6_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1345 WREG32(mmNIF_RTR_CTRL_7_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1348 WREG32(mmSIF_RTR_CTRL_0_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1350 WREG32(mmSIF_RTR_CTRL_1_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1352 WREG32(mmSIF_RTR_CTRL_2_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1354 WREG32(mmSIF_RTR_CTRL_3_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1356 WREG32(mmSIF_RTR_CTRL_4_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1358 WREG32(mmSIF_RTR_CTRL_5_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1360 WREG32(mmSIF_RTR_CTRL_6_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1362 WREG32(mmSIF_RTR_CTRL_7_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1365 WREG32(mmDMA_IF_E_N_DOWN_CH0_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1367 WREG32(mmDMA_IF_E_N_DOWN_CH1_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1369 WREG32(mmDMA_IF_E_S_DOWN_CH0_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1371 WREG32(mmDMA_IF_E_S_DOWN_CH1_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1373 WREG32(mmDMA_IF_W_N_DOWN_CH0_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1375 WREG32(mmDMA_IF_W_N_DOWN_CH1_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1377 WREG32(mmDMA_IF_W_S_DOWN_CH0_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1379 WREG32(mmDMA_IF_W_S_DOWN_CH1_SCRAM_HBM_EN, in gaudi_init_scrambler_hbm()
1387 WREG32(mmSIF_RTR_CTRL_0_E2E_HBM_WR_SIZE, 247 >> 3); in gaudi_init_e2e()
1388 WREG32(mmSIF_RTR_CTRL_0_E2E_HBM_RD_SIZE, 785 >> 3); in gaudi_init_e2e()
1389 WREG32(mmSIF_RTR_CTRL_0_E2E_PCI_WR_SIZE, 49); in gaudi_init_e2e()
1390 WREG32(mmSIF_RTR_CTRL_0_E2E_PCI_RD_SIZE, 101); in gaudi_init_e2e()
1392 WREG32(mmSIF_RTR_CTRL_1_E2E_HBM_WR_SIZE, 275 >> 3); in gaudi_init_e2e()
1393 WREG32(mmSIF_RTR_CTRL_1_E2E_HBM_RD_SIZE, 614 >> 3); in gaudi_init_e2e()
1394 WREG32(mmSIF_RTR_CTRL_1_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1395 WREG32(mmSIF_RTR_CTRL_1_E2E_PCI_RD_SIZE, 39); in gaudi_init_e2e()
1397 WREG32(mmSIF_RTR_CTRL_2_E2E_HBM_WR_SIZE, 1); in gaudi_init_e2e()
1398 WREG32(mmSIF_RTR_CTRL_2_E2E_HBM_RD_SIZE, 1); in gaudi_init_e2e()
1399 WREG32(mmSIF_RTR_CTRL_2_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1400 WREG32(mmSIF_RTR_CTRL_2_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1402 WREG32(mmSIF_RTR_CTRL_3_E2E_HBM_WR_SIZE, 176 >> 3); in gaudi_init_e2e()
1403 WREG32(mmSIF_RTR_CTRL_3_E2E_HBM_RD_SIZE, 32 >> 3); in gaudi_init_e2e()
1404 WREG32(mmSIF_RTR_CTRL_3_E2E_PCI_WR_SIZE, 19); in gaudi_init_e2e()
1405 WREG32(mmSIF_RTR_CTRL_3_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1407 WREG32(mmSIF_RTR_CTRL_4_E2E_HBM_WR_SIZE, 176 >> 3); in gaudi_init_e2e()
1408 WREG32(mmSIF_RTR_CTRL_4_E2E_HBM_RD_SIZE, 32 >> 3); in gaudi_init_e2e()
1409 WREG32(mmSIF_RTR_CTRL_4_E2E_PCI_WR_SIZE, 19); in gaudi_init_e2e()
1410 WREG32(mmSIF_RTR_CTRL_4_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1412 WREG32(mmSIF_RTR_CTRL_5_E2E_HBM_WR_SIZE, 1); in gaudi_init_e2e()
1413 WREG32(mmSIF_RTR_CTRL_5_E2E_HBM_RD_SIZE, 1); in gaudi_init_e2e()
1414 WREG32(mmSIF_RTR_CTRL_5_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1415 WREG32(mmSIF_RTR_CTRL_5_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1417 WREG32(mmSIF_RTR_CTRL_6_E2E_HBM_WR_SIZE, 275 >> 3); in gaudi_init_e2e()
1418 WREG32(mmSIF_RTR_CTRL_6_E2E_HBM_RD_SIZE, 614 >> 3); in gaudi_init_e2e()
1419 WREG32(mmSIF_RTR_CTRL_6_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1420 WREG32(mmSIF_RTR_CTRL_6_E2E_PCI_RD_SIZE, 39); in gaudi_init_e2e()
1422 WREG32(mmSIF_RTR_CTRL_7_E2E_HBM_WR_SIZE, 297 >> 3); in gaudi_init_e2e()
1423 WREG32(mmSIF_RTR_CTRL_7_E2E_HBM_RD_SIZE, 908 >> 3); in gaudi_init_e2e()
1424 WREG32(mmSIF_RTR_CTRL_7_E2E_PCI_WR_SIZE, 19); in gaudi_init_e2e()
1425 WREG32(mmSIF_RTR_CTRL_7_E2E_PCI_RD_SIZE, 19); in gaudi_init_e2e()
1427 WREG32(mmNIF_RTR_CTRL_0_E2E_HBM_WR_SIZE, 318 >> 3); in gaudi_init_e2e()
1428 WREG32(mmNIF_RTR_CTRL_0_E2E_HBM_RD_SIZE, 956 >> 3); in gaudi_init_e2e()
1429 WREG32(mmNIF_RTR_CTRL_0_E2E_PCI_WR_SIZE, 79); in gaudi_init_e2e()
1430 WREG32(mmNIF_RTR_CTRL_0_E2E_PCI_RD_SIZE, 163); in gaudi_init_e2e()
1432 WREG32(mmNIF_RTR_CTRL_1_E2E_HBM_WR_SIZE, 275 >> 3); in gaudi_init_e2e()
1433 WREG32(mmNIF_RTR_CTRL_1_E2E_HBM_RD_SIZE, 614 >> 3); in gaudi_init_e2e()
1434 WREG32(mmNIF_RTR_CTRL_1_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1435 WREG32(mmNIF_RTR_CTRL_1_E2E_PCI_RD_SIZE, 39); in gaudi_init_e2e()
1437 WREG32(mmNIF_RTR_CTRL_2_E2E_HBM_WR_SIZE, 1); in gaudi_init_e2e()
1438 WREG32(mmNIF_RTR_CTRL_2_E2E_HBM_RD_SIZE, 1); in gaudi_init_e2e()
1439 WREG32(mmNIF_RTR_CTRL_2_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1440 WREG32(mmNIF_RTR_CTRL_2_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1442 WREG32(mmNIF_RTR_CTRL_3_E2E_HBM_WR_SIZE, 176 >> 3); in gaudi_init_e2e()
1443 WREG32(mmNIF_RTR_CTRL_3_E2E_HBM_RD_SIZE, 32 >> 3); in gaudi_init_e2e()
1444 WREG32(mmNIF_RTR_CTRL_3_E2E_PCI_WR_SIZE, 19); in gaudi_init_e2e()
1445 WREG32(mmNIF_RTR_CTRL_3_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1447 WREG32(mmNIF_RTR_CTRL_4_E2E_HBM_WR_SIZE, 176 >> 3); in gaudi_init_e2e()
1448 WREG32(mmNIF_RTR_CTRL_4_E2E_HBM_RD_SIZE, 32 >> 3); in gaudi_init_e2e()
1449 WREG32(mmNIF_RTR_CTRL_4_E2E_PCI_WR_SIZE, 19); in gaudi_init_e2e()
1450 WREG32(mmNIF_RTR_CTRL_4_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1452 WREG32(mmNIF_RTR_CTRL_5_E2E_HBM_WR_SIZE, 1); in gaudi_init_e2e()
1453 WREG32(mmNIF_RTR_CTRL_5_E2E_HBM_RD_SIZE, 1); in gaudi_init_e2e()
1454 WREG32(mmNIF_RTR_CTRL_5_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1455 WREG32(mmNIF_RTR_CTRL_5_E2E_PCI_RD_SIZE, 32); in gaudi_init_e2e()
1457 WREG32(mmNIF_RTR_CTRL_6_E2E_HBM_WR_SIZE, 275 >> 3); in gaudi_init_e2e()
1458 WREG32(mmNIF_RTR_CTRL_6_E2E_HBM_RD_SIZE, 614 >> 3); in gaudi_init_e2e()
1459 WREG32(mmNIF_RTR_CTRL_6_E2E_PCI_WR_SIZE, 1); in gaudi_init_e2e()
1460 WREG32(mmNIF_RTR_CTRL_6_E2E_PCI_RD_SIZE, 39); in gaudi_init_e2e()
1462 WREG32(mmNIF_RTR_CTRL_7_E2E_HBM_WR_SIZE, 318 >> 3); in gaudi_init_e2e()
1463 WREG32(mmNIF_RTR_CTRL_7_E2E_HBM_RD_SIZE, 956 >> 3); in gaudi_init_e2e()
1464 WREG32(mmNIF_RTR_CTRL_7_E2E_PCI_WR_SIZE, 79); in gaudi_init_e2e()
1465 WREG32(mmNIF_RTR_CTRL_7_E2E_PCI_RD_SIZE, 79); in gaudi_init_e2e()
1467 WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1468 WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1469 WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1470 WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1472 WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1473 WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1474 WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1475 WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1477 WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1478 WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1479 WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1480 WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1482 WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1483 WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1484 WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1485 WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1487 WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1488 WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1489 WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1490 WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1492 WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1493 WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1494 WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1495 WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1497 WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1498 WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1499 WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1500 WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1502 WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3); in gaudi_init_e2e()
1503 WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3); in gaudi_init_e2e()
1504 WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_PCI_WR_SIZE, 162); in gaudi_init_e2e()
1505 WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_PCI_RD_SIZE, 338); in gaudi_init_e2e()
1508 WREG32(mmSIF_RTR_CTRL_0_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1509 WREG32(mmSIF_RTR_CTRL_0_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1510 WREG32(mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1511 WREG32(mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1513 WREG32(mmSIF_RTR_CTRL_1_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1514 WREG32(mmSIF_RTR_CTRL_1_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1515 WREG32(mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1516 WREG32(mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1518 WREG32(mmSIF_RTR_CTRL_2_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1519 WREG32(mmSIF_RTR_CTRL_2_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1520 WREG32(mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1521 WREG32(mmSIF_RTR_CTRL_2_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1523 WREG32(mmSIF_RTR_CTRL_3_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1524 WREG32(mmSIF_RTR_CTRL_3_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1525 WREG32(mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1526 WREG32(mmSIF_RTR_CTRL_3_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1528 WREG32(mmSIF_RTR_CTRL_4_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1529 WREG32(mmSIF_RTR_CTRL_4_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1530 WREG32(mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1531 WREG32(mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1533 WREG32(mmSIF_RTR_CTRL_5_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1534 WREG32(mmSIF_RTR_CTRL_5_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1535 WREG32(mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1536 WREG32(mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1538 WREG32(mmSIF_RTR_CTRL_6_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1539 WREG32(mmSIF_RTR_CTRL_6_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1540 WREG32(mmSIF_RTR_CTRL_6_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1541 WREG32(mmSIF_RTR_CTRL_6_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1543 WREG32(mmSIF_RTR_CTRL_7_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1544 WREG32(mmSIF_RTR_CTRL_7_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1545 WREG32(mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1546 WREG32(mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1548 WREG32(mmNIF_RTR_CTRL_0_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1549 WREG32(mmNIF_RTR_CTRL_0_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1550 WREG32(mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1551 WREG32(mmNIF_RTR_CTRL_0_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1553 WREG32(mmNIF_RTR_CTRL_1_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1554 WREG32(mmNIF_RTR_CTRL_1_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1555 WREG32(mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1556 WREG32(mmNIF_RTR_CTRL_1_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1558 WREG32(mmNIF_RTR_CTRL_2_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1559 WREG32(mmNIF_RTR_CTRL_2_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1560 WREG32(mmNIF_RTR_CTRL_2_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1561 WREG32(mmNIF_RTR_CTRL_2_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1563 WREG32(mmNIF_RTR_CTRL_3_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1564 WREG32(mmNIF_RTR_CTRL_3_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1565 WREG32(mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1566 WREG32(mmNIF_RTR_CTRL_3_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1568 WREG32(mmNIF_RTR_CTRL_4_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1569 WREG32(mmNIF_RTR_CTRL_4_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1570 WREG32(mmNIF_RTR_CTRL_4_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1571 WREG32(mmNIF_RTR_CTRL_4_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1573 WREG32(mmNIF_RTR_CTRL_5_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1574 WREG32(mmNIF_RTR_CTRL_5_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1575 WREG32(mmNIF_RTR_CTRL_5_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1576 WREG32(mmNIF_RTR_CTRL_5_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1578 WREG32(mmNIF_RTR_CTRL_6_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1579 WREG32(mmNIF_RTR_CTRL_6_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1580 WREG32(mmNIF_RTR_CTRL_6_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1581 WREG32(mmNIF_RTR_CTRL_6_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1583 WREG32(mmNIF_RTR_CTRL_7_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1584 WREG32(mmNIF_RTR_CTRL_7_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1585 WREG32(mmNIF_RTR_CTRL_7_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1586 WREG32(mmNIF_RTR_CTRL_7_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1588 WREG32(mmDMA_IF_E_N_DOWN_CH0_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1589 WREG32(mmDMA_IF_E_N_DOWN_CH0_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1590 WREG32(mmDMA_IF_E_N_DOWN_CH0_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1591 WREG32(mmDMA_IF_E_N_DOWN_CH0_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1593 WREG32(mmDMA_IF_E_N_DOWN_CH1_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1594 WREG32(mmDMA_IF_E_N_DOWN_CH1_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1595 WREG32(mmDMA_IF_E_N_DOWN_CH1_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1596 WREG32(mmDMA_IF_E_N_DOWN_CH1_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1598 WREG32(mmDMA_IF_E_S_DOWN_CH0_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1599 WREG32(mmDMA_IF_E_S_DOWN_CH0_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1600 WREG32(mmDMA_IF_E_S_DOWN_CH0_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1601 WREG32(mmDMA_IF_E_S_DOWN_CH0_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1603 WREG32(mmDMA_IF_E_S_DOWN_CH1_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1604 WREG32(mmDMA_IF_E_S_DOWN_CH1_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1605 WREG32(mmDMA_IF_E_S_DOWN_CH1_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1606 WREG32(mmDMA_IF_E_S_DOWN_CH1_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1608 WREG32(mmDMA_IF_W_N_DOWN_CH0_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1609 WREG32(mmDMA_IF_W_N_DOWN_CH0_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1610 WREG32(mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1611 WREG32(mmDMA_IF_W_N_DOWN_CH0_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1613 WREG32(mmDMA_IF_W_N_DOWN_CH1_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1614 WREG32(mmDMA_IF_W_N_DOWN_CH1_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1615 WREG32(mmDMA_IF_W_N_DOWN_CH1_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1616 WREG32(mmDMA_IF_W_N_DOWN_CH1_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1618 WREG32(mmDMA_IF_W_S_DOWN_CH0_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1619 WREG32(mmDMA_IF_W_S_DOWN_CH0_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1620 WREG32(mmDMA_IF_W_S_DOWN_CH0_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1621 WREG32(mmDMA_IF_W_S_DOWN_CH0_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1623 WREG32(mmDMA_IF_W_S_DOWN_CH1_NL_HBM_SEL_0, 0x21); in gaudi_init_e2e()
1624 WREG32(mmDMA_IF_W_S_DOWN_CH1_NL_HBM_SEL_1, 0x22); in gaudi_init_e2e()
1625 WREG32(mmDMA_IF_W_S_DOWN_CH1_NL_HBM_OFFSET_18, 0x1F); in gaudi_init_e2e()
1626 WREG32(mmDMA_IF_W_S_DOWN_CH1_NL_HBM_PC_SEL_3, 0x20); in gaudi_init_e2e()
1629 WREG32(mmSIF_RTR_CTRL_0_E2E_HBM_EN, in gaudi_init_e2e()
1631 WREG32(mmSIF_RTR_CTRL_0_E2E_PCI_EN, in gaudi_init_e2e()
1634 WREG32(mmSIF_RTR_CTRL_1_E2E_HBM_EN, in gaudi_init_e2e()
1636 WREG32(mmSIF_RTR_CTRL_1_E2E_PCI_EN, in gaudi_init_e2e()
1639 WREG32(mmSIF_RTR_CTRL_2_E2E_HBM_EN, in gaudi_init_e2e()
1641 WREG32(mmSIF_RTR_CTRL_2_E2E_PCI_EN, in gaudi_init_e2e()
1644 WREG32(mmSIF_RTR_CTRL_3_E2E_HBM_EN, in gaudi_init_e2e()
1646 WREG32(mmSIF_RTR_CTRL_3_E2E_PCI_EN, in gaudi_init_e2e()
1649 WREG32(mmSIF_RTR_CTRL_4_E2E_HBM_EN, in gaudi_init_e2e()
1651 WREG32(mmSIF_RTR_CTRL_4_E2E_PCI_EN, in gaudi_init_e2e()
1654 WREG32(mmSIF_RTR_CTRL_5_E2E_HBM_EN, in gaudi_init_e2e()
1656 WREG32(mmSIF_RTR_CTRL_5_E2E_PCI_EN, in gaudi_init_e2e()
1659 WREG32(mmSIF_RTR_CTRL_6_E2E_HBM_EN, in gaudi_init_e2e()
1661 WREG32(mmSIF_RTR_CTRL_6_E2E_PCI_EN, in gaudi_init_e2e()
1664 WREG32(mmSIF_RTR_CTRL_7_E2E_HBM_EN, in gaudi_init_e2e()
1666 WREG32(mmSIF_RTR_CTRL_7_E2E_PCI_EN, in gaudi_init_e2e()
1669 WREG32(mmNIF_RTR_CTRL_0_E2E_HBM_EN, in gaudi_init_e2e()
1671 WREG32(mmNIF_RTR_CTRL_0_E2E_PCI_EN, in gaudi_init_e2e()
1674 WREG32(mmNIF_RTR_CTRL_1_E2E_HBM_EN, in gaudi_init_e2e()
1676 WREG32(mmNIF_RTR_CTRL_1_E2E_PCI_EN, in gaudi_init_e2e()
1679 WREG32(mmNIF_RTR_CTRL_2_E2E_HBM_EN, in gaudi_init_e2e()
1681 WREG32(mmNIF_RTR_CTRL_2_E2E_PCI_EN, in gaudi_init_e2e()
1684 WREG32(mmNIF_RTR_CTRL_3_E2E_HBM_EN, in gaudi_init_e2e()
1686 WREG32(mmNIF_RTR_CTRL_3_E2E_PCI_EN, in gaudi_init_e2e()
1689 WREG32(mmNIF_RTR_CTRL_4_E2E_HBM_EN, in gaudi_init_e2e()
1691 WREG32(mmNIF_RTR_CTRL_4_E2E_PCI_EN, in gaudi_init_e2e()
1694 WREG32(mmNIF_RTR_CTRL_5_E2E_HBM_EN, in gaudi_init_e2e()
1696 WREG32(mmNIF_RTR_CTRL_5_E2E_PCI_EN, in gaudi_init_e2e()
1699 WREG32(mmNIF_RTR_CTRL_6_E2E_HBM_EN, in gaudi_init_e2e()
1701 WREG32(mmNIF_RTR_CTRL_6_E2E_PCI_EN, in gaudi_init_e2e()
1704 WREG32(mmNIF_RTR_CTRL_7_E2E_HBM_EN, in gaudi_init_e2e()
1706 WREG32(mmNIF_RTR_CTRL_7_E2E_PCI_EN, in gaudi_init_e2e()
1709 WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_HBM_EN, in gaudi_init_e2e()
1711 WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_PCI_EN, in gaudi_init_e2e()
1714 WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_HBM_EN, in gaudi_init_e2e()
1716 WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_PCI_EN, in gaudi_init_e2e()
1719 WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_EN, in gaudi_init_e2e()
1721 WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_EN, in gaudi_init_e2e()
1724 WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_HBM_EN, in gaudi_init_e2e()
1726 WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_PCI_EN, in gaudi_init_e2e()
1729 WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_EN, in gaudi_init_e2e()
1731 WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_EN, in gaudi_init_e2e()
1734 WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_HBM_EN, in gaudi_init_e2e()
1736 WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_PCI_EN, in gaudi_init_e2e()
1739 WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_HBM_EN, in gaudi_init_e2e()
1741 WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_PCI_EN, in gaudi_init_e2e()
1744 WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_HBM_EN, in gaudi_init_e2e()
1746 WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_PCI_EN, in gaudi_init_e2e()
1759 WREG32(mmDMA_IF_E_N_HBM0_WR_CRED_CNT, hbm0_wr); in gaudi_init_hbm_cred()
1760 WREG32(mmDMA_IF_E_N_HBM1_WR_CRED_CNT, hbm1_wr); in gaudi_init_hbm_cred()
1761 WREG32(mmDMA_IF_E_N_HBM0_RD_CRED_CNT, hbm0_rd); in gaudi_init_hbm_cred()
1762 WREG32(mmDMA_IF_E_N_HBM1_RD_CRED_CNT, hbm1_rd); in gaudi_init_hbm_cred()
1764 WREG32(mmDMA_IF_E_S_HBM0_WR_CRED_CNT, hbm0_wr); in gaudi_init_hbm_cred()
1765 WREG32(mmDMA_IF_E_S_HBM1_WR_CRED_CNT, hbm1_wr); in gaudi_init_hbm_cred()
1766 WREG32(mmDMA_IF_E_S_HBM0_RD_CRED_CNT, hbm0_rd); in gaudi_init_hbm_cred()
1767 WREG32(mmDMA_IF_E_S_HBM1_RD_CRED_CNT, hbm1_rd); in gaudi_init_hbm_cred()
1769 WREG32(mmDMA_IF_W_N_HBM0_WR_CRED_CNT, hbm0_wr); in gaudi_init_hbm_cred()
1770 WREG32(mmDMA_IF_W_N_HBM1_WR_CRED_CNT, hbm1_wr); in gaudi_init_hbm_cred()
1771 WREG32(mmDMA_IF_W_N_HBM0_RD_CRED_CNT, hbm0_rd); in gaudi_init_hbm_cred()
1772 WREG32(mmDMA_IF_W_N_HBM1_RD_CRED_CNT, hbm1_rd); in gaudi_init_hbm_cred()
1774 WREG32(mmDMA_IF_W_S_HBM0_WR_CRED_CNT, hbm0_wr); in gaudi_init_hbm_cred()
1775 WREG32(mmDMA_IF_W_S_HBM1_WR_CRED_CNT, hbm1_wr); in gaudi_init_hbm_cred()
1776 WREG32(mmDMA_IF_W_S_HBM0_RD_CRED_CNT, hbm0_rd); in gaudi_init_hbm_cred()
1777 WREG32(mmDMA_IF_W_S_HBM1_RD_CRED_CNT, hbm1_rd); in gaudi_init_hbm_cred()
1779 WREG32(mmDMA_IF_E_N_HBM_CRED_EN_0, in gaudi_init_hbm_cred()
1782 WREG32(mmDMA_IF_E_S_HBM_CRED_EN_0, in gaudi_init_hbm_cred()
1785 WREG32(mmDMA_IF_W_N_HBM_CRED_EN_0, in gaudi_init_hbm_cred()
1788 WREG32(mmDMA_IF_W_S_HBM_CRED_EN_0, in gaudi_init_hbm_cred()
1792 WREG32(mmDMA_IF_E_N_HBM_CRED_EN_1, in gaudi_init_hbm_cred()
1795 WREG32(mmDMA_IF_E_S_HBM_CRED_EN_1, in gaudi_init_hbm_cred()
1798 WREG32(mmDMA_IF_W_N_HBM_CRED_EN_1, in gaudi_init_hbm_cred()
1801 WREG32(mmDMA_IF_W_S_HBM_CRED_EN_1, in gaudi_init_hbm_cred()
1821 WREG32(mmTPC0_CFG_TPC_INTR_MASK + tpc_offset, 0x8FFF); in gaudi_init_golden_registers()
1831 WREG32(mmMME0_CTRL_EUS_ROLLUP_CNT_ADD, 3); in gaudi_init_golden_registers()
1832 WREG32(mmMME1_CTRL_EUS_ROLLUP_CNT_ADD, 3); in gaudi_init_golden_registers()
1833 WREG32(mmMME2_CTRL_EUS_ROLLUP_CNT_ADD, 3); in gaudi_init_golden_registers()
1834 WREG32(mmMME3_CTRL_EUS_ROLLUP_CNT_ADD, 3); in gaudi_init_golden_registers()
1866 WREG32(mmDMA0_QM_PQ_BASE_LO_0 + q_off, lower_32_bits(qman_pq_addr)); in gaudi_init_pci_dma_qman()
1867 WREG32(mmDMA0_QM_PQ_BASE_HI_0 + q_off, upper_32_bits(qman_pq_addr)); in gaudi_init_pci_dma_qman()
1869 WREG32(mmDMA0_QM_PQ_SIZE_0 + q_off, ilog2(HL_QUEUE_LENGTH)); in gaudi_init_pci_dma_qman()
1870 WREG32(mmDMA0_QM_PQ_PI_0 + q_off, 0); in gaudi_init_pci_dma_qman()
1871 WREG32(mmDMA0_QM_PQ_CI_0 + q_off, 0); in gaudi_init_pci_dma_qman()
1873 WREG32(mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, QMAN_LDMA_SIZE_OFFSET); in gaudi_init_pci_dma_qman()
1874 WREG32(mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_pci_dma_qman()
1876 WREG32(mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_pci_dma_qman()
1879 WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_en_lo); in gaudi_init_pci_dma_qman()
1880 WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_en_hi); in gaudi_init_pci_dma_qman()
1881 WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_en_lo); in gaudi_init_pci_dma_qman()
1882 WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_en_hi); in gaudi_init_pci_dma_qman()
1883 WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_0 + q_off, mtr_base_ws_lo); in gaudi_init_pci_dma_qman()
1884 WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 + q_off, mtr_base_ws_hi); in gaudi_init_pci_dma_qman()
1885 WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off, so_base_ws_lo); in gaudi_init_pci_dma_qman()
1886 WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 + q_off, so_base_ws_hi); in gaudi_init_pci_dma_qman()
1888 WREG32(mmDMA0_QM_CP_BARRIER_CFG_0 + q_off, 0x100); in gaudi_init_pci_dma_qman()
1899 WREG32(mmDMA0_QM_GLBL_ERR_CFG + dma_qm_offset, dma_qm_err_cfg); in gaudi_init_pci_dma_qman()
1900 WREG32(mmDMA0_QM_GLBL_ERR_ADDR_LO + dma_qm_offset, in gaudi_init_pci_dma_qman()
1903 WREG32(mmDMA0_QM_GLBL_ERR_ADDR_HI + dma_qm_offset, in gaudi_init_pci_dma_qman()
1906 WREG32(mmDMA0_QM_GLBL_ERR_WDATA + dma_qm_offset, in gaudi_init_pci_dma_qman()
1910 WREG32(mmDMA0_QM_ARB_ERR_MSG_EN + dma_qm_offset, in gaudi_init_pci_dma_qman()
1914 WREG32(mmDMA0_QM_ARB_SLV_CHOISE_WDT + dma_qm_offset, in gaudi_init_pci_dma_qman()
1917 WREG32(mmDMA0_QM_GLBL_PROT + dma_qm_offset, in gaudi_init_pci_dma_qman()
1920 WREG32(mmDMA0_QM_GLBL_CFG1 + dma_qm_offset, 0); in gaudi_init_pci_dma_qman()
1930 WREG32(mmDMA0_CORE_RD_MAX_OUTSTAND + dma_offset, 0); in gaudi_init_dma_core()
1931 WREG32(mmDMA0_CORE_RD_MAX_SIZE + dma_offset, 0); in gaudi_init_dma_core()
1934 WREG32(mmDMA0_CORE_LBW_MAX_OUTSTAND + dma_offset, 15); in gaudi_init_dma_core()
1940 WREG32(mmDMA0_CORE_ERR_CFG + dma_offset, dma_err_cfg); in gaudi_init_dma_core()
1941 WREG32(mmDMA0_CORE_ERRMSG_ADDR_LO + dma_offset, in gaudi_init_dma_core()
1943 WREG32(mmDMA0_CORE_ERRMSG_ADDR_HI + dma_offset, in gaudi_init_dma_core()
1945 WREG32(mmDMA0_CORE_ERRMSG_WDATA + dma_offset, in gaudi_init_dma_core()
1947 WREG32(mmDMA0_CORE_PROT + dma_offset, in gaudi_init_dma_core()
1950 WREG32(mmDMA0_CORE_SECURE_PROPS + dma_offset, in gaudi_init_dma_core()
1952 WREG32(mmDMA0_CORE_CFG_0 + dma_offset, 1 << DMA0_CORE_CFG_0_EN_SHIFT); in gaudi_init_dma_core()
1960 WREG32(mmDMA0_QM_GLBL_CFG0 + dma_qm_offset, enable_mask); in gaudi_enable_qman()
2026 WREG32(mmDMA0_QM_PQ_BASE_LO_0 + q_off, in gaudi_init_hbm_dma_qman()
2028 WREG32(mmDMA0_QM_PQ_BASE_HI_0 + q_off, in gaudi_init_hbm_dma_qman()
2031 WREG32(mmDMA0_QM_PQ_SIZE_0 + q_off, ilog2(HBM_DMA_QMAN_LENGTH)); in gaudi_init_hbm_dma_qman()
2032 WREG32(mmDMA0_QM_PQ_PI_0 + q_off, 0); in gaudi_init_hbm_dma_qman()
2033 WREG32(mmDMA0_QM_PQ_CI_0 + q_off, 0); in gaudi_init_hbm_dma_qman()
2035 WREG32(mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, in gaudi_init_hbm_dma_qman()
2037 WREG32(mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_hbm_dma_qman()
2039 WREG32(mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_hbm_dma_qman()
2042 WREG32(mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, in gaudi_init_hbm_dma_qman()
2044 WREG32(mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_hbm_dma_qman()
2046 WREG32(mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_hbm_dma_qman()
2055 WREG32(mmDMA0_QM_GLBL_ERR_CFG + dma_qm_offset, dma_qm_err_cfg); in gaudi_init_hbm_dma_qman()
2057 WREG32(mmDMA0_QM_GLBL_ERR_ADDR_LO + dma_qm_offset, in gaudi_init_hbm_dma_qman()
2060 WREG32(mmDMA0_QM_GLBL_ERR_ADDR_HI + dma_qm_offset, in gaudi_init_hbm_dma_qman()
2063 WREG32(mmDMA0_QM_GLBL_ERR_WDATA + dma_qm_offset, in gaudi_init_hbm_dma_qman()
2067 WREG32(mmDMA0_QM_ARB_ERR_MSG_EN + dma_qm_offset, in gaudi_init_hbm_dma_qman()
2071 WREG32(mmDMA0_QM_ARB_SLV_CHOISE_WDT + dma_qm_offset, in gaudi_init_hbm_dma_qman()
2074 WREG32(mmDMA0_QM_GLBL_CFG1 + dma_qm_offset, 0); in gaudi_init_hbm_dma_qman()
2075 WREG32(mmDMA0_QM_GLBL_PROT + dma_qm_offset, in gaudi_init_hbm_dma_qman()
2079 WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_lo); in gaudi_init_hbm_dma_qman()
2080 WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_hi); in gaudi_init_hbm_dma_qman()
2081 WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_lo); in gaudi_init_hbm_dma_qman()
2082 WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_hi); in gaudi_init_hbm_dma_qman()
2142 WREG32(mmMME0_QM_PQ_BASE_LO_0 + q_off, in gaudi_init_mme_qman()
2144 WREG32(mmMME0_QM_PQ_BASE_HI_0 + q_off, in gaudi_init_mme_qman()
2147 WREG32(mmMME0_QM_PQ_SIZE_0 + q_off, ilog2(MME_QMAN_LENGTH)); in gaudi_init_mme_qman()
2148 WREG32(mmMME0_QM_PQ_PI_0 + q_off, 0); in gaudi_init_mme_qman()
2149 WREG32(mmMME0_QM_PQ_CI_0 + q_off, 0); in gaudi_init_mme_qman()
2151 WREG32(mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, in gaudi_init_mme_qman()
2153 WREG32(mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_mme_qman()
2155 WREG32(mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_mme_qman()
2158 WREG32(mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, in gaudi_init_mme_qman()
2160 WREG32(mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_mme_qman()
2162 WREG32(mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_mme_qman()
2174 WREG32(mmMME0_QM_GLBL_ERR_CFG + mme_offset, mme_qm_err_cfg); in gaudi_init_mme_qman()
2175 WREG32(mmMME0_QM_GLBL_ERR_ADDR_LO + mme_offset, in gaudi_init_mme_qman()
2178 WREG32(mmMME0_QM_GLBL_ERR_ADDR_HI + mme_offset, in gaudi_init_mme_qman()
2181 WREG32(mmMME0_QM_GLBL_ERR_WDATA + mme_offset, in gaudi_init_mme_qman()
2185 WREG32(mmMME0_QM_ARB_ERR_MSG_EN + mme_offset, in gaudi_init_mme_qman()
2189 WREG32(mmMME0_QM_ARB_SLV_CHOISE_WDT + mme_offset, in gaudi_init_mme_qman()
2192 WREG32(mmMME0_QM_GLBL_CFG1 + mme_offset, 0); in gaudi_init_mme_qman()
2193 WREG32(mmMME0_QM_GLBL_PROT + mme_offset, in gaudi_init_mme_qman()
2197 WREG32(mmMME0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_lo); in gaudi_init_mme_qman()
2198 WREG32(mmMME0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_hi); in gaudi_init_mme_qman()
2199 WREG32(mmMME0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_lo); in gaudi_init_mme_qman()
2200 WREG32(mmMME0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_hi); in gaudi_init_mme_qman()
2236 WREG32(mmMME2_QM_GLBL_CFG0, QMAN_MME_ENABLE); in gaudi_init_mme_qmans()
2237 WREG32(mmMME0_QM_GLBL_CFG0, QMAN_MME_ENABLE); in gaudi_init_mme_qmans()
2262 WREG32(mmTPC0_QM_PQ_BASE_LO_0 + q_off, in gaudi_init_tpc_qman()
2264 WREG32(mmTPC0_QM_PQ_BASE_HI_0 + q_off, in gaudi_init_tpc_qman()
2267 WREG32(mmTPC0_QM_PQ_SIZE_0 + q_off, ilog2(TPC_QMAN_LENGTH)); in gaudi_init_tpc_qman()
2268 WREG32(mmTPC0_QM_PQ_PI_0 + q_off, 0); in gaudi_init_tpc_qman()
2269 WREG32(mmTPC0_QM_PQ_CI_0 + q_off, 0); in gaudi_init_tpc_qman()
2271 WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, in gaudi_init_tpc_qman()
2273 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_tpc_qman()
2275 WREG32(mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_tpc_qman()
2278 WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, in gaudi_init_tpc_qman()
2280 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off, in gaudi_init_tpc_qman()
2282 WREG32(mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off, in gaudi_init_tpc_qman()
2295 WREG32(mmTPC0_QM_GLBL_ERR_CFG + tpc_offset, tpc_qm_err_cfg); in gaudi_init_tpc_qman()
2296 WREG32(mmTPC0_QM_GLBL_ERR_ADDR_LO + tpc_offset, in gaudi_init_tpc_qman()
2299 WREG32(mmTPC0_QM_GLBL_ERR_ADDR_HI + tpc_offset, in gaudi_init_tpc_qman()
2302 WREG32(mmTPC0_QM_GLBL_ERR_WDATA + tpc_offset, in gaudi_init_tpc_qman()
2306 WREG32(mmTPC0_QM_ARB_ERR_MSG_EN + tpc_offset, in gaudi_init_tpc_qman()
2310 WREG32(mmTPC0_QM_ARB_SLV_CHOISE_WDT + tpc_offset, in gaudi_init_tpc_qman()
2313 WREG32(mmTPC0_QM_GLBL_CFG1 + tpc_offset, 0); in gaudi_init_tpc_qman()
2314 WREG32(mmTPC0_QM_GLBL_PROT + tpc_offset, in gaudi_init_tpc_qman()
2318 WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_lo); in gaudi_init_tpc_qman()
2319 WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_hi); in gaudi_init_tpc_qman()
2320 WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_lo); in gaudi_init_tpc_qman()
2321 WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_hi); in gaudi_init_tpc_qman()
2354 WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset, in gaudi_init_tpc_qmans()
2359 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + tpc_id * tpc_delta, in gaudi_init_tpc_qmans()
2376 WREG32(mmDMA0_QM_GLBL_CFG0, 0); in gaudi_disable_pci_dma_qmans()
2377 WREG32(mmDMA1_QM_GLBL_CFG0, 0); in gaudi_disable_pci_dma_qmans()
2378 WREG32(mmDMA5_QM_GLBL_CFG0, 0); in gaudi_disable_pci_dma_qmans()
2388 WREG32(mmDMA2_QM_GLBL_CFG0, 0); in gaudi_disable_hbm_dma_qmans()
2389 WREG32(mmDMA3_QM_GLBL_CFG0, 0); in gaudi_disable_hbm_dma_qmans()
2390 WREG32(mmDMA4_QM_GLBL_CFG0, 0); in gaudi_disable_hbm_dma_qmans()
2391 WREG32(mmDMA6_QM_GLBL_CFG0, 0); in gaudi_disable_hbm_dma_qmans()
2392 WREG32(mmDMA7_QM_GLBL_CFG0, 0); in gaudi_disable_hbm_dma_qmans()
2402 WREG32(mmMME2_QM_GLBL_CFG0, 0); in gaudi_disable_mme_qmans()
2403 WREG32(mmMME0_QM_GLBL_CFG0, 0); in gaudi_disable_mme_qmans()
2416 WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset, 0); in gaudi_disable_tpc_qmans()
2429 WREG32(mmDMA0_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_pci_dma_qmans()
2430 WREG32(mmDMA1_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_pci_dma_qmans()
2431 WREG32(mmDMA5_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_pci_dma_qmans()
2443 WREG32(mmDMA2_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_hbm_dma_qmans()
2444 WREG32(mmDMA3_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_hbm_dma_qmans()
2445 WREG32(mmDMA4_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_hbm_dma_qmans()
2446 WREG32(mmDMA6_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_hbm_dma_qmans()
2447 WREG32(mmDMA7_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_hbm_dma_qmans()
2458 WREG32(mmMME2_QM_GLBL_CFG1, 0x1F << MME0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_mme_qmans()
2459 WREG32(mmMME0_QM_GLBL_CFG1, 0x1F << MME0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_mme_qmans()
2469 WREG32(mmTPC0_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2470 WREG32(mmTPC1_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2471 WREG32(mmTPC2_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2472 WREG32(mmTPC3_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2473 WREG32(mmTPC4_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2474 WREG32(mmTPC5_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2475 WREG32(mmTPC6_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2476 WREG32(mmTPC7_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_tpc_qmans()
2486 WREG32(mmDMA0_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_pci_dma_stall()
2487 WREG32(mmDMA1_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_pci_dma_stall()
2488 WREG32(mmDMA5_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_pci_dma_stall()
2498 WREG32(mmDMA2_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_hbm_dma_stall()
2499 WREG32(mmDMA3_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_hbm_dma_stall()
2500 WREG32(mmDMA4_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_hbm_dma_stall()
2501 WREG32(mmDMA6_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_hbm_dma_stall()
2502 WREG32(mmDMA7_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_hbm_dma_stall()
2513 WREG32(mmMME0_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2514 WREG32(mmMME0_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2515 WREG32(mmMME0_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2516 WREG32(mmMME0_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2517 WREG32(mmMME1_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2518 WREG32(mmMME1_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2519 WREG32(mmMME1_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2520 WREG32(mmMME1_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2521 WREG32(mmMME2_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2522 WREG32(mmMME2_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2523 WREG32(mmMME2_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2524 WREG32(mmMME2_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2525 WREG32(mmMME3_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2526 WREG32(mmMME3_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT); in gaudi_mme_stall()
2527 WREG32(mmMME3_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2528 WREG32(mmMME3_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT); in gaudi_mme_stall()
2538 WREG32(mmTPC0_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2539 WREG32(mmTPC1_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2540 WREG32(mmTPC2_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2541 WREG32(mmTPC3_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2542 WREG32(mmTPC4_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2543 WREG32(mmTPC5_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2544 WREG32(mmTPC6_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2545 WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in gaudi_tpc_stall()
2566 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, in gaudi_set_clock_gating()
2568 WREG32(mmDMA0_QM_CGM_CFG + qman_offset, in gaudi_set_clock_gating()
2577 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, in gaudi_set_clock_gating()
2579 WREG32(mmDMA0_QM_CGM_CFG + qman_offset, in gaudi_set_clock_gating()
2584 WREG32(mmMME0_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0); in gaudi_set_clock_gating()
2585 WREG32(mmMME0_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0); in gaudi_set_clock_gating()
2588 WREG32(mmMME2_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0); in gaudi_set_clock_gating()
2589 WREG32(mmMME2_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0); in gaudi_set_clock_gating()
2595 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset, in gaudi_set_clock_gating()
2597 WREG32(mmTPC0_QM_CGM_CFG + qman_offset, in gaudi_set_clock_gating()
2616 WREG32(mmDMA0_QM_CGM_CFG + qman_offset, 0); in gaudi_disable_clock_gating()
2617 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, 0); in gaudi_disable_clock_gating()
2622 WREG32(mmMME0_QM_CGM_CFG, 0); in gaudi_disable_clock_gating()
2623 WREG32(mmMME0_QM_CGM_CFG1, 0); in gaudi_disable_clock_gating()
2624 WREG32(mmMME2_QM_CGM_CFG, 0); in gaudi_disable_clock_gating()
2625 WREG32(mmMME2_QM_CGM_CFG1, 0); in gaudi_disable_clock_gating()
2628 WREG32(mmTPC0_QM_CGM_CFG + qman_offset, 0); in gaudi_disable_clock_gating()
2629 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset, 0); in gaudi_disable_clock_gating()
2640 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_enable_timestamp()
2643 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in gaudi_enable_timestamp()
2644 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in gaudi_enable_timestamp()
2647 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in gaudi_enable_timestamp()
2653 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_disable_timestamp()
2723 WREG32(mmSTLB_CACHE_INV_BASE_39_8, MMU_CACHE_MNG_ADDR >> 8); in gaudi_mmu_init()
2724 WREG32(mmSTLB_CACHE_INV_BASE_49_40, MMU_CACHE_MNG_ADDR >> 40); in gaudi_mmu_init()
2728 WREG32(mmMMU_UP_MMU_ENABLE, 1); in gaudi_mmu_init()
2729 WREG32(mmMMU_UP_SPI_MASK, 0xF); in gaudi_mmu_init()
2731 WREG32(mmSTLB_HOP_CONFIGURATION, in gaudi_mmu_init()
2819 WREG32(mmCPU_IF_CPU_MSB_ADDR, hdev->cpu_pci_msb_addr); in gaudi_init_cpu()
2853 WREG32(mmCPU_IF_PQ_BASE_ADDR_LOW, lower_32_bits(cpu_pq->bus_address)); in gaudi_init_cpu_queues()
2854 WREG32(mmCPU_IF_PQ_BASE_ADDR_HIGH, upper_32_bits(cpu_pq->bus_address)); in gaudi_init_cpu_queues()
2856 WREG32(mmCPU_IF_EQ_BASE_ADDR_LOW, lower_32_bits(eq->bus_address)); in gaudi_init_cpu_queues()
2857 WREG32(mmCPU_IF_EQ_BASE_ADDR_HIGH, upper_32_bits(eq->bus_address)); in gaudi_init_cpu_queues()
2859 WREG32(mmCPU_IF_CQ_BASE_ADDR_LOW, in gaudi_init_cpu_queues()
2861 WREG32(mmCPU_IF_CQ_BASE_ADDR_HIGH, in gaudi_init_cpu_queues()
2864 WREG32(mmCPU_IF_PQ_LENGTH, HL_QUEUE_SIZE_IN_BYTES); in gaudi_init_cpu_queues()
2865 WREG32(mmCPU_IF_EQ_LENGTH, HL_EQ_SIZE_IN_BYTES); in gaudi_init_cpu_queues()
2866 WREG32(mmCPU_IF_CQ_LENGTH, HL_CPU_ACCESSIBLE_MEM_SIZE); in gaudi_init_cpu_queues()
2869 WREG32(mmCPU_IF_EQ_RD_OFFS, 0); in gaudi_init_cpu_queues()
2871 WREG32(mmCPU_IF_PF_PQ_PI, 0); in gaudi_init_cpu_queues()
2874 WREG32(mmCPU_IF_QUEUE_INIT, PQ_INIT_STATUS_READY_FOR_CP); in gaudi_init_cpu_queues()
2876 WREG32(mmCPU_IF_QUEUE_INIT, in gaudi_init_cpu_queues()
2879 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, GAUDI_EVENT_PI_UPDATE); in gaudi_init_cpu_queues()
2907 WREG32(mmPCIE_WRAP_LBW_PROT_OVR, in gaudi_pre_hw_init()
2922 WREG32(mmHW_STATE, HL_DEVICE_HW_STATE_DIRTY); in gaudi_pre_hw_init()
2927 WREG32(mmPSOC_GLOBAL_CONF_SOFT_RST_CFG_H, in gaudi_pre_hw_init()
2933 WREG32(mmPSOC_GLOBAL_CONF_SOFT_RST_CFG_L, CFG_RST_L_TPC_MASK); in gaudi_pre_hw_init()
2935 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG_H, in gaudi_pre_hw_init()
2945 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG_L, in gaudi_pre_hw_init()
3039 WREG32(mmPCIE_AUX_FLR_CTRL, (PCIE_AUX_FLR_CTRL_HW_CTRL_MASK | in gaudi_hw_fini()
3045 WREG32(mmPSOC_GLOBAL_CONF_KMD_MSG_TO_CPU, KMD_MSG_GOTO_WFE); in gaudi_hw_fini()
3046 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, GAUDI_EVENT_HALT_MACHINE); in gaudi_hw_fini()
3051 WREG32(mmPREBOOT_PCIE_EN, LKD_HARD_RESET_MAGIC); in gaudi_hw_fini()
3061 WREG32(mmPSOC_GLOBAL_CONF_BOOT_STRAP_PINS, boot_strap & ~0x2); in gaudi_hw_fini()
3064 WREG32(mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START, 1); in gaudi_hw_fini()
3066 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST, in gaudi_hw_fini()
3084 WREG32(mmPSOC_GLOBAL_CONF_BOOT_STRAP_PINS, boot_strap); in gaudi_hw_fini()
3375 WREG32(db_reg_offset, db_value); in gaudi_ring_doorbell()
3378 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in gaudi_ring_doorbell()
4332 WREG32(mmCPU_IF_EQ_RD_OFFS, val); in gaudi_update_eq_ci()
4376 WREG32(mmDMA0_CORE_ERR_CAUSE, err_cause); in gaudi_memset_device_memory()
4403 WREG32(mmDMA0_CORE_ERR_CAUSE, err_cause); in gaudi_memset_device_memory()
4419 WREG32(mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0 + i, 0); in gaudi_restore_sm_registers()
4420 WREG32(mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_SOB_OBJ_0 + i, 0); in gaudi_restore_sm_registers()
4421 WREG32(mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_SOB_OBJ_0 + i, 0); in gaudi_restore_sm_registers()
4425 WREG32(mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_STATUS_0 + i, 0); in gaudi_restore_sm_registers()
4426 WREG32(mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_MON_STATUS_0 + i, 0); in gaudi_restore_sm_registers()
4427 WREG32(mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_MON_STATUS_0 + i, 0); in gaudi_restore_sm_registers()
4433 WREG32(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 + i, 0); in gaudi_restore_sm_registers()
4438 WREG32(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_STATUS_0 + i, 0); in gaudi_restore_sm_registers()
4453 WREG32(mmDMA0_CORE_WR_COMP_ADDR_LO + dma_offset, in gaudi_restore_dma_registers()
4455 WREG32(mmDMA0_CORE_WR_COMP_ADDR_HI + dma_offset, in gaudi_restore_dma_registers()
4457 WREG32(mmDMA0_CORE_WR_COMP_WDATA + dma_offset, 0x80000001); in gaudi_restore_dma_registers()
4463 WREG32(mmDMA0_CORE_WR_AWUSER_31_11 + dma_offset, in gaudi_restore_dma_registers()
4475 WREG32(mmDMA0_QM_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()
4480 WREG32(mmMME0_QM_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()
4485 WREG32(mmTPC0_QM_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()
4600 WREG32(addr - CFG_BASE, val); in gaudi_debugfs_write32()
4698 WREG32(addr - CFG_BASE, lower_32_bits(val)); in gaudi_debugfs_write64()
4699 WREG32(addr + sizeof(u32) - CFG_BASE, in gaudi_debugfs_write64()
5187 WREG32(mmMMU_UP_RAZWI_WRITE_VLD, 0); in gaudi_print_razwi_info()
5194 WREG32(mmMMU_UP_RAZWI_READ_VLD, 0); in gaudi_print_razwi_info()
5216 WREG32(mmMMU_UP_PAGE_ERROR_CAPTURE, 0); in gaudi_print_mmu_error_info()
5228 WREG32(mmMMU_UP_ACCESS_ERROR_CAPTURE, 0); in gaudi_print_mmu_error_info()
5295 WREG32(params->block_address + GAUDI_ECC_MEM_SEL_OFFSET, in gaudi_extract_ecc_info()
5310 WREG32(params->block_address + GAUDI_ECC_MEM_INFO_CLR_OFFSET, reg); in gaudi_extract_ecc_info()
5354 WREG32(glbl_sts_addr + 4 * i, glbl_sts_clr_val); in gaudi_handle_qman_err_generic()
5582 WREG32(base + (ch * 0x1000) + 0x06C, 0x1F1F); in gaudi_hbm_read_interrupts()
5583 WREG32(base + (ch * 0x1000) + 0x07C, 0x1F1F); in gaudi_hbm_read_interrupts()
5662 WREG32(mmTPC0_CFG_TPC_INTR_CAUSE + tpc_offset, 0); in gaudi_tpc_read_interrupts()
5960 WREG32(mmSTLB_INV_PS, 3); in gaudi_mmu_invalidate_cache()
5961 WREG32(mmSTLB_CACHE_INV, gaudi->mmu_cache_inv_pi++); in gaudi_mmu_invalidate_cache()
5962 WREG32(mmSTLB_INV_PS, 2); in gaudi_mmu_invalidate_cache()
5972 WREG32(mmSTLB_INV_SET, 0); in gaudi_mmu_invalidate_cache()
6016 WREG32(mmSTLB_CACHE_INV, in gaudi_mmu_invalidate_cache_range()
6049 WREG32(MMU_ASID, asid); in gaudi_mmu_update_asid_hop0_addr()
6050 WREG32(MMU_HOP0_PA43_12, phys_addr >> MMU_HOP0_PA43_12_SHIFT); in gaudi_mmu_update_asid_hop0_addr()
6051 WREG32(MMU_HOP0_PA49_44, phys_addr >> MMU_HOP0_PA49_44_SHIFT); in gaudi_mmu_update_asid_hop0_addr()
6052 WREG32(MMU_BUSY, 0x80000000); in gaudi_mmu_update_asid_hop0_addr()
6273 WREG32(mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_LOW + offset, in gaudi_run_tpc_kernel()
6275 WREG32(mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_HIGH + offset, in gaudi_run_tpc_kernel()
6278 WREG32(mmTPC0_CFG_ICACHE_BASE_ADDERESS_LOW + offset, in gaudi_run_tpc_kernel()
6280 WREG32(mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH + offset, in gaudi_run_tpc_kernel()
6283 WREG32(mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_LO + offset, in gaudi_run_tpc_kernel()
6285 WREG32(mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_HI + offset, in gaudi_run_tpc_kernel()
6288 WREG32(mmTPC0_CFG_QM_SYNC_OBJECT_ADDR + offset, in gaudi_run_tpc_kernel()
6292 WREG32(mmTPC0_CFG_TPC_CMD + offset, in gaudi_run_tpc_kernel()
6317 WREG32(mmTPC0_CFG_TPC_EXECUTE + offset, in gaudi_run_tpc_kernel()
6590 WREG32(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 + hw_sob->sob_id * 4, in gaudi_reset_sob()