Lines Matching refs:WREG32
657 WREG32(mmDMA_QM_0_GLBL_PROT, QMAN_DMA_FULLY_TRUSTED); in goya_qman0_set_security()
659 WREG32(mmDMA_QM_0_GLBL_PROT, QMAN_DMA_PARTLY_TRUSTED); in goya_qman0_set_security()
747 WREG32(mmMMU_LOG2_DDR_SIZE, ilog2(prop->dram_size)); in goya_late_init()
756 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_late_init()
921 WREG32(mmDMA_QM_0_PQ_BASE_LO + reg_off, lower_32_bits(bus_address)); in goya_init_dma_qman()
922 WREG32(mmDMA_QM_0_PQ_BASE_HI + reg_off, upper_32_bits(bus_address)); in goya_init_dma_qman()
924 WREG32(mmDMA_QM_0_PQ_SIZE + reg_off, ilog2(HL_QUEUE_LENGTH)); in goya_init_dma_qman()
925 WREG32(mmDMA_QM_0_PQ_PI + reg_off, 0); in goya_init_dma_qman()
926 WREG32(mmDMA_QM_0_PQ_CI + reg_off, 0); in goya_init_dma_qman()
928 WREG32(mmDMA_QM_0_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo); in goya_init_dma_qman()
929 WREG32(mmDMA_QM_0_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi); in goya_init_dma_qman()
930 WREG32(mmDMA_QM_0_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo); in goya_init_dma_qman()
931 WREG32(mmDMA_QM_0_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi); in goya_init_dma_qman()
932 WREG32(mmDMA_QM_0_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo); in goya_init_dma_qman()
933 WREG32(mmDMA_QM_0_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi); in goya_init_dma_qman()
934 WREG32(mmDMA_QM_0_GLBL_ERR_WDATA + reg_off, in goya_init_dma_qman()
938 WREG32(mmDMA_QM_0_PQ_CFG1 + reg_off, 0x00020002); in goya_init_dma_qman()
939 WREG32(mmDMA_QM_0_CQ_CFG1 + reg_off, 0x00080008); in goya_init_dma_qman()
942 WREG32(mmDMA_QM_0_GLBL_PROT + reg_off, QMAN_DMA_PARTLY_TRUSTED); in goya_init_dma_qman()
944 WREG32(mmDMA_QM_0_GLBL_PROT + reg_off, QMAN_DMA_FULLY_TRUSTED); in goya_init_dma_qman()
949 WREG32(mmDMA_QM_0_GLBL_ERR_CFG + reg_off, dma_err_cfg); in goya_init_dma_qman()
950 WREG32(mmDMA_QM_0_GLBL_CFG0 + reg_off, QMAN_DMA_ENABLE); in goya_init_dma_qman()
964 WREG32(mmDMA_CH_0_ERRMSG_ADDR_LO + reg_off, gic_base_lo); in goya_init_dma_ch()
965 WREG32(mmDMA_CH_0_ERRMSG_ADDR_HI + reg_off, gic_base_hi); in goya_init_dma_ch()
966 WREG32(mmDMA_CH_0_ERRMSG_WDATA + reg_off, in goya_init_dma_ch()
975 WREG32(mmDMA_CH_0_WR_COMP_ADDR_HI + reg_off, upper_32_bits(sob_addr)); in goya_init_dma_ch()
976 WREG32(mmDMA_CH_0_WR_COMP_WDATA + reg_off, 0x80000001); in goya_init_dma_ch()
1020 WREG32(mmDMA_QM_0_GLBL_CFG0, 0); in goya_disable_external_queues()
1021 WREG32(mmDMA_QM_1_GLBL_CFG0, 0); in goya_disable_external_queues()
1022 WREG32(mmDMA_QM_2_GLBL_CFG0, 0); in goya_disable_external_queues()
1023 WREG32(mmDMA_QM_3_GLBL_CFG0, 0); in goya_disable_external_queues()
1024 WREG32(mmDMA_QM_4_GLBL_CFG0, 0); in goya_disable_external_queues()
1035 WREG32(cfg_reg, 1 << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in goya_stop_queue()
1163 WREG32(mmCPU_PQ_BASE_ADDR_LOW, lower_32_bits(cpu_pq->bus_address)); in goya_init_cpu_queues()
1164 WREG32(mmCPU_PQ_BASE_ADDR_HIGH, upper_32_bits(cpu_pq->bus_address)); in goya_init_cpu_queues()
1166 WREG32(mmCPU_EQ_BASE_ADDR_LOW, lower_32_bits(eq->bus_address)); in goya_init_cpu_queues()
1167 WREG32(mmCPU_EQ_BASE_ADDR_HIGH, upper_32_bits(eq->bus_address)); in goya_init_cpu_queues()
1169 WREG32(mmCPU_CQ_BASE_ADDR_LOW, in goya_init_cpu_queues()
1171 WREG32(mmCPU_CQ_BASE_ADDR_HIGH, in goya_init_cpu_queues()
1174 WREG32(mmCPU_PQ_LENGTH, HL_QUEUE_SIZE_IN_BYTES); in goya_init_cpu_queues()
1175 WREG32(mmCPU_EQ_LENGTH, HL_EQ_SIZE_IN_BYTES); in goya_init_cpu_queues()
1176 WREG32(mmCPU_CQ_LENGTH, HL_CPU_ACCESSIBLE_MEM_SIZE); in goya_init_cpu_queues()
1179 WREG32(mmCPU_EQ_CI, 0); in goya_init_cpu_queues()
1181 WREG32(mmCPU_IF_PF_PQ_PI, 0); in goya_init_cpu_queues()
1183 WREG32(mmCPU_PQ_INIT_STATUS, PQ_INIT_STATUS_READY_FOR_CP); in goya_init_cpu_queues()
1185 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_init_cpu_queues()
1208 WREG32(mmCPU_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1209 WREG32(mmCPU_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1210 WREG32(mmCPU_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1211 WREG32(mmCPU_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1213 WREG32(mmIC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1214 WREG32(mmIC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1215 WREG32(mmIC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1216 WREG32(mmIC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1218 WREG32(mmMC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1219 WREG32(mmMC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1220 WREG32(mmMC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1221 WREG32(mmMC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1223 WREG32(mmPSOC_MME_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1224 WREG32(mmPSOC_MME_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1225 WREG32(mmPSOC_MME_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1226 WREG32(mmPSOC_MME_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1228 WREG32(mmPSOC_PCI_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1229 WREG32(mmPSOC_PCI_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1230 WREG32(mmPSOC_PCI_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1231 WREG32(mmPSOC_PCI_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1233 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1234 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1235 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1236 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1238 WREG32(mmTPC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1239 WREG32(mmTPC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1240 WREG32(mmTPC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1241 WREG32(mmTPC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1246 WREG32(mmPSOC_MME_PLL_CLK_RLX_0, 0x100010); in goya_disable_clk_rlx()
1247 WREG32(mmIC_PLL_CLK_RLX_0, 0x100010); in goya_disable_clk_rlx()
1271 WREG32(mmTPC0_CFG_FUNC_MBIST_PAT + tpc_offset, val & 0xFFFFF000); in _goya_tpc_mbist_workaround()
1273 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_0 + tpc_offset, 0x37FF); in _goya_tpc_mbist_workaround()
1274 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_1 + tpc_offset, 0x303F); in _goya_tpc_mbist_workaround()
1275 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_2 + tpc_offset, 0x71FF); in _goya_tpc_mbist_workaround()
1276 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_3 + tpc_offset, 0x71FF); in _goya_tpc_mbist_workaround()
1277 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_4 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1278 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_5 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1279 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_6 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1280 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_7 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1281 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_8 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1282 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_9 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1310 WREG32(tpc_slm_offset + (slm_index << 2), 0); in _goya_tpc_mbist_workaround()
1366 WREG32(mmSRAM_Y0_X0_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1367 WREG32(mmSRAM_Y0_X1_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1368 WREG32(mmSRAM_Y0_X2_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1369 WREG32(mmSRAM_Y0_X3_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1370 WREG32(mmSRAM_Y0_X4_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1372 WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1373 WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1374 WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1375 WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1376 WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1379 WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_E_ARB + offset, 0x206); in goya_init_golden_registers()
1380 WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_E_ARB + offset, 0x206); in goya_init_golden_registers()
1381 WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_E_ARB + offset, 0x206); in goya_init_golden_registers()
1382 WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_E_ARB + offset, 0x207); in goya_init_golden_registers()
1383 WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_E_ARB + offset, 0x207); in goya_init_golden_registers()
1385 WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_W_ARB + offset, 0x207); in goya_init_golden_registers()
1386 WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_W_ARB + offset, 0x207); in goya_init_golden_registers()
1387 WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_W_ARB + offset, 0x206); in goya_init_golden_registers()
1388 WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_W_ARB + offset, 0x206); in goya_init_golden_registers()
1389 WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_W_ARB + offset, 0x206); in goya_init_golden_registers()
1391 WREG32(mmSRAM_Y0_X0_RTR_HBW_WR_RS_E_ARB + offset, 0x101); in goya_init_golden_registers()
1392 WREG32(mmSRAM_Y0_X1_RTR_HBW_WR_RS_E_ARB + offset, 0x102); in goya_init_golden_registers()
1393 WREG32(mmSRAM_Y0_X2_RTR_HBW_WR_RS_E_ARB + offset, 0x103); in goya_init_golden_registers()
1394 WREG32(mmSRAM_Y0_X3_RTR_HBW_WR_RS_E_ARB + offset, 0x104); in goya_init_golden_registers()
1395 WREG32(mmSRAM_Y0_X4_RTR_HBW_WR_RS_E_ARB + offset, 0x105); in goya_init_golden_registers()
1397 WREG32(mmSRAM_Y0_X0_RTR_HBW_WR_RS_W_ARB + offset, 0x105); in goya_init_golden_registers()
1398 WREG32(mmSRAM_Y0_X1_RTR_HBW_WR_RS_W_ARB + offset, 0x104); in goya_init_golden_registers()
1399 WREG32(mmSRAM_Y0_X2_RTR_HBW_WR_RS_W_ARB + offset, 0x103); in goya_init_golden_registers()
1400 WREG32(mmSRAM_Y0_X3_RTR_HBW_WR_RS_W_ARB + offset, 0x102); in goya_init_golden_registers()
1401 WREG32(mmSRAM_Y0_X4_RTR_HBW_WR_RS_W_ARB + offset, 0x101); in goya_init_golden_registers()
1404 WREG32(mmMME_STORE_MAX_CREDIT, 0x21); in goya_init_golden_registers()
1405 WREG32(mmMME_AGU, 0x0f0f0f10); in goya_init_golden_registers()
1406 WREG32(mmMME_SEI_MASK, ~0x0); in goya_init_golden_registers()
1408 WREG32(mmMME6_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1409 WREG32(mmMME5_RTR_HBW_RD_RQ_N_ARB, 0x01040101); in goya_init_golden_registers()
1410 WREG32(mmMME4_RTR_HBW_RD_RQ_N_ARB, 0x01030101); in goya_init_golden_registers()
1411 WREG32(mmMME3_RTR_HBW_RD_RQ_N_ARB, 0x01020101); in goya_init_golden_registers()
1412 WREG32(mmMME2_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1413 WREG32(mmMME1_RTR_HBW_RD_RQ_N_ARB, 0x07010701); in goya_init_golden_registers()
1414 WREG32(mmMME6_RTR_HBW_RD_RQ_S_ARB, 0x04010401); in goya_init_golden_registers()
1415 WREG32(mmMME5_RTR_HBW_RD_RQ_S_ARB, 0x04050401); in goya_init_golden_registers()
1416 WREG32(mmMME4_RTR_HBW_RD_RQ_S_ARB, 0x03070301); in goya_init_golden_registers()
1417 WREG32(mmMME3_RTR_HBW_RD_RQ_S_ARB, 0x01030101); in goya_init_golden_registers()
1418 WREG32(mmMME2_RTR_HBW_RD_RQ_S_ARB, 0x01040101); in goya_init_golden_registers()
1419 WREG32(mmMME1_RTR_HBW_RD_RQ_S_ARB, 0x01050105); in goya_init_golden_registers()
1420 WREG32(mmMME6_RTR_HBW_RD_RQ_W_ARB, 0x01010501); in goya_init_golden_registers()
1421 WREG32(mmMME5_RTR_HBW_RD_RQ_W_ARB, 0x01010501); in goya_init_golden_registers()
1422 WREG32(mmMME4_RTR_HBW_RD_RQ_W_ARB, 0x01040301); in goya_init_golden_registers()
1423 WREG32(mmMME3_RTR_HBW_RD_RQ_W_ARB, 0x01030401); in goya_init_golden_registers()
1424 WREG32(mmMME2_RTR_HBW_RD_RQ_W_ARB, 0x01040101); in goya_init_golden_registers()
1425 WREG32(mmMME1_RTR_HBW_RD_RQ_W_ARB, 0x01050101); in goya_init_golden_registers()
1426 WREG32(mmMME6_RTR_HBW_WR_RQ_N_ARB, 0x02020202); in goya_init_golden_registers()
1427 WREG32(mmMME5_RTR_HBW_WR_RQ_N_ARB, 0x01070101); in goya_init_golden_registers()
1428 WREG32(mmMME4_RTR_HBW_WR_RQ_N_ARB, 0x02020201); in goya_init_golden_registers()
1429 WREG32(mmMME3_RTR_HBW_WR_RQ_N_ARB, 0x07020701); in goya_init_golden_registers()
1430 WREG32(mmMME2_RTR_HBW_WR_RQ_N_ARB, 0x01020101); in goya_init_golden_registers()
1431 WREG32(mmMME1_RTR_HBW_WR_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1432 WREG32(mmMME6_RTR_HBW_WR_RQ_S_ARB, 0x01070101); in goya_init_golden_registers()
1433 WREG32(mmMME5_RTR_HBW_WR_RQ_S_ARB, 0x01070101); in goya_init_golden_registers()
1434 WREG32(mmMME4_RTR_HBW_WR_RQ_S_ARB, 0x07020701); in goya_init_golden_registers()
1435 WREG32(mmMME3_RTR_HBW_WR_RQ_S_ARB, 0x02020201); in goya_init_golden_registers()
1436 WREG32(mmMME2_RTR_HBW_WR_RQ_S_ARB, 0x01070101); in goya_init_golden_registers()
1437 WREG32(mmMME1_RTR_HBW_WR_RQ_S_ARB, 0x01020102); in goya_init_golden_registers()
1438 WREG32(mmMME6_RTR_HBW_WR_RQ_W_ARB, 0x01020701); in goya_init_golden_registers()
1439 WREG32(mmMME5_RTR_HBW_WR_RQ_W_ARB, 0x01020701); in goya_init_golden_registers()
1440 WREG32(mmMME4_RTR_HBW_WR_RQ_W_ARB, 0x07020707); in goya_init_golden_registers()
1441 WREG32(mmMME3_RTR_HBW_WR_RQ_W_ARB, 0x01020201); in goya_init_golden_registers()
1442 WREG32(mmMME2_RTR_HBW_WR_RQ_W_ARB, 0x01070201); in goya_init_golden_registers()
1443 WREG32(mmMME1_RTR_HBW_WR_RQ_W_ARB, 0x01070201); in goya_init_golden_registers()
1444 WREG32(mmMME6_RTR_HBW_RD_RS_N_ARB, 0x01070102); in goya_init_golden_registers()
1445 WREG32(mmMME5_RTR_HBW_RD_RS_N_ARB, 0x01070102); in goya_init_golden_registers()
1446 WREG32(mmMME4_RTR_HBW_RD_RS_N_ARB, 0x01060102); in goya_init_golden_registers()
1447 WREG32(mmMME3_RTR_HBW_RD_RS_N_ARB, 0x01040102); in goya_init_golden_registers()
1448 WREG32(mmMME2_RTR_HBW_RD_RS_N_ARB, 0x01020102); in goya_init_golden_registers()
1449 WREG32(mmMME1_RTR_HBW_RD_RS_N_ARB, 0x01020107); in goya_init_golden_registers()
1450 WREG32(mmMME6_RTR_HBW_RD_RS_S_ARB, 0x01020106); in goya_init_golden_registers()
1451 WREG32(mmMME5_RTR_HBW_RD_RS_S_ARB, 0x01020102); in goya_init_golden_registers()
1452 WREG32(mmMME4_RTR_HBW_RD_RS_S_ARB, 0x01040102); in goya_init_golden_registers()
1453 WREG32(mmMME3_RTR_HBW_RD_RS_S_ARB, 0x01060102); in goya_init_golden_registers()
1454 WREG32(mmMME2_RTR_HBW_RD_RS_S_ARB, 0x01070102); in goya_init_golden_registers()
1455 WREG32(mmMME1_RTR_HBW_RD_RS_S_ARB, 0x01070102); in goya_init_golden_registers()
1456 WREG32(mmMME6_RTR_HBW_RD_RS_E_ARB, 0x01020702); in goya_init_golden_registers()
1457 WREG32(mmMME5_RTR_HBW_RD_RS_E_ARB, 0x01020702); in goya_init_golden_registers()
1458 WREG32(mmMME4_RTR_HBW_RD_RS_E_ARB, 0x01040602); in goya_init_golden_registers()
1459 WREG32(mmMME3_RTR_HBW_RD_RS_E_ARB, 0x01060402); in goya_init_golden_registers()
1460 WREG32(mmMME2_RTR_HBW_RD_RS_E_ARB, 0x01070202); in goya_init_golden_registers()
1461 WREG32(mmMME1_RTR_HBW_RD_RS_E_ARB, 0x01070102); in goya_init_golden_registers()
1462 WREG32(mmMME6_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1463 WREG32(mmMME5_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1464 WREG32(mmMME4_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1465 WREG32(mmMME3_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1466 WREG32(mmMME2_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1467 WREG32(mmMME1_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1468 WREG32(mmMME6_RTR_HBW_WR_RS_N_ARB, 0x01050101); in goya_init_golden_registers()
1469 WREG32(mmMME5_RTR_HBW_WR_RS_N_ARB, 0x01040101); in goya_init_golden_registers()
1470 WREG32(mmMME4_RTR_HBW_WR_RS_N_ARB, 0x01030101); in goya_init_golden_registers()
1471 WREG32(mmMME3_RTR_HBW_WR_RS_N_ARB, 0x01020101); in goya_init_golden_registers()
1472 WREG32(mmMME2_RTR_HBW_WR_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1473 WREG32(mmMME1_RTR_HBW_WR_RS_N_ARB, 0x01010107); in goya_init_golden_registers()
1474 WREG32(mmMME6_RTR_HBW_WR_RS_S_ARB, 0x01010107); in goya_init_golden_registers()
1475 WREG32(mmMME5_RTR_HBW_WR_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1476 WREG32(mmMME4_RTR_HBW_WR_RS_S_ARB, 0x01020101); in goya_init_golden_registers()
1477 WREG32(mmMME3_RTR_HBW_WR_RS_S_ARB, 0x01030101); in goya_init_golden_registers()
1478 WREG32(mmMME2_RTR_HBW_WR_RS_S_ARB, 0x01040101); in goya_init_golden_registers()
1479 WREG32(mmMME1_RTR_HBW_WR_RS_S_ARB, 0x01050101); in goya_init_golden_registers()
1480 WREG32(mmMME6_RTR_HBW_WR_RS_E_ARB, 0x01010501); in goya_init_golden_registers()
1481 WREG32(mmMME5_RTR_HBW_WR_RS_E_ARB, 0x01010501); in goya_init_golden_registers()
1482 WREG32(mmMME4_RTR_HBW_WR_RS_E_ARB, 0x01040301); in goya_init_golden_registers()
1483 WREG32(mmMME3_RTR_HBW_WR_RS_E_ARB, 0x01030401); in goya_init_golden_registers()
1484 WREG32(mmMME2_RTR_HBW_WR_RS_E_ARB, 0x01040101); in goya_init_golden_registers()
1485 WREG32(mmMME1_RTR_HBW_WR_RS_E_ARB, 0x01050101); in goya_init_golden_registers()
1486 WREG32(mmMME6_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1487 WREG32(mmMME5_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1488 WREG32(mmMME4_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1489 WREG32(mmMME3_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1490 WREG32(mmMME2_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1491 WREG32(mmMME1_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1493 WREG32(mmTPC1_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1494 WREG32(mmTPC1_RTR_HBW_RD_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1495 WREG32(mmTPC1_RTR_HBW_RD_RQ_E_ARB, 0x01060101); in goya_init_golden_registers()
1496 WREG32(mmTPC1_RTR_HBW_WR_RQ_N_ARB, 0x02020102); in goya_init_golden_registers()
1497 WREG32(mmTPC1_RTR_HBW_WR_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1498 WREG32(mmTPC1_RTR_HBW_WR_RQ_E_ARB, 0x02070202); in goya_init_golden_registers()
1499 WREG32(mmTPC1_RTR_HBW_RD_RS_N_ARB, 0x01020201); in goya_init_golden_registers()
1500 WREG32(mmTPC1_RTR_HBW_RD_RS_S_ARB, 0x01070201); in goya_init_golden_registers()
1501 WREG32(mmTPC1_RTR_HBW_RD_RS_W_ARB, 0x01070202); in goya_init_golden_registers()
1502 WREG32(mmTPC1_RTR_HBW_WR_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1503 WREG32(mmTPC1_RTR_HBW_WR_RS_S_ARB, 0x01050101); in goya_init_golden_registers()
1504 WREG32(mmTPC1_RTR_HBW_WR_RS_W_ARB, 0x01050101); in goya_init_golden_registers()
1506 WREG32(mmTPC2_RTR_HBW_RD_RQ_N_ARB, 0x01020101); in goya_init_golden_registers()
1507 WREG32(mmTPC2_RTR_HBW_RD_RQ_S_ARB, 0x01050101); in goya_init_golden_registers()
1508 WREG32(mmTPC2_RTR_HBW_RD_RQ_E_ARB, 0x01010201); in goya_init_golden_registers()
1509 WREG32(mmTPC2_RTR_HBW_WR_RQ_N_ARB, 0x02040102); in goya_init_golden_registers()
1510 WREG32(mmTPC2_RTR_HBW_WR_RQ_S_ARB, 0x01050101); in goya_init_golden_registers()
1511 WREG32(mmTPC2_RTR_HBW_WR_RQ_E_ARB, 0x02060202); in goya_init_golden_registers()
1512 WREG32(mmTPC2_RTR_HBW_RD_RS_N_ARB, 0x01020201); in goya_init_golden_registers()
1513 WREG32(mmTPC2_RTR_HBW_RD_RS_S_ARB, 0x01070201); in goya_init_golden_registers()
1514 WREG32(mmTPC2_RTR_HBW_RD_RS_W_ARB, 0x01070202); in goya_init_golden_registers()
1515 WREG32(mmTPC2_RTR_HBW_WR_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1516 WREG32(mmTPC2_RTR_HBW_WR_RS_S_ARB, 0x01040101); in goya_init_golden_registers()
1517 WREG32(mmTPC2_RTR_HBW_WR_RS_W_ARB, 0x01040101); in goya_init_golden_registers()
1519 WREG32(mmTPC3_RTR_HBW_RD_RQ_N_ARB, 0x01030101); in goya_init_golden_registers()
1520 WREG32(mmTPC3_RTR_HBW_RD_RQ_S_ARB, 0x01040101); in goya_init_golden_registers()
1521 WREG32(mmTPC3_RTR_HBW_RD_RQ_E_ARB, 0x01040301); in goya_init_golden_registers()
1522 WREG32(mmTPC3_RTR_HBW_WR_RQ_N_ARB, 0x02060102); in goya_init_golden_registers()
1523 WREG32(mmTPC3_RTR_HBW_WR_RQ_S_ARB, 0x01040101); in goya_init_golden_registers()
1524 WREG32(mmTPC3_RTR_HBW_WR_RQ_E_ARB, 0x01040301); in goya_init_golden_registers()
1525 WREG32(mmTPC3_RTR_HBW_RD_RS_N_ARB, 0x01040201); in goya_init_golden_registers()
1526 WREG32(mmTPC3_RTR_HBW_RD_RS_S_ARB, 0x01060201); in goya_init_golden_registers()
1527 WREG32(mmTPC3_RTR_HBW_RD_RS_W_ARB, 0x01060402); in goya_init_golden_registers()
1528 WREG32(mmTPC3_RTR_HBW_WR_RS_N_ARB, 0x01020101); in goya_init_golden_registers()
1529 WREG32(mmTPC3_RTR_HBW_WR_RS_S_ARB, 0x01030101); in goya_init_golden_registers()
1530 WREG32(mmTPC3_RTR_HBW_WR_RS_W_ARB, 0x01030401); in goya_init_golden_registers()
1532 WREG32(mmTPC4_RTR_HBW_RD_RQ_N_ARB, 0x01040101); in goya_init_golden_registers()
1533 WREG32(mmTPC4_RTR_HBW_RD_RQ_S_ARB, 0x01030101); in goya_init_golden_registers()
1534 WREG32(mmTPC4_RTR_HBW_RD_RQ_E_ARB, 0x01030401); in goya_init_golden_registers()
1535 WREG32(mmTPC4_RTR_HBW_WR_RQ_N_ARB, 0x02070102); in goya_init_golden_registers()
1536 WREG32(mmTPC4_RTR_HBW_WR_RQ_S_ARB, 0x01030101); in goya_init_golden_registers()
1537 WREG32(mmTPC4_RTR_HBW_WR_RQ_E_ARB, 0x02060702); in goya_init_golden_registers()
1538 WREG32(mmTPC4_RTR_HBW_RD_RS_N_ARB, 0x01060201); in goya_init_golden_registers()
1539 WREG32(mmTPC4_RTR_HBW_RD_RS_S_ARB, 0x01040201); in goya_init_golden_registers()
1540 WREG32(mmTPC4_RTR_HBW_RD_RS_W_ARB, 0x01040602); in goya_init_golden_registers()
1541 WREG32(mmTPC4_RTR_HBW_WR_RS_N_ARB, 0x01030101); in goya_init_golden_registers()
1542 WREG32(mmTPC4_RTR_HBW_WR_RS_S_ARB, 0x01020101); in goya_init_golden_registers()
1543 WREG32(mmTPC4_RTR_HBW_WR_RS_W_ARB, 0x01040301); in goya_init_golden_registers()
1545 WREG32(mmTPC5_RTR_HBW_RD_RQ_N_ARB, 0x01050101); in goya_init_golden_registers()
1546 WREG32(mmTPC5_RTR_HBW_RD_RQ_S_ARB, 0x01020101); in goya_init_golden_registers()
1547 WREG32(mmTPC5_RTR_HBW_RD_RQ_E_ARB, 0x01200501); in goya_init_golden_registers()
1548 WREG32(mmTPC5_RTR_HBW_WR_RQ_N_ARB, 0x02070102); in goya_init_golden_registers()
1549 WREG32(mmTPC5_RTR_HBW_WR_RQ_S_ARB, 0x01020101); in goya_init_golden_registers()
1550 WREG32(mmTPC5_RTR_HBW_WR_RQ_E_ARB, 0x02020602); in goya_init_golden_registers()
1551 WREG32(mmTPC5_RTR_HBW_RD_RS_N_ARB, 0x01070201); in goya_init_golden_registers()
1552 WREG32(mmTPC5_RTR_HBW_RD_RS_S_ARB, 0x01020201); in goya_init_golden_registers()
1553 WREG32(mmTPC5_RTR_HBW_RD_RS_W_ARB, 0x01020702); in goya_init_golden_registers()
1554 WREG32(mmTPC5_RTR_HBW_WR_RS_N_ARB, 0x01040101); in goya_init_golden_registers()
1555 WREG32(mmTPC5_RTR_HBW_WR_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1556 WREG32(mmTPC5_RTR_HBW_WR_RS_W_ARB, 0x01010501); in goya_init_golden_registers()
1558 WREG32(mmTPC6_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1559 WREG32(mmTPC6_RTR_HBW_RD_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1560 WREG32(mmTPC6_RTR_HBW_RD_RQ_E_ARB, 0x01010601); in goya_init_golden_registers()
1561 WREG32(mmTPC6_RTR_HBW_WR_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1562 WREG32(mmTPC6_RTR_HBW_WR_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1563 WREG32(mmTPC6_RTR_HBW_WR_RQ_E_ARB, 0x02020702); in goya_init_golden_registers()
1564 WREG32(mmTPC6_RTR_HBW_RD_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1565 WREG32(mmTPC6_RTR_HBW_RD_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1566 WREG32(mmTPC6_RTR_HBW_RD_RS_W_ARB, 0x01020702); in goya_init_golden_registers()
1567 WREG32(mmTPC6_RTR_HBW_WR_RS_N_ARB, 0x01050101); in goya_init_golden_registers()
1568 WREG32(mmTPC6_RTR_HBW_WR_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1569 WREG32(mmTPC6_RTR_HBW_WR_RS_W_ARB, 0x01010501); in goya_init_golden_registers()
1572 WREG32(mmMME1_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1573 WREG32(mmMME2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1574 WREG32(mmMME3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1575 WREG32(mmMME4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1576 WREG32(mmMME5_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1577 WREG32(mmMME6_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1579 WREG32(mmTPC0_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1580 WREG32(mmTPC1_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1581 WREG32(mmTPC2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1582 WREG32(mmTPC3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1583 WREG32(mmTPC4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1584 WREG32(mmTPC5_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1585 WREG32(mmTPC6_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1586 WREG32(mmTPC7_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1588 WREG32(mmPCI_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1589 WREG32(mmDMA_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1593 WREG32(mmMME1_RTR_SCRAMB_EN + offset, in goya_init_golden_registers()
1595 WREG32(mmMME1_RTR_NON_LIN_SCRAMB + offset, in goya_init_golden_registers()
1604 WREG32(mmTPC0_CFG_TPC_INTR_MASK + offset, tpc_intr_mask); in goya_init_golden_registers()
1606 WREG32(mmTPC0_NRTR_SCRAMB_EN + offset, in goya_init_golden_registers()
1608 WREG32(mmTPC0_NRTR_NON_LIN_SCRAMB + offset, in goya_init_golden_registers()
1615 WREG32(mmDMA_NRTR_SCRAMB_EN, 1 << DMA_NRTR_SCRAMB_EN_VAL_SHIFT); in goya_init_golden_registers()
1616 WREG32(mmDMA_NRTR_NON_LIN_SCRAMB, in goya_init_golden_registers()
1619 WREG32(mmPCI_NRTR_SCRAMB_EN, 1 << PCI_NRTR_SCRAMB_EN_VAL_SHIFT); in goya_init_golden_registers()
1620 WREG32(mmPCI_NRTR_NON_LIN_SCRAMB, in goya_init_golden_registers()
1630 WREG32(mmDMA_CH_1_CFG0, 0x0fff00F0); in goya_init_golden_registers()
1632 WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020); in goya_init_golden_registers()
1657 WREG32(mmMME_QM_PQ_BASE_LO, lower_32_bits(qman_base_addr)); in goya_init_mme_qman()
1658 WREG32(mmMME_QM_PQ_BASE_HI, upper_32_bits(qman_base_addr)); in goya_init_mme_qman()
1659 WREG32(mmMME_QM_PQ_SIZE, ilog2(MME_QMAN_LENGTH)); in goya_init_mme_qman()
1660 WREG32(mmMME_QM_PQ_PI, 0); in goya_init_mme_qman()
1661 WREG32(mmMME_QM_PQ_CI, 0); in goya_init_mme_qman()
1662 WREG32(mmMME_QM_CP_LDMA_SRC_BASE_LO_OFFSET, 0x10C0); in goya_init_mme_qman()
1663 WREG32(mmMME_QM_CP_LDMA_SRC_BASE_HI_OFFSET, 0x10C4); in goya_init_mme_qman()
1664 WREG32(mmMME_QM_CP_LDMA_TSIZE_OFFSET, 0x10C8); in goya_init_mme_qman()
1665 WREG32(mmMME_QM_CP_LDMA_COMMIT_OFFSET, 0x10CC); in goya_init_mme_qman()
1667 WREG32(mmMME_QM_CP_MSG_BASE0_ADDR_LO, mtr_base_lo); in goya_init_mme_qman()
1668 WREG32(mmMME_QM_CP_MSG_BASE0_ADDR_HI, mtr_base_hi); in goya_init_mme_qman()
1669 WREG32(mmMME_QM_CP_MSG_BASE1_ADDR_LO, so_base_lo); in goya_init_mme_qman()
1670 WREG32(mmMME_QM_CP_MSG_BASE1_ADDR_HI, so_base_hi); in goya_init_mme_qman()
1673 WREG32(mmMME_QM_CQ_CFG1, 0x00080008); in goya_init_mme_qman()
1675 WREG32(mmMME_QM_GLBL_ERR_ADDR_LO, gic_base_lo); in goya_init_mme_qman()
1676 WREG32(mmMME_QM_GLBL_ERR_ADDR_HI, gic_base_hi); in goya_init_mme_qman()
1678 WREG32(mmMME_QM_GLBL_ERR_WDATA, GOYA_ASYNC_EVENT_ID_MME_QM); in goya_init_mme_qman()
1680 WREG32(mmMME_QM_GLBL_ERR_CFG, QMAN_MME_ERR_MSG_EN); in goya_init_mme_qman()
1682 WREG32(mmMME_QM_GLBL_PROT, QMAN_MME_ERR_PROT); in goya_init_mme_qman()
1684 WREG32(mmMME_QM_GLBL_CFG0, QMAN_MME_ENABLE); in goya_init_mme_qman()
1703 WREG32(mmMME_CMDQ_CP_MSG_BASE0_ADDR_LO, mtr_base_lo); in goya_init_mme_cmdq()
1704 WREG32(mmMME_CMDQ_CP_MSG_BASE0_ADDR_HI, mtr_base_hi); in goya_init_mme_cmdq()
1705 WREG32(mmMME_CMDQ_CP_MSG_BASE1_ADDR_LO, so_base_lo); in goya_init_mme_cmdq()
1706 WREG32(mmMME_CMDQ_CP_MSG_BASE1_ADDR_HI, so_base_hi); in goya_init_mme_cmdq()
1709 WREG32(mmMME_CMDQ_CQ_CFG1, 0x00140014); in goya_init_mme_cmdq()
1711 WREG32(mmMME_CMDQ_GLBL_ERR_ADDR_LO, gic_base_lo); in goya_init_mme_cmdq()
1712 WREG32(mmMME_CMDQ_GLBL_ERR_ADDR_HI, gic_base_hi); in goya_init_mme_cmdq()
1714 WREG32(mmMME_CMDQ_GLBL_ERR_WDATA, GOYA_ASYNC_EVENT_ID_MME_CMDQ); in goya_init_mme_cmdq()
1716 WREG32(mmMME_CMDQ_GLBL_ERR_CFG, CMDQ_MME_ERR_MSG_EN); in goya_init_mme_cmdq()
1718 WREG32(mmMME_CMDQ_GLBL_PROT, CMDQ_MME_ERR_PROT); in goya_init_mme_cmdq()
1720 WREG32(mmMME_CMDQ_GLBL_CFG0, CMDQ_MME_ENABLE); in goya_init_mme_cmdq()
1734 WREG32(mmMME_SM_BASE_ADDRESS_LOW, so_base_lo); in goya_init_mme_qmans()
1735 WREG32(mmMME_SM_BASE_ADDRESS_HIGH, so_base_hi); in goya_init_mme_qmans()
1763 WREG32(mmTPC0_QM_PQ_BASE_LO + reg_off, lower_32_bits(qman_base_addr)); in goya_init_tpc_qman()
1764 WREG32(mmTPC0_QM_PQ_BASE_HI + reg_off, upper_32_bits(qman_base_addr)); in goya_init_tpc_qman()
1765 WREG32(mmTPC0_QM_PQ_SIZE + reg_off, ilog2(TPC_QMAN_LENGTH)); in goya_init_tpc_qman()
1766 WREG32(mmTPC0_QM_PQ_PI + reg_off, 0); in goya_init_tpc_qman()
1767 WREG32(mmTPC0_QM_PQ_CI + reg_off, 0); in goya_init_tpc_qman()
1768 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET + reg_off, 0x10C0); in goya_init_tpc_qman()
1769 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_HI_OFFSET + reg_off, 0x10C4); in goya_init_tpc_qman()
1770 WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET + reg_off, 0x10C8); in goya_init_tpc_qman()
1771 WREG32(mmTPC0_QM_CP_LDMA_COMMIT_OFFSET + reg_off, 0x10CC); in goya_init_tpc_qman()
1773 WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo); in goya_init_tpc_qman()
1774 WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi); in goya_init_tpc_qman()
1775 WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo); in goya_init_tpc_qman()
1776 WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi); in goya_init_tpc_qman()
1778 WREG32(mmTPC0_QM_CQ_CFG1 + reg_off, 0x00080008); in goya_init_tpc_qman()
1780 WREG32(mmTPC0_QM_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo); in goya_init_tpc_qman()
1781 WREG32(mmTPC0_QM_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi); in goya_init_tpc_qman()
1783 WREG32(mmTPC0_QM_GLBL_ERR_WDATA + reg_off, in goya_init_tpc_qman()
1786 WREG32(mmTPC0_QM_GLBL_ERR_CFG + reg_off, QMAN_TPC_ERR_MSG_EN); in goya_init_tpc_qman()
1788 WREG32(mmTPC0_QM_GLBL_PROT + reg_off, QMAN_TPC_ERR_PROT); in goya_init_tpc_qman()
1790 WREG32(mmTPC0_QM_GLBL_CFG0 + reg_off, QMAN_TPC_ENABLE); in goya_init_tpc_qman()
1810 WREG32(mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo); in goya_init_tpc_cmdq()
1811 WREG32(mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi); in goya_init_tpc_cmdq()
1812 WREG32(mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo); in goya_init_tpc_cmdq()
1813 WREG32(mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi); in goya_init_tpc_cmdq()
1815 WREG32(mmTPC0_CMDQ_CQ_CFG1 + reg_off, 0x00140014); in goya_init_tpc_cmdq()
1817 WREG32(mmTPC0_CMDQ_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo); in goya_init_tpc_cmdq()
1818 WREG32(mmTPC0_CMDQ_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi); in goya_init_tpc_cmdq()
1820 WREG32(mmTPC0_CMDQ_GLBL_ERR_WDATA + reg_off, in goya_init_tpc_cmdq()
1823 WREG32(mmTPC0_CMDQ_GLBL_ERR_CFG + reg_off, CMDQ_TPC_ERR_MSG_EN); in goya_init_tpc_cmdq()
1825 WREG32(mmTPC0_CMDQ_GLBL_PROT + reg_off, CMDQ_TPC_ERR_PROT); in goya_init_tpc_cmdq()
1827 WREG32(mmTPC0_CMDQ_GLBL_CFG0 + reg_off, CMDQ_TPC_ENABLE); in goya_init_tpc_cmdq()
1845 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_LOW + i * cfg_off, in goya_init_tpc_qmans()
1847 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + i * cfg_off, in goya_init_tpc_qmans()
1879 WREG32(mmMME_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1880 WREG32(mmMME_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1886 WREG32(mmTPC0_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1887 WREG32(mmTPC0_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1889 WREG32(mmTPC1_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1890 WREG32(mmTPC1_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1892 WREG32(mmTPC2_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1893 WREG32(mmTPC2_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1895 WREG32(mmTPC3_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1896 WREG32(mmTPC3_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1898 WREG32(mmTPC4_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1899 WREG32(mmTPC4_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1901 WREG32(mmTPC5_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1902 WREG32(mmTPC5_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1904 WREG32(mmTPC6_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1905 WREG32(mmTPC6_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
1907 WREG32(mmTPC7_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
1908 WREG32(mmTPC7_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2127 WREG32(mmDMA_QM_0_GLBL_CFG1, 1 << DMA_QM_0_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2128 WREG32(mmDMA_QM_1_GLBL_CFG1, 1 << DMA_QM_1_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2129 WREG32(mmDMA_QM_2_GLBL_CFG1, 1 << DMA_QM_2_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2130 WREG32(mmDMA_QM_3_GLBL_CFG1, 1 << DMA_QM_3_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2131 WREG32(mmDMA_QM_4_GLBL_CFG1, 1 << DMA_QM_4_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2141 WREG32(mmTPC0_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2142 WREG32(mmTPC1_CFG_TPC_STALL, 1 << TPC1_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2143 WREG32(mmTPC2_CFG_TPC_STALL, 1 << TPC2_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2144 WREG32(mmTPC3_CFG_TPC_STALL, 1 << TPC3_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2145 WREG32(mmTPC4_CFG_TPC_STALL, 1 << TPC4_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2146 WREG32(mmTPC5_CFG_TPC_STALL, 1 << TPC5_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2147 WREG32(mmTPC6_CFG_TPC_STALL, 1 << TPC6_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2148 WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC7_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2158 WREG32(mmMME_STALL, 0xFFFFFFFF); in goya_mme_stall()
2252 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in goya_enable_timestamp()
2255 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in goya_enable_timestamp()
2256 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in goya_enable_timestamp()
2259 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in goya_enable_timestamp()
2265 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in goya_disable_timestamp()
2423 WREG32(MMU_HOP0_PA43_12, phys_addr >> MMU_HOP0_PA43_12_SHIFT); in goya_mmu_update_asid_hop0_addr()
2424 WREG32(MMU_HOP0_PA49_44, phys_addr >> MMU_HOP0_PA49_44_SHIFT); in goya_mmu_update_asid_hop0_addr()
2425 WREG32(MMU_ASID_BUSY, 0x80000000 | asid); in goya_mmu_update_asid_hop0_addr()
2475 WREG32(mmSTLB_CACHE_INV_BASE_39_8, in goya_mmu_init()
2477 WREG32(mmSTLB_CACHE_INV_BASE_49_40, MMU_CACHE_MNG_ADDR >> 40); in goya_mmu_init()
2486 WREG32(mmMMU_MMU_ENABLE, 1); in goya_mmu_init()
2487 WREG32(mmMMU_SPI_MASK, 0xF); in goya_mmu_init()
2519 WREG32(mmHW_STATE, HL_DEVICE_HW_STATE_DIRTY); in goya_hw_init()
2597 WREG32(mmPSOC_GLOBAL_CONF_UBOOT_MAGIC, KMD_MSG_GOTO_WFE); in goya_hw_fini()
2598 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_hw_fini()
2607 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, RESET_ALL); in goya_hw_fini()
2612 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, DMA_MME_TPC_RESET); in goya_hw_fini()
2634 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_hw_fini()
2640 WREG32(mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START, in goya_hw_fini()
2643 WREG32(mmPSOC_GLOBAL_CONF_SW_BTM_FSM, in goya_hw_fini()
2761 WREG32(db_reg_offset, db_value); in goya_ring_doorbell()
2764 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_ring_doorbell()
4003 WREG32(mmCPU_EQ_CI, val); in goya_update_eq_ci()
4022 WREG32(mmSYNC_MNGR_SOB_OBJ_0 + i, 0); in goya_clear_sm_regs()
4025 WREG32(mmSYNC_MNGR_MON_STATUS_0 + i, 0); in goya_clear_sm_regs()
4109 WREG32(addr - CFG_BASE, val); in goya_debugfs_write32()
4195 WREG32(addr - CFG_BASE, lower_32_bits(val)); in goya_debugfs_write64()
4196 WREG32(addr + sizeof(u32) - CFG_BASE, upper_32_bits(val)); in goya_debugfs_write64()
4450 WREG32(mmDMA_MACRO_RAZWI_LBW_WT_VLD, 0); in goya_print_razwi_info()
4455 WREG32(mmDMA_MACRO_RAZWI_LBW_RD_VLD, 0); in goya_print_razwi_info()
4460 WREG32(mmDMA_MACRO_RAZWI_HBW_WT_VLD, 0); in goya_print_razwi_info()
4465 WREG32(mmDMA_MACRO_RAZWI_HBW_RD_VLD, 0); in goya_print_razwi_info()
4487 WREG32(mmMMU_PAGE_ERROR_CAPTURE, 0); in goya_print_mmu_error_info()
4827 WREG32(mmDMA_CH_0_WR_COMP_ADDR_LO, lower_32_bits(sob_addr)); in goya_context_switch()
4832 WREG32(mmDMA_CH_0_WR_COMP_ADDR_LO + channel_off * dma_id, in goya_context_switch()
4836 WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020); in goya_context_switch()
4920 WREG32(mmCPU_IF_ARUSER_OVR_EN, 0x7FF); in goya_mmu_add_mappings_for_device_cpu()
4921 WREG32(mmCPU_IF_AWUSER_OVR_EN, 0x7FF); in goya_mmu_add_mappings_for_device_cpu()
4962 WREG32(mmCPU_IF_ARUSER_OVR_EN, 0); in goya_mmu_remove_device_cpu_mappings()
4963 WREG32(mmCPU_IF_AWUSER_OVR_EN, 0); in goya_mmu_remove_device_cpu_mappings()
5033 WREG32(mmSTLB_INV_ALL_START, 1); in goya_mmu_invalidate_cache()
5087 WREG32(mmSTLB_CACHE_INV, in goya_mmu_invalidate_cache_range()