1136 	const struct nand_sdr_timings *sdr =  in marvell_nfc_hw_ecc_hmg_do_write_page()  local
1183 				  PSEC_TO_MSEC(sdr->tPROG_max));  in marvell_nfc_hw_ecc_hmg_do_write_page()
1604 	const struct nand_sdr_timings *sdr =  in marvell_nfc_hw_ecc_bch_write_page()  local
1642 	ret = marvell_nfc_wait_op(chip, PSEC_TO_MSEC(sdr->tPROG_max));  in marvell_nfc_hw_ecc_bch_write_page()
2357 	const struct nand_sdr_timings *sdr;  in marvell_nfc_setup_interface()  local
2361 	sdr = nand_get_sdr_timings(conf);  in marvell_nfc_setup_interface()
2362 	if (IS_ERR(sdr))  in marvell_nfc_setup_interface()
2363 		return PTR_ERR(sdr);  in marvell_nfc_setup_interface()
2376 	nfc_tmg.tRP = TO_CYCLES(DIV_ROUND_UP(sdr->tRC_min, 2), period_ns) - 1;  in marvell_nfc_setup_interface()
2378 	nfc_tmg.tWP = TO_CYCLES(DIV_ROUND_UP(sdr->tWC_min, 2), period_ns) - 1;  in marvell_nfc_setup_interface()
2380 	nfc_tmg.tCS = TO_CYCLES(sdr->tCS_min, period_ns);  in marvell_nfc_setup_interface()
2381 	nfc_tmg.tCH = TO_CYCLES(sdr->tCH_min, period_ns) - 1;  in marvell_nfc_setup_interface()
2382 	nfc_tmg.tADL = TO_CYCLES(sdr->tADL_min, period_ns);  in marvell_nfc_setup_interface()
2389 	read_delay = sdr->tRC_min >= 30000 ?  in marvell_nfc_setup_interface()
2392 	nfc_tmg.tAR = TO_CYCLES(sdr->tAR_min, period_ns);  in marvell_nfc_setup_interface()
2398 	nfc_tmg.tWHR = TO_CYCLES(max_t(int, sdr->tWHR_min, sdr->tCCS_min),  in marvell_nfc_setup_interface()
2400 	nfc_tmg.tRHW = TO_CYCLES(max_t(int, sdr->tRHW_min, sdr->tCCS_min),  in marvell_nfc_setup_interface()
2408 		nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns);  in marvell_nfc_setup_interface()
2410 		nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max,  in marvell_nfc_setup_interface()