Lines Matching refs:ag
401 static bool ag71xx_is(struct ag71xx *ag, enum ag71xx_type type) in ag71xx_is() argument
403 return ag->dcfg->type == type; in ag71xx_is()
406 static void ag71xx_wr(struct ag71xx *ag, unsigned int reg, u32 value) in ag71xx_wr() argument
408 iowrite32(value, ag->mac_base + reg); in ag71xx_wr()
410 (void)ioread32(ag->mac_base + reg); in ag71xx_wr()
413 static u32 ag71xx_rr(struct ag71xx *ag, unsigned int reg) in ag71xx_rr() argument
415 return ioread32(ag->mac_base + reg); in ag71xx_rr()
418 static void ag71xx_sb(struct ag71xx *ag, unsigned int reg, u32 mask) in ag71xx_sb() argument
422 r = ag->mac_base + reg; in ag71xx_sb()
428 static void ag71xx_cb(struct ag71xx *ag, unsigned int reg, u32 mask) in ag71xx_cb() argument
432 r = ag->mac_base + reg; in ag71xx_cb()
438 static void ag71xx_int_enable(struct ag71xx *ag, u32 ints) in ag71xx_int_enable() argument
440 ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); in ag71xx_int_enable()
443 static void ag71xx_int_disable(struct ag71xx *ag, u32 ints) in ag71xx_int_disable() argument
445 ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); in ag71xx_int_disable()
451 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_get_drvinfo() local
454 strlcpy(info->bus_info, of_node_full_name(ag->pdev->dev.of_node), in ag71xx_get_drvinfo()
461 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_get_link_ksettings() local
463 return phylink_ethtool_ksettings_get(ag->phylink, kset); in ag71xx_get_link_ksettings()
469 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_set_link_ksettings() local
471 return phylink_ethtool_ksettings_set(ag->phylink, kset); in ag71xx_set_link_ksettings()
476 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_nway_reset() local
478 return phylink_ethtool_nway_reset(ag->phylink); in ag71xx_ethtool_nway_reset()
484 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_get_pauseparam() local
486 phylink_ethtool_get_pauseparam(ag->phylink, pause); in ag71xx_ethtool_get_pauseparam()
492 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_set_pauseparam() local
494 return phylink_ethtool_set_pauseparam(ag->phylink, pause); in ag71xx_ethtool_set_pauseparam()
512 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_get_stats() local
516 *data++ = ag71xx_rr(ag, ag71xx_statistics[i].offset) in ag71xx_ethtool_get_stats()
541 static int ag71xx_mdio_wait_busy(struct ag71xx *ag) in ag71xx_mdio_wait_busy() argument
543 struct net_device *ndev = ag->ndev; in ag71xx_mdio_wait_busy()
551 busy = ag71xx_rr(ag, AG71XX_REG_MII_IND); in ag71xx_mdio_wait_busy()
558 netif_err(ag, link, ndev, "MDIO operation timed out\n"); in ag71xx_mdio_wait_busy()
565 struct ag71xx *ag = bus->priv; in ag71xx_mdio_mii_read() local
568 err = ag71xx_mdio_wait_busy(ag); in ag71xx_mdio_mii_read()
572 ag71xx_wr(ag, AG71XX_REG_MII_ADDR, in ag71xx_mdio_mii_read()
575 ag71xx_wr(ag, AG71XX_REG_MII_CMD, MII_CMD_READ); in ag71xx_mdio_mii_read()
577 err = ag71xx_mdio_wait_busy(ag); in ag71xx_mdio_mii_read()
581 val = ag71xx_rr(ag, AG71XX_REG_MII_STATUS); in ag71xx_mdio_mii_read()
583 ag71xx_wr(ag, AG71XX_REG_MII_CMD, 0); in ag71xx_mdio_mii_read()
585 netif_dbg(ag, link, ag->ndev, "mii_read: addr=%04x, reg=%04x, value=%04x\n", in ag71xx_mdio_mii_read()
594 struct ag71xx *ag = bus->priv; in ag71xx_mdio_mii_write() local
596 netif_dbg(ag, link, ag->ndev, "mii_write: addr=%04x, reg=%04x, value=%04x\n", in ag71xx_mdio_mii_write()
599 ag71xx_wr(ag, AG71XX_REG_MII_ADDR, in ag71xx_mdio_mii_write()
601 ag71xx_wr(ag, AG71XX_REG_MII_CTRL, val); in ag71xx_mdio_mii_write()
603 return ag71xx_mdio_wait_busy(ag); in ag71xx_mdio_mii_write()
618 static int ag71xx_mdio_get_divider(struct ag71xx *ag, u32 *div) in ag71xx_mdio_get_divider() argument
624 ref_clock = clk_get_rate(ag->clk_mdio); in ag71xx_mdio_get_divider()
628 if (ag71xx_is(ag, AR9330) || ag71xx_is(ag, AR9340)) { in ag71xx_mdio_get_divider()
631 } else if (ag71xx_is(ag, AR7240)) { in ag71xx_mdio_get_divider()
654 struct ag71xx *ag = bus->priv; in ag71xx_mdio_reset() local
658 err = ag71xx_mdio_get_divider(ag, &t); in ag71xx_mdio_reset()
662 ag71xx_wr(ag, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); in ag71xx_mdio_reset()
665 ag71xx_wr(ag, AG71XX_REG_MII_CFG, t); in ag71xx_mdio_reset()
671 static int ag71xx_mdio_probe(struct ag71xx *ag) in ag71xx_mdio_probe() argument
673 struct device *dev = &ag->pdev->dev; in ag71xx_mdio_probe()
674 struct net_device *ndev = ag->ndev; in ag71xx_mdio_probe()
680 ag->mii_bus = NULL; in ag71xx_mdio_probe()
682 ag->clk_mdio = devm_clk_get(dev, "mdio"); in ag71xx_mdio_probe()
683 if (IS_ERR(ag->clk_mdio)) { in ag71xx_mdio_probe()
684 netif_err(ag, probe, ndev, "Failed to get mdio clk.\n"); in ag71xx_mdio_probe()
685 return PTR_ERR(ag->clk_mdio); in ag71xx_mdio_probe()
688 err = clk_prepare_enable(ag->clk_mdio); in ag71xx_mdio_probe()
690 netif_err(ag, probe, ndev, "Failed to enable mdio clk.\n"); in ag71xx_mdio_probe()
700 ag->mdio_reset = of_reset_control_get_exclusive(np, "mdio"); in ag71xx_mdio_probe()
701 if (IS_ERR(ag->mdio_reset)) { in ag71xx_mdio_probe()
702 netif_err(ag, probe, ndev, "Failed to get reset mdio.\n"); in ag71xx_mdio_probe()
703 err = PTR_ERR(ag->mdio_reset); in ag71xx_mdio_probe()
711 mii_bus->priv = ag; in ag71xx_mdio_probe()
713 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s.%d", np->name, ag->mac_idx); in ag71xx_mdio_probe()
715 if (!IS_ERR(ag->mdio_reset)) { in ag71xx_mdio_probe()
716 reset_control_assert(ag->mdio_reset); in ag71xx_mdio_probe()
718 reset_control_deassert(ag->mdio_reset); in ag71xx_mdio_probe()
728 ag->mii_bus = mii_bus; in ag71xx_mdio_probe()
733 clk_disable_unprepare(ag->clk_mdio); in ag71xx_mdio_probe()
737 static void ag71xx_mdio_remove(struct ag71xx *ag) in ag71xx_mdio_remove() argument
739 if (ag->mii_bus) in ag71xx_mdio_remove()
740 mdiobus_unregister(ag->mii_bus); in ag71xx_mdio_remove()
741 clk_disable_unprepare(ag->clk_mdio); in ag71xx_mdio_remove()
744 static void ag71xx_hw_stop(struct ag71xx *ag) in ag71xx_hw_stop() argument
747 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); in ag71xx_hw_stop()
748 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); in ag71xx_hw_stop()
749 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); in ag71xx_hw_stop()
752 static bool ag71xx_check_dma_stuck(struct ag71xx *ag) in ag71xx_check_dma_stuck() argument
757 timestamp = netdev_get_tx_queue(ag->ndev, 0)->trans_start; in ag71xx_check_dma_stuck()
761 if (!netif_carrier_ok(ag->ndev)) in ag71xx_check_dma_stuck()
764 rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); in ag71xx_check_dma_stuck()
768 tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); in ag71xx_check_dma_stuck()
769 rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); in ag71xx_check_dma_stuck()
777 static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) in ag71xx_tx_packets() argument
779 struct ag71xx_ring *ring = &ag->tx_ring; in ag71xx_tx_packets()
781 struct net_device *ndev = ag->ndev; in ag71xx_tx_packets()
788 netif_dbg(ag, tx_queued, ndev, "processing TX ring\n"); in ag71xx_tx_packets()
800 if (ag->dcfg->tx_hang_workaround && in ag71xx_tx_packets()
801 ag71xx_check_dma_stuck(ag)) { in ag71xx_tx_packets()
802 schedule_delayed_work(&ag->restart_work, in ag71xx_tx_packets()
825 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); in ag71xx_tx_packets()
830 netif_dbg(ag, tx_done, ndev, "%d packets sent out\n", sent); in ag71xx_tx_packets()
835 ag->ndev->stats.tx_bytes += bytes_compl; in ag71xx_tx_packets()
836 ag->ndev->stats.tx_packets += sent; in ag71xx_tx_packets()
838 netdev_completed_queue(ag->ndev, sent, bytes_compl); in ag71xx_tx_packets()
840 netif_wake_queue(ag->ndev); in ag71xx_tx_packets()
843 cancel_delayed_work(&ag->restart_work); in ag71xx_tx_packets()
848 static void ag71xx_dma_wait_stop(struct ag71xx *ag) in ag71xx_dma_wait_stop() argument
850 struct net_device *ndev = ag->ndev; in ag71xx_dma_wait_stop()
858 rx = ag71xx_rr(ag, AG71XX_REG_RX_CTRL) & RX_CTRL_RXE; in ag71xx_dma_wait_stop()
859 tx = ag71xx_rr(ag, AG71XX_REG_TX_CTRL) & TX_CTRL_TXE; in ag71xx_dma_wait_stop()
864 netif_err(ag, hw, ndev, "DMA stop operation timed out\n"); in ag71xx_dma_wait_stop()
867 static void ag71xx_dma_reset(struct ag71xx *ag) in ag71xx_dma_reset() argument
869 struct net_device *ndev = ag->ndev; in ag71xx_dma_reset()
874 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); in ag71xx_dma_reset()
875 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); in ag71xx_dma_reset()
880 ag71xx_dma_wait_stop(ag); in ag71xx_dma_reset()
883 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); in ag71xx_dma_reset()
884 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); in ag71xx_dma_reset()
888 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); in ag71xx_dma_reset()
889 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); in ag71xx_dma_reset()
893 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); in ag71xx_dma_reset()
894 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); in ag71xx_dma_reset()
896 val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); in ag71xx_dma_reset()
898 netif_err(ag, hw, ndev, "unable to clear DMA Rx status: %08x\n", in ag71xx_dma_reset()
901 val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); in ag71xx_dma_reset()
907 netif_err(ag, hw, ndev, "unable to clear DMA Tx status: %08x\n", in ag71xx_dma_reset()
911 static void ag71xx_hw_setup(struct ag71xx *ag) in ag71xx_hw_setup() argument
916 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init); in ag71xx_hw_setup()
918 ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, in ag71xx_hw_setup()
922 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0); in ag71xx_hw_setup()
925 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); in ag71xx_hw_setup()
926 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, ag->fifodata[0]); in ag71xx_hw_setup()
927 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, ag->fifodata[1]); in ag71xx_hw_setup()
928 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); in ag71xx_hw_setup()
929 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); in ag71xx_hw_setup()
937 static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) in ag71xx_hw_set_macaddr() argument
944 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); in ag71xx_hw_set_macaddr()
947 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); in ag71xx_hw_set_macaddr()
950 static void ag71xx_fast_reset(struct ag71xx *ag) in ag71xx_fast_reset() argument
952 struct net_device *dev = ag->ndev; in ag71xx_fast_reset()
956 ag71xx_hw_stop(ag); in ag71xx_fast_reset()
958 mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); in ag71xx_fast_reset()
959 rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); in ag71xx_fast_reset()
961 ag71xx_tx_packets(ag, true); in ag71xx_fast_reset()
963 reset_control_assert(ag->mac_reset); in ag71xx_fast_reset()
965 reset_control_deassert(ag->mac_reset); in ag71xx_fast_reset()
968 ag71xx_dma_reset(ag); in ag71xx_fast_reset()
969 ag71xx_hw_setup(ag); in ag71xx_fast_reset()
970 ag->tx_ring.curr = 0; in ag71xx_fast_reset()
971 ag->tx_ring.dirty = 0; in ag71xx_fast_reset()
972 netdev_reset_queue(ag->ndev); in ag71xx_fast_reset()
975 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, in ag71xx_fast_reset()
976 ag71xx_max_frame_len(ag->ndev->mtu)); in ag71xx_fast_reset()
978 ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); in ag71xx_fast_reset()
979 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); in ag71xx_fast_reset()
980 ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); in ag71xx_fast_reset()
982 ag71xx_hw_set_macaddr(ag, dev->dev_addr); in ag71xx_fast_reset()
985 static void ag71xx_hw_start(struct ag71xx *ag) in ag71xx_hw_start() argument
988 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); in ag71xx_hw_start()
991 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); in ag71xx_hw_start()
993 netif_wake_queue(ag->ndev); in ag71xx_hw_start()
999 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_config() local
1004 if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130)) in ag71xx_mac_config()
1005 ag71xx_fast_reset(ag); in ag71xx_mac_config()
1007 if (ag->tx_ring.desc_split) { in ag71xx_mac_config()
1008 ag->fifodata[2] &= 0xffff; in ag71xx_mac_config()
1009 ag->fifodata[2] |= ((2048 - ag->tx_ring.desc_split) / 4) << 16; in ag71xx_mac_config()
1012 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]); in ag71xx_mac_config()
1019 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_validate() local
1026 if ((ag71xx_is(ag, AR9330) && ag->mac_idx == 0) || in ag71xx_mac_validate()
1027 ag71xx_is(ag, AR9340) || in ag71xx_mac_validate()
1028 ag71xx_is(ag, QCA9530) || in ag71xx_mac_validate()
1029 (ag71xx_is(ag, QCA9550) && ag->mac_idx == 1)) in ag71xx_mac_validate()
1033 if ((ag71xx_is(ag, AR9330) && ag->mac_idx == 1) || in ag71xx_mac_validate()
1034 (ag71xx_is(ag, AR9340) && ag->mac_idx == 1) || in ag71xx_mac_validate()
1035 (ag71xx_is(ag, QCA9530) && ag->mac_idx == 1)) in ag71xx_mac_validate()
1039 if (ag71xx_is(ag, QCA9550) && ag->mac_idx == 0) in ag71xx_mac_validate()
1043 if (ag71xx_is(ag, AR9340) && ag->mac_idx == 0) in ag71xx_mac_validate()
1047 if ((ag71xx_is(ag, AR9340) && ag->mac_idx == 0) || in ag71xx_mac_validate()
1048 (ag71xx_is(ag, QCA9550) && ag->mac_idx == 1)) in ag71xx_mac_validate()
1097 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_link_down() local
1099 ag71xx_hw_stop(ag); in ag71xx_mac_link_down()
1108 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_link_up() local
1113 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); in ag71xx_mac_link_up()
1117 ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); in ag71xx_mac_link_up()
1120 fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); in ag71xx_mac_link_up()
1139 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); in ag71xx_mac_link_up()
1140 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); in ag71xx_mac_link_up()
1141 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); in ag71xx_mac_link_up()
1143 cfg1 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG1); in ag71xx_mac_link_up()
1150 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, cfg1); in ag71xx_mac_link_up()
1152 ag71xx_hw_start(ag); in ag71xx_mac_link_up()
1164 static int ag71xx_phylink_setup(struct ag71xx *ag) in ag71xx_phylink_setup() argument
1168 ag->phylink_config.dev = &ag->ndev->dev; in ag71xx_phylink_setup()
1169 ag->phylink_config.type = PHYLINK_NETDEV; in ag71xx_phylink_setup()
1171 phylink = phylink_create(&ag->phylink_config, ag->pdev->dev.fwnode, in ag71xx_phylink_setup()
1172 ag->phy_if_mode, &ag71xx_phylink_mac_ops); in ag71xx_phylink_setup()
1176 ag->phylink = phylink; in ag71xx_phylink_setup()
1180 static void ag71xx_ring_tx_clean(struct ag71xx *ag) in ag71xx_ring_tx_clean() argument
1182 struct ag71xx_ring *ring = &ag->tx_ring; in ag71xx_ring_tx_clean()
1185 struct net_device *ndev = ag->ndev; in ag71xx_ring_tx_clean()
1212 static void ag71xx_ring_tx_init(struct ag71xx *ag) in ag71xx_ring_tx_init() argument
1214 struct ag71xx_ring *ring = &ag->tx_ring; in ag71xx_ring_tx_init()
1234 netdev_reset_queue(ag->ndev); in ag71xx_ring_tx_init()
1237 static void ag71xx_ring_rx_clean(struct ag71xx *ag) in ag71xx_ring_rx_clean() argument
1239 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_ring_rx_clean()
1248 dma_unmap_single(&ag->pdev->dev, in ag71xx_ring_rx_clean()
1250 ag->rx_buf_size, DMA_FROM_DEVICE); in ag71xx_ring_rx_clean()
1255 static int ag71xx_buffer_size(struct ag71xx *ag) in ag71xx_buffer_size() argument
1257 return ag->rx_buf_size + in ag71xx_buffer_size()
1261 static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf, in ag71xx_fill_rx_buf() argument
1265 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_fill_rx_buf()
1271 data = alloc(ag71xx_buffer_size(ag)); in ag71xx_fill_rx_buf()
1276 buf->rx.dma_addr = dma_map_single(&ag->pdev->dev, data, ag->rx_buf_size, in ag71xx_fill_rx_buf()
1282 static int ag71xx_ring_rx_init(struct ag71xx *ag) in ag71xx_ring_rx_init() argument
1284 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_ring_rx_init()
1285 struct net_device *ndev = ag->ndev; in ag71xx_ring_rx_init()
1298 netif_dbg(ag, rx_status, ndev, "RX desc at %p, next is %08x\n", in ag71xx_ring_rx_init()
1305 if (!ag71xx_fill_rx_buf(ag, &ring->buf[i], ag->rx_buf_offset, in ag71xx_ring_rx_init()
1323 static int ag71xx_ring_rx_refill(struct ag71xx *ag) in ag71xx_ring_rx_refill() argument
1325 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_ring_rx_refill()
1327 int offset = ag->rx_buf_offset; in ag71xx_ring_rx_refill()
1339 !ag71xx_fill_rx_buf(ag, &ring->buf[i], offset, in ag71xx_ring_rx_refill()
1350 netif_dbg(ag, rx_status, ag->ndev, "%u rx descriptors refilled\n", in ag71xx_ring_rx_refill()
1356 static int ag71xx_rings_init(struct ag71xx *ag) in ag71xx_rings_init() argument
1358 struct ag71xx_ring *tx = &ag->tx_ring; in ag71xx_rings_init()
1359 struct ag71xx_ring *rx = &ag->rx_ring; in ag71xx_rings_init()
1369 tx->descs_cpu = dma_alloc_coherent(&ag->pdev->dev, in ag71xx_rings_init()
1382 ag71xx_ring_tx_init(ag); in ag71xx_rings_init()
1383 return ag71xx_ring_rx_init(ag); in ag71xx_rings_init()
1386 static void ag71xx_rings_free(struct ag71xx *ag) in ag71xx_rings_free() argument
1388 struct ag71xx_ring *tx = &ag->tx_ring; in ag71xx_rings_free()
1389 struct ag71xx_ring *rx = &ag->rx_ring; in ag71xx_rings_free()
1395 dma_free_coherent(&ag->pdev->dev, ring_size * AG71XX_DESC_SIZE, in ag71xx_rings_free()
1406 static void ag71xx_rings_cleanup(struct ag71xx *ag) in ag71xx_rings_cleanup() argument
1408 ag71xx_ring_rx_clean(ag); in ag71xx_rings_cleanup()
1409 ag71xx_ring_tx_clean(ag); in ag71xx_rings_cleanup()
1410 ag71xx_rings_free(ag); in ag71xx_rings_cleanup()
1412 netdev_reset_queue(ag->ndev); in ag71xx_rings_cleanup()
1415 static void ag71xx_hw_init(struct ag71xx *ag) in ag71xx_hw_init() argument
1417 ag71xx_hw_stop(ag); in ag71xx_hw_init()
1419 ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); in ag71xx_hw_init()
1422 reset_control_assert(ag->mac_reset); in ag71xx_hw_init()
1424 reset_control_deassert(ag->mac_reset); in ag71xx_hw_init()
1427 ag71xx_hw_setup(ag); in ag71xx_hw_init()
1429 ag71xx_dma_reset(ag); in ag71xx_hw_init()
1432 static int ag71xx_hw_enable(struct ag71xx *ag) in ag71xx_hw_enable() argument
1436 ret = ag71xx_rings_init(ag); in ag71xx_hw_enable()
1440 napi_enable(&ag->napi); in ag71xx_hw_enable()
1441 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); in ag71xx_hw_enable()
1442 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); in ag71xx_hw_enable()
1443 netif_start_queue(ag->ndev); in ag71xx_hw_enable()
1448 static void ag71xx_hw_disable(struct ag71xx *ag) in ag71xx_hw_disable() argument
1450 netif_stop_queue(ag->ndev); in ag71xx_hw_disable()
1452 ag71xx_hw_stop(ag); in ag71xx_hw_disable()
1453 ag71xx_dma_reset(ag); in ag71xx_hw_disable()
1455 napi_disable(&ag->napi); in ag71xx_hw_disable()
1456 del_timer_sync(&ag->oom_timer); in ag71xx_hw_disable()
1458 ag71xx_rings_cleanup(ag); in ag71xx_hw_disable()
1463 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_open() local
1467 ret = phylink_of_phy_connect(ag->phylink, ag->pdev->dev.of_node, 0); in ag71xx_open()
1469 netif_err(ag, link, ndev, "phylink_of_phy_connect filed with err: %i\n", in ag71xx_open()
1475 ag->rx_buf_size = in ag71xx_open()
1479 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len); in ag71xx_open()
1480 ag71xx_hw_set_macaddr(ag, ndev->dev_addr); in ag71xx_open()
1482 ret = ag71xx_hw_enable(ag); in ag71xx_open()
1486 phylink_start(ag->phylink); in ag71xx_open()
1491 ag71xx_rings_cleanup(ag); in ag71xx_open()
1497 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_stop() local
1499 phylink_stop(ag->phylink); in ag71xx_stop()
1500 phylink_disconnect_phy(ag->phylink); in ag71xx_stop()
1501 ag71xx_hw_disable(ag); in ag71xx_stop()
1559 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_hard_start_xmit() local
1564 ring = &ag->tx_ring; in ag71xx_hard_start_xmit()
1569 netif_dbg(ag, tx_err, ndev, "packet len is too small\n"); in ag71xx_hard_start_xmit()
1573 dma_addr = dma_map_single(&ag->pdev->dev, skb->data, skb->len, in ag71xx_hard_start_xmit()
1581 skb->len & ag->dcfg->desc_pktlen_mask); in ag71xx_hard_start_xmit()
1604 netif_dbg(ag, tx_err, ndev, "tx queue full\n"); in ag71xx_hard_start_xmit()
1608 netif_dbg(ag, tx_queued, ndev, "packet injected into TX queue\n"); in ag71xx_hard_start_xmit()
1611 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); in ag71xx_hard_start_xmit()
1616 dma_unmap_single(&ag->pdev->dev, dma_addr, skb->len, DMA_TO_DEVICE); in ag71xx_hard_start_xmit()
1627 struct ag71xx *ag = from_timer(ag, t, oom_timer); in ag71xx_oom_timer_handler() local
1629 napi_schedule(&ag->napi); in ag71xx_oom_timer_handler()
1634 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_tx_timeout() local
1636 netif_err(ag, tx_err, ndev, "tx timeout\n"); in ag71xx_tx_timeout()
1638 schedule_delayed_work(&ag->restart_work, 1); in ag71xx_tx_timeout()
1643 struct ag71xx *ag = container_of(work, struct ag71xx, in ag71xx_restart_work_func() local
1647 ag71xx_hw_disable(ag); in ag71xx_restart_work_func()
1648 ag71xx_hw_enable(ag); in ag71xx_restart_work_func()
1650 phylink_stop(ag->phylink); in ag71xx_restart_work_func()
1651 phylink_start(ag->phylink); in ag71xx_restart_work_func()
1656 static int ag71xx_rx_packets(struct ag71xx *ag, int limit) in ag71xx_rx_packets() argument
1658 struct net_device *ndev = ag->ndev; in ag71xx_rx_packets()
1665 ring = &ag->rx_ring; in ag71xx_rx_packets()
1666 pktlen_mask = ag->dcfg->desc_pktlen_mask; in ag71xx_rx_packets()
1667 offset = ag->rx_buf_offset; in ag71xx_rx_packets()
1671 netif_dbg(ag, rx_status, ndev, "rx packets, limit=%d, curr=%u, dirty=%u\n", in ag71xx_rx_packets()
1690 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); in ag71xx_rx_packets()
1695 dma_unmap_single(&ag->pdev->dev, ring->buf[i].rx.dma_addr, in ag71xx_rx_packets()
1696 ag->rx_buf_size, DMA_FROM_DEVICE); in ag71xx_rx_packets()
1701 skb = build_skb(ring->buf[i].rx.rx_buf, ag71xx_buffer_size(ag)); in ag71xx_rx_packets()
1726 ag71xx_ring_rx_refill(ag); in ag71xx_rx_packets()
1732 netif_dbg(ag, rx_status, ndev, "rx finish, curr=%u, dirty=%u, done=%d\n", in ag71xx_rx_packets()
1740 struct ag71xx *ag = container_of(napi, struct ag71xx, napi); in ag71xx_poll() local
1741 struct ag71xx_ring *rx_ring = &ag->rx_ring; in ag71xx_poll()
1743 struct net_device *ndev = ag->ndev; in ag71xx_poll()
1747 tx_done = ag71xx_tx_packets(ag, false); in ag71xx_poll()
1749 netif_dbg(ag, rx_status, ndev, "processing RX ring\n"); in ag71xx_poll()
1750 rx_done = ag71xx_rx_packets(ag, limit); in ag71xx_poll()
1755 status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); in ag71xx_poll()
1757 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); in ag71xx_poll()
1761 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); in ag71xx_poll()
1768 status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); in ag71xx_poll()
1772 netif_dbg(ag, rx_status, ndev, "disable polling mode, rx=%d, tx=%d,limit=%d\n", in ag71xx_poll()
1778 ag71xx_int_enable(ag, AG71XX_INT_POLL); in ag71xx_poll()
1783 netif_dbg(ag, rx_status, ndev, "stay in polling mode, rx=%d, tx=%d, limit=%d\n", in ag71xx_poll()
1788 netif_err(ag, rx_err, ndev, "out of memory\n"); in ag71xx_poll()
1790 mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); in ag71xx_poll()
1798 struct ag71xx *ag; in ag71xx_interrupt() local
1801 ag = netdev_priv(ndev); in ag71xx_interrupt()
1802 status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); in ag71xx_interrupt()
1809 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); in ag71xx_interrupt()
1810 netif_err(ag, intr, ndev, "TX BUS error\n"); in ag71xx_interrupt()
1813 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); in ag71xx_interrupt()
1814 netif_err(ag, intr, ndev, "RX BUS error\n"); in ag71xx_interrupt()
1819 ag71xx_int_disable(ag, AG71XX_INT_POLL); in ag71xx_interrupt()
1820 netif_dbg(ag, intr, ndev, "enable polling mode\n"); in ag71xx_interrupt()
1821 napi_schedule(&ag->napi); in ag71xx_interrupt()
1829 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_change_mtu() local
1832 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, in ag71xx_change_mtu()
1861 struct ag71xx *ag; in ag71xx_probe() local
1866 ndev = devm_alloc_etherdev(&pdev->dev, sizeof(*ag)); in ag71xx_probe()
1878 ag = netdev_priv(ndev); in ag71xx_probe()
1879 ag->mac_idx = -1; in ag71xx_probe()
1882 ag->mac_idx = i; in ag71xx_probe()
1885 if (ag->mac_idx < 0) { in ag71xx_probe()
1886 netif_err(ag, probe, ndev, "unknown mac idx\n"); in ag71xx_probe()
1890 ag->clk_eth = devm_clk_get(&pdev->dev, "eth"); in ag71xx_probe()
1891 if (IS_ERR(ag->clk_eth)) { in ag71xx_probe()
1892 netif_err(ag, probe, ndev, "Failed to get eth clk.\n"); in ag71xx_probe()
1893 return PTR_ERR(ag->clk_eth); in ag71xx_probe()
1898 ag->pdev = pdev; in ag71xx_probe()
1899 ag->ndev = ndev; in ag71xx_probe()
1900 ag->dcfg = dcfg; in ag71xx_probe()
1901 ag->msg_enable = netif_msg_init(-1, AG71XX_DEFAULT_MSG_ENABLE); in ag71xx_probe()
1902 memcpy(ag->fifodata, dcfg->fifodata, sizeof(ag->fifodata)); in ag71xx_probe()
1904 ag->mac_reset = devm_reset_control_get(&pdev->dev, "mac"); in ag71xx_probe()
1905 if (IS_ERR(ag->mac_reset)) { in ag71xx_probe()
1906 netif_err(ag, probe, ndev, "missing mac reset\n"); in ag71xx_probe()
1907 return PTR_ERR(ag->mac_reset); in ag71xx_probe()
1910 ag->mac_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in ag71xx_probe()
1911 if (!ag->mac_base) in ag71xx_probe()
1918 netif_err(ag, probe, ndev, "unable to request IRQ %d\n", in ag71xx_probe()
1926 INIT_DELAYED_WORK(&ag->restart_work, ag71xx_restart_work_func); in ag71xx_probe()
1927 timer_setup(&ag->oom_timer, ag71xx_oom_timer_handler, 0); in ag71xx_probe()
1930 ag->rx_ring.order = ag71xx_ring_size_order(AG71XX_RX_RING_SIZE_DEFAULT); in ag71xx_probe()
1935 ag->rx_buf_offset = NET_SKB_PAD; in ag71xx_probe()
1936 if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130)) in ag71xx_probe()
1937 ag->rx_buf_offset += NET_IP_ALIGN; in ag71xx_probe()
1939 if (ag71xx_is(ag, AR7100)) { in ag71xx_probe()
1940 ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT; in ag71xx_probe()
1943 ag->tx_ring.order = ag71xx_ring_size_order(tx_size); in ag71xx_probe()
1945 ag->stop_desc = dmam_alloc_coherent(&pdev->dev, in ag71xx_probe()
1947 &ag->stop_desc_dma, GFP_KERNEL); in ag71xx_probe()
1948 if (!ag->stop_desc) in ag71xx_probe()
1951 ag->stop_desc->data = 0; in ag71xx_probe()
1952 ag->stop_desc->ctrl = 0; in ag71xx_probe()
1953 ag->stop_desc->next = (u32)ag->stop_desc_dma; in ag71xx_probe()
1959 netif_err(ag, probe, ndev, "invalid MAC address, using random address\n"); in ag71xx_probe()
1963 err = of_get_phy_mode(np, &ag->phy_if_mode); in ag71xx_probe()
1965 netif_err(ag, probe, ndev, "missing phy-mode property in DT\n"); in ag71xx_probe()
1969 netif_napi_add(ndev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); in ag71xx_probe()
1971 err = clk_prepare_enable(ag->clk_eth); in ag71xx_probe()
1973 netif_err(ag, probe, ndev, "Failed to enable eth clk.\n"); in ag71xx_probe()
1977 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, 0); in ag71xx_probe()
1979 ag71xx_hw_init(ag); in ag71xx_probe()
1981 err = ag71xx_mdio_probe(ag); in ag71xx_probe()
1987 err = ag71xx_phylink_setup(ag); in ag71xx_probe()
1989 netif_err(ag, probe, ndev, "failed to setup phylink (%d)\n", err); in ag71xx_probe()
1995 netif_err(ag, probe, ndev, "unable to register net device\n"); in ag71xx_probe()
2000 netif_info(ag, probe, ndev, "Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n", in ag71xx_probe()
2001 (unsigned long)ag->mac_base, ndev->irq, in ag71xx_probe()
2002 phy_modes(ag->phy_if_mode)); in ag71xx_probe()
2007 ag71xx_mdio_remove(ag); in ag71xx_probe()
2009 clk_disable_unprepare(ag->clk_eth); in ag71xx_probe()
2016 struct ag71xx *ag; in ag71xx_remove() local
2021 ag = netdev_priv(ndev); in ag71xx_remove()
2023 ag71xx_mdio_remove(ag); in ag71xx_remove()
2024 clk_disable_unprepare(ag->clk_eth); in ag71xx_remove()