92 static void tpu_pwm_write(struct tpu_pwm_device *pwm, int reg_nr, u16 value)  in tpu_pwm_write()  argument
94 	void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET  in tpu_pwm_write()
95 			   + pwm->channel * TPU_CHANNEL_SIZE;  in tpu_pwm_write()
100 static void tpu_pwm_set_pin(struct tpu_pwm_device *pwm,  in tpu_pwm_set_pin()  argument
105 	dev_dbg(&pwm->tpu->pdev->dev, "%u: configuring pin as %s\n",  in tpu_pwm_set_pin()
106 		pwm->channel, states[state]);  in tpu_pwm_set_pin()
110 		tpu_pwm_write(pwm, TPU_TIORn,  in tpu_pwm_set_pin()
111 			      pwm->polarity == PWM_POLARITY_INVERSED ?  in tpu_pwm_set_pin()
115 		tpu_pwm_write(pwm, TPU_TIORn,  in tpu_pwm_set_pin()
116 			      pwm->polarity == PWM_POLARITY_INVERSED ?  in tpu_pwm_set_pin()
120 		tpu_pwm_write(pwm, TPU_TIORn,  in tpu_pwm_set_pin()
121 			      pwm->polarity == PWM_POLARITY_INVERSED ?  in tpu_pwm_set_pin()
127 static void tpu_pwm_start_stop(struct tpu_pwm_device *pwm, int start)  in tpu_pwm_start_stop()  argument
132 	spin_lock_irqsave(&pwm->tpu->lock, flags);  in tpu_pwm_start_stop()
133 	value = ioread16(pwm->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
136 		value |= 1 << pwm->channel;  in tpu_pwm_start_stop()
138 		value &= ~(1 << pwm->channel);  in tpu_pwm_start_stop()
140 	iowrite16(value, pwm->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
141 	spin_unlock_irqrestore(&pwm->tpu->lock, flags);  in tpu_pwm_start_stop()
144 static int tpu_pwm_timer_start(struct tpu_pwm_device *pwm)  in tpu_pwm_timer_start()  argument
148 	if (!pwm->timer_on) {  in tpu_pwm_timer_start()
150 		pm_runtime_get_sync(&pwm->tpu->pdev->dev);  in tpu_pwm_timer_start()
151 		ret = clk_prepare_enable(pwm->tpu->clk);  in tpu_pwm_timer_start()
153 			dev_err(&pwm->tpu->pdev->dev, "cannot enable clock\n");  in tpu_pwm_timer_start()
156 		pwm->timer_on = true;  in tpu_pwm_timer_start()
164 	tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);  in tpu_pwm_timer_start()
165 	tpu_pwm_start_stop(pwm, false);  in tpu_pwm_timer_start()
175 	tpu_pwm_write(pwm, TPU_TCRn, TPU_TCR_CCLR_TGRB | TPU_TCR_CKEG_RISING |  in tpu_pwm_timer_start()
176 		      pwm->prescaler);  in tpu_pwm_timer_start()
177 	tpu_pwm_write(pwm, TPU_TMDRn, TPU_TMDR_MD_PWM);  in tpu_pwm_timer_start()
178 	tpu_pwm_set_pin(pwm, TPU_PIN_PWM);  in tpu_pwm_timer_start()
179 	tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);  in tpu_pwm_timer_start()
180 	tpu_pwm_write(pwm, TPU_TGRBn, pwm->period);  in tpu_pwm_timer_start()
182 	dev_dbg(&pwm->tpu->pdev->dev, "%u: TGRA 0x%04x TGRB 0x%04x\n",  in tpu_pwm_timer_start()
183 		pwm->channel, pwm->duty, pwm->period);  in tpu_pwm_timer_start()
186 	tpu_pwm_start_stop(pwm, true);  in tpu_pwm_timer_start()
191 static void tpu_pwm_timer_stop(struct tpu_pwm_device *pwm)  in tpu_pwm_timer_stop()  argument
193 	if (!pwm->timer_on)  in tpu_pwm_timer_stop()
197 	tpu_pwm_start_stop(pwm, false);  in tpu_pwm_timer_stop()
200 	clk_disable_unprepare(pwm->tpu->clk);  in tpu_pwm_timer_stop()
201 	pm_runtime_put(&pwm->tpu->pdev->dev);  in tpu_pwm_timer_stop()
203 	pwm->timer_on = false;  in tpu_pwm_timer_stop()
213 	struct tpu_pwm_device *pwm;  in tpu_pwm_request()  local
218 	pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);  in tpu_pwm_request()
219 	if (pwm == NULL)  in tpu_pwm_request()
222 	pwm->tpu = tpu;  in tpu_pwm_request()
223 	pwm->channel = _pwm->hwpwm;  in tpu_pwm_request()
224 	pwm->polarity = PWM_POLARITY_NORMAL;  in tpu_pwm_request()
225 	pwm->prescaler = 0;  in tpu_pwm_request()
226 	pwm->period = 0;  in tpu_pwm_request()
227 	pwm->duty = 0;  in tpu_pwm_request()
229 	pwm->timer_on = false;  in tpu_pwm_request()
231 	pwm_set_chip_data(_pwm, pwm);  in tpu_pwm_request()
238 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_free()  local
240 	tpu_pwm_timer_stop(pwm);  in tpu_pwm_free()
241 	kfree(pwm);  in tpu_pwm_free()
248 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_config()  local
288 	if (pwm->prescaler == prescaler && pwm->period == period)  in tpu_pwm_config()
291 	pwm->prescaler = prescaler;  in tpu_pwm_config()
292 	pwm->period = period;  in tpu_pwm_config()
293 	pwm->duty = duty;  in tpu_pwm_config()
299 	if (duty_only && pwm->timer_on) {  in tpu_pwm_config()
305 		tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);  in tpu_pwm_config()
306 		dev_dbg(&tpu->pdev->dev, "%u: TGRA 0x%04x\n", pwm->channel,  in tpu_pwm_config()
307 			pwm->duty);  in tpu_pwm_config()
310 		ret = tpu_pwm_timer_start(pwm);  in tpu_pwm_config()
320 		tpu_pwm_set_pin(pwm, duty ? TPU_PIN_ACTIVE : TPU_PIN_INACTIVE);  in tpu_pwm_config()
321 		tpu_pwm_timer_stop(pwm);  in tpu_pwm_config()
330 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_set_polarity()  local
332 	pwm->polarity = polarity;  in tpu_pwm_set_polarity()
339 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_enable()  local
342 	ret = tpu_pwm_timer_start(pwm);  in tpu_pwm_enable()
350 	if (pwm->duty == 0 || pwm->duty == pwm->period) {  in tpu_pwm_enable()
351 		tpu_pwm_set_pin(pwm, pwm->duty ?  in tpu_pwm_enable()
353 		tpu_pwm_timer_stop(pwm);  in tpu_pwm_enable()
361 	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);  in tpu_pwm_disable()  local
364 	tpu_pwm_timer_start(pwm);  in tpu_pwm_disable()
365 	tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);  in tpu_pwm_disable()
366 	tpu_pwm_timer_stop(pwm);  in tpu_pwm_disable()