262 	unsigned int		im;		/* interrupt mask */  member
711 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
712 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_irq()
721 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
722 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_irq()
761 				uap->im &= ~UART011_TXIM;  in pl011_dma_tx_start()
762 				pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_start()
864 	uap->im &= ~UART011_RXIM;  in pl011_dma_rx_trigger_dma()
865 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_trigger_dma()
991 		uap->im |= UART011_RXIM;  in pl011_dma_rx_irq()
992 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_irq()
1039 		uap->im |= UART011_RXIM;  in pl011_dma_rx_callback()
1040 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_callback()
1096 		uap->im |= UART011_RXIM;  in pl011_dma_rx_poll()
1097 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_poll()
1292 	uap->im &= ~UART011_TXIM;  in pl011_stop_tx()
1293 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_stop_tx()
1303 		uap->im |= UART011_TXIM;  in pl011_start_tx_pio()
1304 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_start_tx_pio()
1322 	uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM|  in pl011_stop_rx()
1324 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_stop_rx()
1334 	uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM;  in pl011_enable_ms()
1335 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_enable_ms()
1354 			uap->im |= UART011_RXIM;  in pl011_rx_chars()
1355 			pl011_write(uap->im, uap, REG_IMSC);  in pl011_rx_chars()
1476 	status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1500 			status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1672 	uap->im = pl011_read(uap, REG_IMSC);  in pl011_hwinit()
1708 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_allocate_irq()
1740 	uap->im = UART011_RTIM;  in pl011_enable_interrupts()
1742 		uap->im |= UART011_RXIM;  in pl011_enable_interrupts()
1743 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_enable_interrupts()
1853 	uap->im = 0;  in pl011_disable_interrupts()
1854 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_disable_interrupts()