Lines Matching refs:OWL_UART_STAT
29 #define OWL_UART_STAT 0x00c macro
110 stat = owl_uart_read(port, OWL_UART_STAT); in owl_uart_get_mctrl()
126 val = owl_uart_read(port, OWL_UART_STAT); in owl_uart_tx_empty()
142 val = owl_uart_read(port, OWL_UART_STAT); in owl_uart_stop_rx()
144 owl_uart_write(port, val, OWL_UART_STAT); in owl_uart_stop_rx()
155 val = owl_uart_read(port, OWL_UART_STAT); in owl_uart_stop_tx()
157 owl_uart_write(port, val, OWL_UART_STAT); in owl_uart_stop_tx()
169 val = owl_uart_read(port, OWL_UART_STAT); in owl_uart_start_tx()
171 owl_uart_write(port, val, OWL_UART_STAT); in owl_uart_start_tx()
187 while (!(owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU)) in owl_uart_send_chars()
194 while (!(owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU)) { in owl_uart_send_chars()
219 stat = owl_uart_read(port, OWL_UART_STAT); in owl_uart_receive_chars()
243 stat = owl_uart_read(port, OWL_UART_STAT); in owl_uart_receive_chars()
259 stat = owl_uart_read(port, OWL_UART_STAT); in owl_uart_irq()
267 stat = owl_uart_read(port, OWL_UART_STAT); in owl_uart_irq()
269 owl_uart_write(port, stat, OWL_UART_STAT); in owl_uart_irq()
306 val = owl_uart_read(port, OWL_UART_STAT); in owl_uart_startup()
309 owl_uart_write(port, val, OWL_UART_STAT); in owl_uart_startup()
488 while (owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU) in owl_console_putchar()
521 while (owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TRFL_MASK) in owl_uart_port_write()
525 val = owl_uart_read(port, OWL_UART_STAT); in owl_uart_port_write()
527 owl_uart_write(port, val, OWL_UART_STAT); in owl_uart_port_write()