Lines Matching refs:uap
87 #define pmz_debug(fmt, arg...) pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
88 #define pmz_error(fmt, arg...) pr_err("ttyPZ%d: " fmt, uap->port.line, ## arg)
89 #define pmz_info(fmt, arg...) pr_info("ttyPZ%d: " fmt, uap->port.line, ## arg)
112 static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs) in pmz_load_zsregs() argument
118 unsigned char stat = read_zsreg(uap, R1); in pmz_load_zsregs()
124 ZS_CLEARERR(uap); in pmz_load_zsregs()
125 zssync(uap); in pmz_load_zsregs()
126 ZS_CLEARFIFO(uap); in pmz_load_zsregs()
127 zssync(uap); in pmz_load_zsregs()
128 ZS_CLEARERR(uap); in pmz_load_zsregs()
131 write_zsreg(uap, R1, in pmz_load_zsregs()
135 write_zsreg(uap, R4, regs[R4]); in pmz_load_zsregs()
138 write_zsreg(uap, R10, regs[R10]); in pmz_load_zsregs()
141 write_zsreg(uap, R3, regs[R3] & ~RxENABLE); in pmz_load_zsregs()
142 write_zsreg(uap, R5, regs[R5] & ~TxENABLE); in pmz_load_zsregs()
145 write_zsreg(uap, R15, regs[R15] | EN85C30); in pmz_load_zsregs()
146 write_zsreg(uap, R7, regs[R7P]); in pmz_load_zsregs()
149 write_zsreg(uap, R15, regs[R15] & ~EN85C30); in pmz_load_zsregs()
152 write_zsreg(uap, R6, regs[R6]); in pmz_load_zsregs()
153 write_zsreg(uap, R7, regs[R7]); in pmz_load_zsregs()
156 write_zsreg(uap, R14, regs[R14] & ~BRENAB); in pmz_load_zsregs()
159 write_zsreg(uap, R11, regs[R11]); in pmz_load_zsregs()
162 write_zsreg(uap, R12, regs[R12]); in pmz_load_zsregs()
163 write_zsreg(uap, R13, regs[R13]); in pmz_load_zsregs()
166 write_zsreg(uap, R14, regs[R14]); in pmz_load_zsregs()
169 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
170 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
173 write_zsreg(uap, R3, regs[R3]); in pmz_load_zsregs()
174 write_zsreg(uap, R5, regs[R5]); in pmz_load_zsregs()
177 write_zsreg(uap, R1, regs[R1]); in pmz_load_zsregs()
180 write_zsreg(uap, R9, regs[R9]); in pmz_load_zsregs()
191 static void pmz_maybe_update_regs(struct uart_pmac_port *uap) in pmz_maybe_update_regs() argument
193 if (!ZS_REGS_HELD(uap)) { in pmz_maybe_update_regs()
194 if (ZS_TX_ACTIVE(uap)) { in pmz_maybe_update_regs()
195 uap->flags |= PMACZILOG_FLAG_REGS_HELD; in pmz_maybe_update_regs()
198 pmz_load_zsregs(uap, uap->curregs); in pmz_maybe_update_regs()
203 static void pmz_interrupt_control(struct uart_pmac_port *uap, int enable) in pmz_interrupt_control() argument
206 uap->curregs[1] |= INT_ALL_Rx | TxINT_ENAB; in pmz_interrupt_control()
207 if (!ZS_IS_EXTCLK(uap)) in pmz_interrupt_control()
208 uap->curregs[1] |= EXT_INT_ENAB; in pmz_interrupt_control()
210 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in pmz_interrupt_control()
212 write_zsreg(uap, R1, uap->curregs[1]); in pmz_interrupt_control()
215 static bool pmz_receive_chars(struct uart_pmac_port *uap) in pmz_receive_chars() argument
216 __must_hold(&uap->port.lock) in pmz_receive_chars()
223 if (uap->port.state == NULL) { in pmz_receive_chars()
225 (void)read_zsdata(uap); in pmz_receive_chars()
228 port = &uap->port.state->port; in pmz_receive_chars()
233 r1 = read_zsreg(uap, R1); in pmz_receive_chars()
234 ch = read_zsdata(uap); in pmz_receive_chars()
237 write_zsreg(uap, R0, ERR_RES); in pmz_receive_chars()
238 zssync(uap); in pmz_receive_chars()
241 ch &= uap->parity_mask; in pmz_receive_chars()
242 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) { in pmz_receive_chars()
243 uap->flags &= ~PMACZILOG_FLAG_BREAK; in pmz_receive_chars()
250 uap->port.sysrq = jiffies + HZ*5; in pmz_receive_chars()
254 if (uap->port.sysrq) { in pmz_receive_chars()
256 spin_unlock(&uap->port.lock); in pmz_receive_chars()
257 swallow = uart_handle_sysrq_char(&uap->port, ch); in pmz_receive_chars()
258 spin_lock(&uap->port.lock); in pmz_receive_chars()
269 uap->port.icount.rx++; in pmz_receive_chars()
275 uap->port.icount.brk++; in pmz_receive_chars()
276 if (uart_handle_break(&uap->port)) in pmz_receive_chars()
280 uap->port.icount.parity++; in pmz_receive_chars()
282 uap->port.icount.frame++; in pmz_receive_chars()
284 uap->port.icount.overrun++; in pmz_receive_chars()
285 r1 &= uap->port.read_status_mask; in pmz_receive_chars()
294 if (uap->port.ignore_status_mask == 0xff || in pmz_receive_chars()
295 (r1 & uap->port.ignore_status_mask) == 0) { in pmz_receive_chars()
310 ch = read_zsreg(uap, R0); in pmz_receive_chars()
317 pmz_interrupt_control(uap, 0); in pmz_receive_chars()
322 static void pmz_status_handle(struct uart_pmac_port *uap) in pmz_status_handle() argument
326 status = read_zsreg(uap, R0); in pmz_status_handle()
327 write_zsreg(uap, R0, RES_EXT_INT); in pmz_status_handle()
328 zssync(uap); in pmz_status_handle()
330 if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) { in pmz_status_handle()
332 uap->port.icount.dsr++; in pmz_status_handle()
339 if ((status ^ uap->prev_status) & DCD) in pmz_status_handle()
340 uart_handle_dcd_change(&uap->port, in pmz_status_handle()
342 if ((status ^ uap->prev_status) & CTS) in pmz_status_handle()
343 uart_handle_cts_change(&uap->port, in pmz_status_handle()
346 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pmz_status_handle()
350 uap->flags |= PMACZILOG_FLAG_BREAK; in pmz_status_handle()
352 uap->prev_status = status; in pmz_status_handle()
355 static void pmz_transmit_chars(struct uart_pmac_port *uap) in pmz_transmit_chars() argument
359 if (ZS_IS_CONS(uap)) { in pmz_transmit_chars()
360 unsigned char status = read_zsreg(uap, R0); in pmz_transmit_chars()
374 uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE; in pmz_transmit_chars()
376 if (ZS_REGS_HELD(uap)) { in pmz_transmit_chars()
377 pmz_load_zsregs(uap, uap->curregs); in pmz_transmit_chars()
378 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD; in pmz_transmit_chars()
381 if (ZS_TX_STOPPED(uap)) { in pmz_transmit_chars()
382 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED; in pmz_transmit_chars()
394 if (!ZS_IS_OPEN(uap)) in pmz_transmit_chars()
397 if (uap->port.x_char) { in pmz_transmit_chars()
398 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; in pmz_transmit_chars()
399 write_zsdata(uap, uap->port.x_char); in pmz_transmit_chars()
400 zssync(uap); in pmz_transmit_chars()
401 uap->port.icount.tx++; in pmz_transmit_chars()
402 uap->port.x_char = 0; in pmz_transmit_chars()
406 if (uap->port.state == NULL) in pmz_transmit_chars()
408 xmit = &uap->port.state->xmit; in pmz_transmit_chars()
410 uart_write_wakeup(&uap->port); in pmz_transmit_chars()
413 if (uart_tx_stopped(&uap->port)) in pmz_transmit_chars()
416 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; in pmz_transmit_chars()
417 write_zsdata(uap, xmit->buf[xmit->tail]); in pmz_transmit_chars()
418 zssync(uap); in pmz_transmit_chars()
421 uap->port.icount.tx++; in pmz_transmit_chars()
424 uart_write_wakeup(&uap->port); in pmz_transmit_chars()
429 write_zsreg(uap, R0, RES_Tx_P); in pmz_transmit_chars()
430 zssync(uap); in pmz_transmit_chars()
436 struct uart_pmac_port *uap = dev_id; in pmz_interrupt() local
443 uap_a = pmz_get_port_A(uap); in pmz_interrupt()
472 tty_flip_buffer_push(&uap->port.state->port); in pmz_interrupt()
497 tty_flip_buffer_push(&uap->port.state->port); in pmz_interrupt()
506 static inline u8 pmz_peek_status(struct uart_pmac_port *uap) in pmz_peek_status() argument
511 spin_lock_irqsave(&uap->port.lock, flags); in pmz_peek_status()
512 status = read_zsreg(uap, R0); in pmz_peek_status()
513 spin_unlock_irqrestore(&uap->port.lock, flags); in pmz_peek_status()
540 struct uart_pmac_port *uap = to_pmz(port); in pmz_set_mctrl() local
544 if (ZS_IS_IRDA(uap)) in pmz_set_mctrl()
547 if (!(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap))) in pmz_set_mctrl()
552 if (ZS_IS_INTMODEM(uap)) { in pmz_set_mctrl()
564 uap->curregs[R5] |= set_bits; in pmz_set_mctrl()
565 uap->curregs[R5] &= ~clear_bits; in pmz_set_mctrl()
567 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_set_mctrl()
569 set_bits, clear_bits, uap->curregs[R5]); in pmz_set_mctrl()
570 zssync(uap); in pmz_set_mctrl()
580 struct uart_pmac_port *uap = to_pmz(port); in pmz_get_mctrl() local
584 status = read_zsreg(uap, R0); in pmz_get_mctrl()
613 struct uart_pmac_port *uap = to_pmz(port); in pmz_start_tx() local
618 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; in pmz_start_tx()
619 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED; in pmz_start_tx()
621 status = read_zsreg(uap, R0); in pmz_start_tx()
631 write_zsdata(uap, port->x_char); in pmz_start_tx()
632 zssync(uap); in pmz_start_tx()
640 write_zsdata(uap, xmit->buf[xmit->tail]); in pmz_start_tx()
641 zssync(uap); in pmz_start_tx()
646 uart_write_wakeup(&uap->port); in pmz_start_tx()
660 struct uart_pmac_port *uap = to_pmz(port); in pmz_stop_rx() local
665 uap->curregs[R1] &= ~RxINT_MASK; in pmz_stop_rx()
666 pmz_maybe_update_regs(uap); in pmz_stop_rx()
677 struct uart_pmac_port *uap = to_pmz(port); in pmz_enable_ms() local
680 if (ZS_IS_IRDA(uap)) in pmz_enable_ms()
682 new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in pmz_enable_ms()
683 if (new_reg != uap->curregs[R15]) { in pmz_enable_ms()
684 uap->curregs[R15] = new_reg; in pmz_enable_ms()
687 write_zsreg(uap, R15, uap->curregs[R15]); in pmz_enable_ms()
697 struct uart_pmac_port *uap = to_pmz(port); in pmz_break_ctl() local
710 new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits; in pmz_break_ctl()
711 if (new_reg != uap->curregs[R5]) { in pmz_break_ctl()
712 uap->curregs[R5] = new_reg; in pmz_break_ctl()
713 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_break_ctl()
727 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state) in pmz_set_scc_power() argument
734 PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1); in pmz_set_scc_power()
736 if (ZS_IS_INTMODEM(uap)) { in pmz_set_scc_power()
738 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1); in pmz_set_scc_power()
746 if (ZS_IS_INTMODEM(uap)) { in pmz_set_scc_power()
748 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0); in pmz_set_scc_power()
751 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0); in pmz_set_scc_power()
758 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state) in pmz_set_scc_power() argument
785 static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap) in pmz_fix_zero_bug_scc() argument
787 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB); in pmz_fix_zero_bug_scc()
788 zssync(uap); in pmz_fix_zero_bug_scc()
790 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV); in pmz_fix_zero_bug_scc()
791 zssync(uap); in pmz_fix_zero_bug_scc()
793 write_zsreg(uap, 4, X1CLK | MONSYNC); in pmz_fix_zero_bug_scc()
794 write_zsreg(uap, 3, Rx8); in pmz_fix_zero_bug_scc()
795 write_zsreg(uap, 5, Tx8 | RTS); in pmz_fix_zero_bug_scc()
796 write_zsreg(uap, 9, NV); /* Didn't we already do this? */ in pmz_fix_zero_bug_scc()
797 write_zsreg(uap, 11, RCBR | TCBR); in pmz_fix_zero_bug_scc()
798 write_zsreg(uap, 12, 0); in pmz_fix_zero_bug_scc()
799 write_zsreg(uap, 13, 0); in pmz_fix_zero_bug_scc()
800 write_zsreg(uap, 14, (LOOPBAK | BRSRC)); in pmz_fix_zero_bug_scc()
801 write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB)); in pmz_fix_zero_bug_scc()
802 write_zsreg(uap, 3, Rx8 | RxENABLE); in pmz_fix_zero_bug_scc()
803 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
804 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
805 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */ in pmz_fix_zero_bug_scc()
812 write_zsreg(uap, 9, NV); in pmz_fix_zero_bug_scc()
813 write_zsreg(uap, 4, X16CLK | SB_MASK); in pmz_fix_zero_bug_scc()
814 write_zsreg(uap, 3, Rx8); in pmz_fix_zero_bug_scc()
816 while (read_zsreg(uap, 0) & Rx_CH_AV) { in pmz_fix_zero_bug_scc()
817 (void)read_zsreg(uap, 8); in pmz_fix_zero_bug_scc()
818 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
819 write_zsreg(uap, 0, ERR_RES); in pmz_fix_zero_bug_scc()
829 static int __pmz_startup(struct uart_pmac_port *uap) in __pmz_startup() argument
833 memset(&uap->curregs, 0, sizeof(uap->curregs)); in __pmz_startup()
836 pwr_delay = pmz_set_scc_power(uap, 1); in __pmz_startup()
839 pmz_fix_zero_bug_scc(uap); in __pmz_startup()
842 uap->curregs[R9] = 0; in __pmz_startup()
843 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB); in __pmz_startup()
844 zssync(uap); in __pmz_startup()
846 write_zsreg(uap, 9, 0); in __pmz_startup()
847 zssync(uap); in __pmz_startup()
850 write_zsreg(uap, R1, 0); in __pmz_startup()
851 write_zsreg(uap, R0, ERR_RES); in __pmz_startup()
852 write_zsreg(uap, R0, ERR_RES); in __pmz_startup()
853 write_zsreg(uap, R0, RES_H_IUS); in __pmz_startup()
854 write_zsreg(uap, R0, RES_H_IUS); in __pmz_startup()
857 uap->curregs[R4] = X16CLK | SB1; in __pmz_startup()
858 uap->curregs[R3] = Rx8; in __pmz_startup()
859 uap->curregs[R5] = Tx8 | RTS; in __pmz_startup()
860 if (!ZS_IS_IRDA(uap)) in __pmz_startup()
861 uap->curregs[R5] |= DTR; in __pmz_startup()
862 uap->curregs[R12] = 0; in __pmz_startup()
863 uap->curregs[R13] = 0; in __pmz_startup()
864 uap->curregs[R14] = BRENAB; in __pmz_startup()
867 uap->curregs[R15] = BRKIE; in __pmz_startup()
870 uap->curregs[R9] |= NV | MIE; in __pmz_startup()
872 pmz_load_zsregs(uap, uap->curregs); in __pmz_startup()
875 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE); in __pmz_startup()
876 write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE); in __pmz_startup()
879 uap->prev_status = read_zsreg(uap, R0); in __pmz_startup()
884 static void pmz_irda_reset(struct uart_pmac_port *uap) in pmz_irda_reset() argument
888 spin_lock_irqsave(&uap->port.lock, flags); in pmz_irda_reset()
889 uap->curregs[R5] |= DTR; in pmz_irda_reset()
890 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_reset()
891 zssync(uap); in pmz_irda_reset()
892 spin_unlock_irqrestore(&uap->port.lock, flags); in pmz_irda_reset()
895 spin_lock_irqsave(&uap->port.lock, flags); in pmz_irda_reset()
896 uap->curregs[R5] &= ~DTR; in pmz_irda_reset()
897 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_reset()
898 zssync(uap); in pmz_irda_reset()
899 spin_unlock_irqrestore(&uap->port.lock, flags); in pmz_irda_reset()
909 struct uart_pmac_port *uap = to_pmz(port); in pmz_startup() local
915 uap->flags |= PMACZILOG_FLAG_IS_OPEN; in pmz_startup()
920 if (!ZS_IS_CONS(uap)) { in pmz_startup()
922 pwr_delay = __pmz_startup(uap); in pmz_startup()
925 sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line); in pmz_startup()
926 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED, in pmz_startup()
927 uap->irq_name, uap)) { in pmz_startup()
929 pmz_set_scc_power(uap, 0); in pmz_startup()
942 if (ZS_IS_IRDA(uap)) in pmz_startup()
943 pmz_irda_reset(uap); in pmz_startup()
947 pmz_interrupt_control(uap, 1); in pmz_startup()
957 struct uart_pmac_port *uap = to_pmz(port); in pmz_shutdown() local
965 pmz_interrupt_control(uap, 0); in pmz_shutdown()
967 if (!ZS_IS_CONS(uap)) { in pmz_shutdown()
969 uap->curregs[R3] &= ~RxENABLE; in pmz_shutdown()
970 uap->curregs[R5] &= ~TxENABLE; in pmz_shutdown()
973 uap->curregs[R5] &= ~SND_BRK; in pmz_shutdown()
974 pmz_maybe_update_regs(uap); in pmz_shutdown()
980 free_irq(uap->port.irq, uap); in pmz_shutdown()
984 uap->flags &= ~PMACZILOG_FLAG_IS_OPEN; in pmz_shutdown()
986 if (!ZS_IS_CONS(uap)) in pmz_shutdown()
987 pmz_set_scc_power(uap, 0); /* Shut the chip down */ in pmz_shutdown()
997 static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag, in pmz_convert_to_zs() argument
1006 if (baud >= 115200 && ZS_IS_IRDA(uap)) { in pmz_convert_to_zs()
1007 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
1008 uap->curregs[R11] = RCTRxCP | TCTRxCP; in pmz_convert_to_zs()
1009 uap->curregs[R14] = 0; /* BRG off */ in pmz_convert_to_zs()
1010 uap->curregs[R12] = 0; in pmz_convert_to_zs()
1011 uap->curregs[R13] = 0; in pmz_convert_to_zs()
1012 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK; in pmz_convert_to_zs()
1016 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
1017 uap->curregs[R11] = 0; in pmz_convert_to_zs()
1018 uap->curregs[R14] = 0; in pmz_convert_to_zs()
1021 uap->curregs[R4] = X32CLK; in pmz_convert_to_zs()
1022 uap->curregs[R11] = 0; in pmz_convert_to_zs()
1023 uap->curregs[R14] = 0; in pmz_convert_to_zs()
1026 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
1027 uap->curregs[R11] = TCBR | RCBR; in pmz_convert_to_zs()
1029 uap->curregs[R12] = (brg & 255); in pmz_convert_to_zs()
1030 uap->curregs[R13] = ((brg >> 8) & 255); in pmz_convert_to_zs()
1031 uap->curregs[R14] = BRENAB; in pmz_convert_to_zs()
1033 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK; in pmz_convert_to_zs()
1037 uap->curregs[3] &= ~RxN_MASK; in pmz_convert_to_zs()
1038 uap->curregs[5] &= ~TxN_MASK; in pmz_convert_to_zs()
1042 uap->curregs[3] |= Rx5; in pmz_convert_to_zs()
1043 uap->curregs[5] |= Tx5; in pmz_convert_to_zs()
1044 uap->parity_mask = 0x1f; in pmz_convert_to_zs()
1047 uap->curregs[3] |= Rx6; in pmz_convert_to_zs()
1048 uap->curregs[5] |= Tx6; in pmz_convert_to_zs()
1049 uap->parity_mask = 0x3f; in pmz_convert_to_zs()
1052 uap->curregs[3] |= Rx7; in pmz_convert_to_zs()
1053 uap->curregs[5] |= Tx7; in pmz_convert_to_zs()
1054 uap->parity_mask = 0x7f; in pmz_convert_to_zs()
1058 uap->curregs[3] |= Rx8; in pmz_convert_to_zs()
1059 uap->curregs[5] |= Tx8; in pmz_convert_to_zs()
1060 uap->parity_mask = 0xff; in pmz_convert_to_zs()
1063 uap->curregs[4] &= ~(SB_MASK); in pmz_convert_to_zs()
1065 uap->curregs[4] |= SB2; in pmz_convert_to_zs()
1067 uap->curregs[4] |= SB1; in pmz_convert_to_zs()
1069 uap->curregs[4] |= PAR_ENAB; in pmz_convert_to_zs()
1071 uap->curregs[4] &= ~PAR_ENAB; in pmz_convert_to_zs()
1073 uap->curregs[4] |= PAR_EVEN; in pmz_convert_to_zs()
1075 uap->curregs[4] &= ~PAR_EVEN; in pmz_convert_to_zs()
1077 uap->port.read_status_mask = Rx_OVR; in pmz_convert_to_zs()
1079 uap->port.read_status_mask |= CRC_ERR | PAR_ERR; in pmz_convert_to_zs()
1081 uap->port.read_status_mask |= BRK_ABRT; in pmz_convert_to_zs()
1083 uap->port.ignore_status_mask = 0; in pmz_convert_to_zs()
1085 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in pmz_convert_to_zs()
1087 uap->port.ignore_status_mask |= BRK_ABRT; in pmz_convert_to_zs()
1089 uap->port.ignore_status_mask |= Rx_OVR; in pmz_convert_to_zs()
1093 uap->port.ignore_status_mask = 0xff; in pmz_convert_to_zs()
1100 static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud) in pmz_irda_setup() argument
1145 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0 in pmz_irda_setup()
1146 || (read_zsreg(uap, R1) & ALL_SNT) == 0) { in pmz_irda_setup()
1156 (void)read_zsdata(uap); in pmz_irda_setup()
1157 (void)read_zsdata(uap); in pmz_irda_setup()
1158 (void)read_zsdata(uap); in pmz_irda_setup()
1160 while (read_zsreg(uap, R0) & Rx_CH_AV) { in pmz_irda_setup()
1161 read_zsdata(uap); in pmz_irda_setup()
1170 uap->curregs[R5] |= DTR; in pmz_irda_setup()
1171 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_setup()
1172 zssync(uap); in pmz_irda_setup()
1176 pmz_convert_to_zs(uap, CS8, 0, 19200); in pmz_irda_setup()
1177 pmz_load_zsregs(uap, uap->curregs); in pmz_irda_setup()
1181 write_zsdata(uap, 1); in pmz_irda_setup()
1183 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { in pmz_irda_setup()
1190 version = read_zsdata(uap); in pmz_irda_setup()
1198 write_zsdata(uap, cmdbyte); in pmz_irda_setup()
1200 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { in pmz_irda_setup()
1207 t = read_zsdata(uap); in pmz_irda_setup()
1214 (void)read_zsdata(uap); in pmz_irda_setup()
1215 (void)read_zsdata(uap); in pmz_irda_setup()
1216 (void)read_zsdata(uap); in pmz_irda_setup()
1220 uap->curregs[R5] &= ~DTR; in pmz_irda_setup()
1221 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_irda_setup()
1222 zssync(uap); in pmz_irda_setup()
1224 (void)read_zsdata(uap); in pmz_irda_setup()
1225 (void)read_zsdata(uap); in pmz_irda_setup()
1226 (void)read_zsdata(uap); in pmz_irda_setup()
1233 struct uart_pmac_port *uap = to_pmz(port); in __pmz_set_termios() local
1238 memcpy(&uap->termios_cache, termios, sizeof(struct ktermios)); in __pmz_set_termios()
1247 if (ZS_IS_IRDA(uap)) { in __pmz_set_termios()
1252 pmz_irda_setup(uap, &baud); in __pmz_set_termios()
1254 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud); in __pmz_set_termios()
1255 pmz_load_zsregs(uap, uap->curregs); in __pmz_set_termios()
1256 zssync(uap); in __pmz_set_termios()
1259 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud); in __pmz_set_termios()
1261 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) { in __pmz_set_termios()
1262 uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE; in __pmz_set_termios()
1263 uap->flags |= PMACZILOG_FLAG_MODEM_STATUS; in __pmz_set_termios()
1265 uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE); in __pmz_set_termios()
1266 uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS; in __pmz_set_termios()
1270 pmz_maybe_update_regs(uap); in __pmz_set_termios()
1281 struct uart_pmac_port *uap = to_pmz(port); in pmz_set_termios() local
1287 pmz_interrupt_control(uap, 0); in pmz_set_termios()
1293 if (ZS_IS_OPEN(uap)) in pmz_set_termios()
1294 pmz_interrupt_control(uap, 1); in pmz_set_termios()
1301 struct uart_pmac_port *uap = to_pmz(port); in pmz_type() local
1303 if (ZS_IS_IRDA(uap)) in pmz_type()
1305 else if (ZS_IS_INTMODEM(uap)) in pmz_type()
1337 struct uart_pmac_port *uap = in pmz_poll_get_char() local
1342 if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0) in pmz_poll_get_char()
1343 return read_zsdata(uap); in pmz_poll_get_char()
1353 struct uart_pmac_port *uap = in pmz_poll_put_char() local
1357 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) in pmz_poll_put_char()
1359 write_zsdata(uap, c); in pmz_poll_put_char()
1394 static int __init pmz_init_port(struct uart_pmac_port *uap) in pmz_init_port() argument
1396 struct device_node *np = uap->node; in pmz_init_port()
1410 uap->port.mapbase = r_ports.start; in pmz_init_port()
1411 uap->port.membase = ioremap(uap->port.mapbase, 0x1000); in pmz_init_port()
1413 uap->control_reg = uap->port.membase; in pmz_init_port()
1414 uap->data_reg = uap->control_reg + 0x10; in pmz_init_port()
1422 uap->flags |= PMACZILOG_FLAG_HAS_DMA; in pmz_init_port()
1427 if (ZS_HAS_DMA(uap)) { in pmz_init_port()
1428 uap->tx_dma_regs = ioremap(r_txdma.start, 0x100); in pmz_init_port()
1429 if (uap->tx_dma_regs == NULL) { in pmz_init_port()
1430 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA; in pmz_init_port()
1433 uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100); in pmz_init_port()
1434 if (uap->rx_dma_regs == NULL) { in pmz_init_port()
1435 iounmap(uap->tx_dma_regs); in pmz_init_port()
1436 uap->tx_dma_regs = NULL; in pmz_init_port()
1437 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA; in pmz_init_port()
1440 uap->tx_dma_irq = irq_of_parse_and_map(np, 1); in pmz_init_port()
1441 uap->rx_dma_irq = irq_of_parse_and_map(np, 2); in pmz_init_port()
1449 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM; in pmz_init_port()
1452 uap->flags |= PMACZILOG_FLAG_IS_IRDA; in pmz_init_port()
1453 uap->port_type = PMAC_SCC_ASYNC; in pmz_init_port()
1458 uap->flags |= PMACZILOG_FLAG_IS_IRDA; in pmz_init_port()
1460 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM; in pmz_init_port()
1462 if (ZS_IS_IRDA(uap)) in pmz_init_port()
1463 uap->port_type = PMAC_SCC_IRDA; in pmz_init_port()
1464 if (ZS_IS_INTMODEM(uap)) { in pmz_init_port()
1477 uap->port_type = PMAC_SCC_I2S1; in pmz_init_port()
1490 uap->port.iotype = UPIO_MEM; in pmz_init_port()
1491 uap->port.irq = irq_of_parse_and_map(np, 0); in pmz_init_port()
1492 uap->port.uartclk = ZS_CLOCK; in pmz_init_port()
1493 uap->port.fifosize = 1; in pmz_init_port()
1494 uap->port.ops = &pmz_pops; in pmz_init_port()
1495 uap->port.type = PORT_PMAC_ZILOG; in pmz_init_port()
1496 uap->port.flags = 0; in pmz_init_port()
1504 if (uap->port.irq == 0 && in pmz_init_port()
1508 uap->port.irq = irq_create_mapping(NULL, 64 + 15); in pmz_init_port()
1509 uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4); in pmz_init_port()
1510 uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5); in pmz_init_port()
1517 pmz_convert_to_zs(uap, CS8, 0, 9600); in pmz_init_port()
1525 static void pmz_dispose_port(struct uart_pmac_port *uap) in pmz_dispose_port() argument
1529 np = uap->node; in pmz_dispose_port()
1530 iounmap(uap->rx_dma_regs); in pmz_dispose_port()
1531 iounmap(uap->tx_dma_regs); in pmz_dispose_port()
1532 iounmap(uap->control_reg); in pmz_dispose_port()
1533 uap->node = NULL; in pmz_dispose_port()
1535 memset(uap, 0, sizeof(struct uart_pmac_port)); in pmz_dispose_port()
1543 struct uart_pmac_port *uap; in pmz_attach() local
1555 uap = &pmz_ports[i]; in pmz_attach()
1556 uap->dev = mdev; in pmz_attach()
1557 uap->port.dev = &mdev->ofdev.dev; in pmz_attach()
1558 dev_set_drvdata(&mdev->ofdev.dev, uap); in pmz_attach()
1563 if (macio_request_resources(uap->dev, "pmac_zilog")) in pmz_attach()
1566 uap->node); in pmz_attach()
1568 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED; in pmz_attach()
1570 return uart_add_one_port(&pmz_uart_reg, &uap->port); in pmz_attach()
1579 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); in pmz_detach() local
1581 if (!uap) in pmz_detach()
1584 uart_remove_one_port(&pmz_uart_reg, &uap->port); in pmz_detach()
1586 if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) { in pmz_detach()
1587 macio_release_resources(uap->dev); in pmz_detach()
1588 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED; in pmz_detach()
1591 uap->dev = NULL; in pmz_detach()
1592 uap->port.dev = NULL; in pmz_detach()
1600 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); in pmz_suspend() local
1602 if (uap == NULL) { in pmz_suspend()
1607 uart_suspend_port(&pmz_uart_reg, &uap->port); in pmz_suspend()
1615 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); in pmz_resume() local
1617 if (uap == NULL) in pmz_resume()
1620 uart_resume_port(&pmz_uart_reg, &uap->port); in pmz_resume()
1703 static int __init pmz_init_port(struct uart_pmac_port *uap) in pmz_init_port() argument
1707 r_ports = platform_get_resource(uap->pdev, IORESOURCE_MEM, 0); in pmz_init_port()
1708 r_irq = platform_get_resource(uap->pdev, IORESOURCE_IRQ, 0); in pmz_init_port()
1712 uap->port.mapbase = r_ports->start; in pmz_init_port()
1713 uap->port.membase = (unsigned char __iomem *) r_ports->start; in pmz_init_port()
1714 uap->port.iotype = UPIO_MEM; in pmz_init_port()
1715 uap->port.irq = r_irq->start; in pmz_init_port()
1716 uap->port.uartclk = ZS_CLOCK; in pmz_init_port()
1717 uap->port.fifosize = 1; in pmz_init_port()
1718 uap->port.ops = &pmz_pops; in pmz_init_port()
1719 uap->port.type = PORT_PMAC_ZILOG; in pmz_init_port()
1720 uap->port.flags = 0; in pmz_init_port()
1722 uap->control_reg = uap->port.membase; in pmz_init_port()
1723 uap->data_reg = uap->control_reg + 4; in pmz_init_port()
1724 uap->port_type = 0; in pmz_init_port()
1725 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PMACZILOG_CONSOLE); in pmz_init_port()
1727 pmz_convert_to_zs(uap, CS8, 0, 9600); in pmz_init_port()
1759 static void pmz_dispose_port(struct uart_pmac_port *uap) in pmz_dispose_port() argument
1761 memset(uap, 0, sizeof(struct uart_pmac_port)); in pmz_dispose_port()
1766 struct uart_pmac_port *uap; in pmz_attach() local
1776 uap = &pmz_ports[i]; in pmz_attach()
1777 uap->port.dev = &pdev->dev; in pmz_attach()
1778 platform_set_drvdata(pdev, uap); in pmz_attach()
1780 return uart_add_one_port(&pmz_uart_reg, &uap->port); in pmz_attach()
1785 struct uart_pmac_port *uap = platform_get_drvdata(pdev); in pmz_detach() local
1787 if (!uap) in pmz_detach()
1790 uart_remove_one_port(&pmz_uart_reg, &uap->port); in pmz_detach()
1792 uap->port.dev = NULL; in pmz_detach()
1945 struct uart_pmac_port *uap = in pmz_console_putchar() local
1949 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) in pmz_console_putchar()
1951 write_zsdata(uap, ch); in pmz_console_putchar()
1960 struct uart_pmac_port *uap = &pmz_ports[con->index]; in pmz_console_write() local
1963 spin_lock_irqsave(&uap->port.lock, flags); in pmz_console_write()
1966 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB); in pmz_console_write()
1967 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR); in pmz_console_write()
1969 uart_console_write(&uap->port, s, count, pmz_console_putchar); in pmz_console_write()
1972 write_zsreg(uap, R1, uap->curregs[1]); in pmz_console_write()
1975 spin_unlock_irqrestore(&uap->port.lock, flags); in pmz_console_write()
1983 struct uart_pmac_port *uap; in pmz_console_setup() local
2006 uap = &pmz_ports[co->index]; in pmz_console_setup()
2008 if (uap->node == NULL) in pmz_console_setup()
2011 if (uap->pdev == NULL) in pmz_console_setup()
2014 port = &uap->port; in pmz_console_setup()
2019 uap->flags |= PMACZILOG_FLAG_IS_CONS; in pmz_console_setup()
2029 pwr_delay = __pmz_startup(uap); in pmz_console_setup()