212 		writel_relaxed(val, base + TEGRA_USB_HOSTPC1_DEVLC);  in set_pts()
218 		writel_relaxed(val, base + TEGRA_USB_PORTSC1);  in set_pts()
233 		writel_relaxed(val, base + TEGRA_USB_HOSTPC1_DEVLC);  in set_phcd()
240 		writel_relaxed(val, base + TEGRA_USB_PORTSC1);  in set_phcd()
334 		writel_relaxed(val, base + UTMIP_BIAS_CFG0);  in utmip_pad_power_on()
365 		writel_relaxed(val, base + UTMIP_BIAS_CFG0);  in utmip_pad_power_off()
399 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_clk_disable()
405 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_clk_disable()
432 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_clk_enable()
438 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_clk_enable()
458 	writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_on()
463 		writel_relaxed(val, base + USB1_LEGACY_CTRL);  in utmi_phy_power_on()
468 	writel_relaxed(val, base + UTMIP_TX_CFG0);  in utmi_phy_power_on()
474 	writel_relaxed(val, base + UTMIP_HSRX_CFG0);  in utmi_phy_power_on()
479 	writel_relaxed(val, base + UTMIP_HSRX_CFG1);  in utmi_phy_power_on()
484 	writel_relaxed(val, base + UTMIP_DEBOUNCE_CFG0);  in utmi_phy_power_on()
488 	writel_relaxed(val, base + UTMIP_MISC_CFG0);  in utmi_phy_power_on()
496 		writel_relaxed(val, base + UTMIP_MISC_CFG1);  in utmi_phy_power_on()
503 		writel_relaxed(val, base + UTMIP_PLL_CFG1);  in utmi_phy_power_on()
509 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_on()
513 		writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);  in utmi_phy_power_on()
517 		writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);  in utmi_phy_power_on()
542 	writel_relaxed(val, base + UTMIP_XCVR_CFG0);  in utmi_phy_power_on()
548 	writel_relaxed(val, base + UTMIP_XCVR_CFG1);  in utmi_phy_power_on()
553 	writel_relaxed(val, base + UTMIP_BIAS_CFG1);  in utmi_phy_power_on()
560 	writel_relaxed(val, base + UTMIP_SPARE_CFG0);  in utmi_phy_power_on()
565 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_on()
570 	writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_on()
576 		writel_relaxed(val, base + USB1_LEGACY_CTRL);  in utmi_phy_power_on()
580 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_on()
592 		writel_relaxed(val, base + USB_USBMODE);  in utmi_phy_power_on()
612 		writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_off()
617 	writel_relaxed(val, base + USB_SUSP_CTRL);  in utmi_phy_power_off()
621 	writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);  in utmi_phy_power_off()
626 	writel_relaxed(val, base + UTMIP_XCVR_CFG0);  in utmi_phy_power_off()
631 	writel_relaxed(val, base + UTMIP_XCVR_CFG1);  in utmi_phy_power_off()
643 	writel_relaxed(val, base + UTMIP_TX_CFG0);  in utmi_phy_preresume()
653 	writel_relaxed(val, base + UTMIP_TX_CFG0);  in utmi_phy_postresume()
668 	writel_relaxed(val, base + UTMIP_MISC_CFG0);  in utmi_phy_restore_start()
673 	writel_relaxed(val, base + UTMIP_MISC_CFG0);  in utmi_phy_restore_start()
684 	writel_relaxed(val, base + UTMIP_MISC_CFG0);  in utmi_phy_restore_end()
708 	writel_relaxed(val, base + USB_SUSP_CTRL);  in ulpi_phy_power_on()
712 	writel_relaxed(val, base + ULPI_TIMING_CTRL_0);  in ulpi_phy_power_on()
716 	writel_relaxed(val, base + USB_SUSP_CTRL);  in ulpi_phy_power_on()
719 	writel_relaxed(val, base + ULPI_TIMING_CTRL_1);  in ulpi_phy_power_on()
724 	writel_relaxed(val, base + ULPI_TIMING_CTRL_1);  in ulpi_phy_power_on()
730 	writel_relaxed(val, base + ULPI_TIMING_CTRL_1);  in ulpi_phy_power_on()
747 	writel_relaxed(val, base + USB_SUSP_CTRL);  in ulpi_phy_power_on()
752 	writel_relaxed(val, base + USB_SUSP_CTRL);  in ulpi_phy_power_on()