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184 #define RT5640_VOL_L_MUTE			(0x1 << 14)
185 #define RT5640_VOL_L_SFT 14
256 #define RT5640_ADC_L_BST_MASK (0x3 << 14)
257 #define RT5640_ADC_L_BST_SFT 14
264 #define RT5640_M_ADC_L1 (0x1 << 14)
265 #define RT5640_M_ADC_L1_SFT 14
283 #define RT5640_M_MONO_ADC_L1 (0x1 << 14)
284 #define RT5640_M_MONO_ADC_L1_SFT 14
313 #define RT5640_M_IF1_DAC_L (0x1 << 14)
314 #define RT5640_M_IF1_DAC_L_SFT 14
321 #define RT5640_M_DAC_L1 (0x1 << 14)
322 #define RT5640_M_DAC_L1_SFT 14
343 #define RT5640_M_DAC_L1_MONO_L (0x1 << 14)
344 #define RT5640_M_DAC_L1_MONO_L_SFT 14
371 #define RT5640_STO_L_DAC_L_VOL_MASK (0x1 << 14)
372 #define RT5640_STO_L_DAC_L_VOL_SFT 14
391 #define RT5640_TXDP_SRC_MASK (0x1 << 14)
392 #define RT5640_TXDP_SRC_SFT 14
393 #define RT5640_TXDP_SRC_NOR (0x0 << 14)
394 #define RT5640_TXDP_SRC_DIV3 (0x1 << 14)
397 #define RT5640_DAC_L2_SEL_MASK (0x3 << 14)
398 #define RT5640_DAC_L2_SEL_SFT 14
399 #define RT5640_DAC_L2_SEL_IF2 (0x0 << 14)
400 #define RT5640_DAC_L2_SEL_IF3 (0x1 << 14)
401 #define RT5640_DAC_L2_SEL_TXDC (0x2 << 14)
402 #define RT5640_DAC_L2_SEL_BASS (0x3 << 14)
442 #define RT5640_IF1_DAC_SEL_MASK (0x3 << 14)
443 #define RT5640_IF1_DAC_SEL_SFT 14
444 #define RT5640_IF1_DAC_SEL_NOR (0x0 << 14)
445 #define RT5640_IF1_DAC_SEL_SWAP (0x1 << 14)
446 #define RT5640_IF1_DAC_SEL_L2R (0x2 << 14)
447 #define RT5640_IF1_DAC_SEL_R2L (0x3 << 14)
546 #define RT5640_M_DAC1_HM (0x1 << 14)
547 #define RT5640_M_DAC1_HM_SFT 14
554 #define RT5640_G_RM_L_SM_L_MASK (0x3 << 14)
555 #define RT5640_G_RM_L_SM_L_SFT 14
576 #define RT5640_G_RM_R_SM_R_MASK (0x3 << 14)
577 #define RT5640_G_RM_R_SM_R_SFT 14
600 #define RT5640_M_DAC_L1_SPM_L (0x1 << 14)
601 #define RT5640_M_DAC_L1_SPM_L_SFT 14
624 #define RT5640_M_DAC_L2_MM (0x1 << 14)
625 #define RT5640_M_DAC_L2_MM_SFT 14
718 #define RT5640_M_DAC_R1_LM (0x1 << 14)
719 #define RT5640_M_DAC_R1_LM_SFT 14
730 #define RT5640_PWR_I2S2 (0x1 << 14)
731 #define RT5640_PWR_I2S2_BIT 14
750 #define RT5640_PWR_ADC_MF_L (0x1 << 14)
751 #define RT5640_PWR_ADC_MF_L_BIT 14
760 #define RT5640_PWR_FV1 (0x1 << 14)
761 #define RT5640_PWR_FV1_BIT 14
788 #define RT5640_PWR_BST2 (0x1 << 14)
789 #define RT5640_PWR_BST2_BIT 14
802 #define RT5640_PWR_OM_R (0x1 << 14)
803 #define RT5640_PWR_OM_R_BIT 14
816 #define RT5640_PWR_SV_R (0x1 << 14)
817 #define RT5640_PWR_SV_R_BIT 14
928 #define RT5640_DAC_L_OSR_MASK (0x3 << 14)
929 #define RT5640_DAC_L_OSR_SFT 14
930 #define RT5640_DAC_L_OSR_128 (0x0 << 14)
931 #define RT5640_DAC_L_OSR_64 (0x1 << 14)
932 #define RT5640_DAC_L_OSR_32 (0x2 << 14)
933 #define RT5640_DAC_L_OSR_16 (0x3 << 14)
950 #define RT5640_DMIC_2_EN_MASK (0x1 << 14)
951 #define RT5640_DMIC_2_EN_SFT 14
952 #define RT5640_DMIC_2_DIS (0x0 << 14)
953 #define RT5640_DMIC_2_EN (0x1 << 14)
982 #define RT5640_SCLK_SRC_MASK (0x3 << 14)
983 #define RT5640_SCLK_SRC_SFT 14
984 #define RT5640_SCLK_SRC_MCLK (0x0 << 14)
985 #define RT5640_SCLK_SRC_PLL1 (0x1 << 14)
986 #define RT5640_SCLK_SRC_RCCLK (0x2 << 14)
1020 #define RT5640_M1_T_MASK (0x1 << 14)
1021 #define RT5640_M1_T_SFT 14
1022 #define RT5640_M1_T_I2S2 (0x0 << 14)
1023 #define RT5640_M1_T_I2S2_D3 (0x1 << 14)
1046 #define RT5640_MDA_R_M_MASK (0x1 << 14)
1047 #define RT5640_MDA_R_M_SFT 14
1048 #define RT5640_MDA_R_M_NOR (0x0 << 14)
1049 #define RT5640_MDA_R_M_ASYN (0x1 << 14)
1252 #define RT5640_SPK_AG_MASK (0x1 << 14)
1253 #define RT5640_SPK_AG_SFT 14
1254 #define RT5640_SPK_AG_DIS (0x0 << 14)
1255 #define RT5640_SPK_AG_EN (0x1 << 14)
1262 #define RT5640_MIC2_BS_MASK (0x1 << 14)
1263 #define RT5640_MIC2_BS_SFT 14
1264 #define RT5640_MIC2_BS_9AV (0x0 << 14)
1265 #define RT5640_MIC2_BS_75AV (0x1 << 14)
1306 #define RT5640_EQ_UPD (0x1 << 14)
1307 #define RT5640_EQ_UPD_BIT 14
1368 #define RT5640_DRC_AGC_MASK (0x1 << 14)
1369 #define RT5640_DRC_AGC_SFT 14
1370 #define RT5640_DRC_AGC_DIS (0x0 << 14)
1371 #define RT5640_DRC_AGC_EN (0x1 << 14)
1424 #define RT5640_ANC_MASK (0x1 << 14)
1425 #define RT5640_ANC_SFT 14
1426 #define RT5640_ANC_DIS (0x0 << 14)
1427 #define RT5640_ANC_EN (0x1 << 14)
1563 #define RT5640_IRQ_OT_MASK (0x1 << 14)
1564 #define RT5640_IRQ_OT_SFT 14
1565 #define RT5640_IRQ_OT_BP (0x0 << 14)
1566 #define RT5640_IRQ_OT_NOR (0x1 << 14)
1589 #define RT5640_IRQ_MB2_OC_MASK (0x1 << 14)
1590 #define RT5640_IRQ_MB2_OC_SFT 14
1591 #define RT5640_IRQ_MB2_OC_BP (0x0 << 14)
1592 #define RT5640_IRQ_MB2_OC_NOR (0x1 << 14)
1626 #define RT5640_GP2_PIN_MASK (0x1 << 14)
1627 #define RT5640_GP2_PIN_SFT 14
1628 #define RT5640_GP2_PIN_GPIO2 (0x0 << 14)
1629 #define RT5640_GP2_PIN_DMIC1_SCL (0x1 << 14)
1707 #define RT5640_DSP_DS_MASK (0x1 << 14)
1708 #define RT5640_DSP_DS_SFT 14
1709 #define RT5640_DSP_DS_FM3010 (0x1 << 14)
1710 #define RT5640_DSP_DS_TEMP (0x1 << 14)
1793 #define RT5640_SCB_MASK (0x1 << 14)
1794 #define RT5640_SCB_SFT 14
1795 #define RT5640_SCB_DIS (0x0 << 14)
1796 #define RT5640_SCB_EN (0x1 << 14)
1823 #define RT5640_M_MP3_R_MASK (0x1 << 14)
1824 #define RT5640_M_MP3_R_SFT 14
1855 #define RT5640_3D_HP_MASK (0x1 << 14)
1856 #define RT5640_3D_HP_SFT 14
1857 #define RT5640_3D_HP_DIS (0x0 << 14)
1858 #define RT5640_3D_HP_EN (0x1 << 14)
1942 #define RT5640_SPO_SV_MASK (0x1 << 14)
1943 #define RT5640_SPO_SV_SFT 14
1944 #define RT5640_SPO_SV_DIS (0x0 << 14)
1945 #define RT5640_SPO_SV_EN (0x1 << 14)
2046 #define RT5640_DP_ATT_MASK (0x3 << 14)
2047 #define RT5640_DP_ATT_SFT 14