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Lines Matching full:14

221 #define RT5645_VOL_L_MUTE			(0x1 << 14)
222 #define RT5645_VOL_L_SFT 14
250 #define RT5645_CBJ_TIE_G_R (0x1 << 14)
309 #define RT5645_STO1_ADC_L_BST_MASK (0x3 << 14)
310 #define RT5645_STO1_ADC_L_BST_SFT 14
317 #define RT5645_MONO_ADC_L_BST_MASK (0x3 << 14)
318 #define RT5645_MONO_ADC_L_BST_SFT 14
329 #define RT5645_M_ADC_L1 (0x1 << 14)
330 #define RT5645_M_ADC_L1_SFT 14
349 #define RT5645_M_MONO_ADC_L1 (0x1 << 14)
350 #define RT5645_M_MONO_ADC_L1_SFT 14
377 #define RT5645_M_DAC1_L (0x1 << 14)
378 #define RT5645_M_DAC1_L_SFT 14
397 #define RT5645_M_DAC_L1 (0x1 << 14)
398 #define RT5645_M_DAC_L1_SFT 14
427 #define RT5645_M_DAC_L1_MONO_L (0x1 << 14)
428 #define RT5645_M_DAC_L1_MONO_L_SFT 14
455 #define RT5645_STO_L_DAC_L_VOL_MASK (0x1 << 14)
456 #define RT5645_STO_L_DAC_L_VOL_SFT 14
503 #define RT5645_M_PDM1_L (0x1 << 14)
504 #define RT5645_M_PDM1_L_SFT 14
602 #define RT5645_M_DAC1_HM (0x1 << 14)
603 #define RT5645_M_DAC1_HM_SFT 14
609 #define RT5645_G_RM_L_SM_L_MASK (0x3 << 14)
610 #define RT5645_G_RM_L_SM_L_SFT 14
631 #define RT5645_G_RM_R_SM_R_MASK (0x3 << 14)
632 #define RT5645_G_RM_R_SM_R_SFT 14
655 #define RT5645_M_DAC_R1_SPM_L (0x1 << 14)
656 #define RT5645_M_DAC_R1_SPM_L_SFT 14
759 #define RT5645_M_DAC_R1_LM (0x1 << 14)
760 #define RT5645_M_DAC_R1_LM_SFT 14
771 #define RT5645_PWR_I2S2 (0x1 << 14)
772 #define RT5645_PWR_I2S2_BIT 14
797 #define RT5645_PWR_ADC_MF_L (0x1 << 14)
798 #define RT5645_PWR_ADC_MF_L_BIT 14
821 #define RT5645_PWR_FV1 (0x1 << 14)
822 #define RT5645_PWR_FV1_BIT 14
847 #define RT5645_PWR_BST2 (0x1 << 14)
848 #define RT5645_PWR_BST2_BIT 14
873 #define RT5645_PWR_OM_R (0x1 << 14)
874 #define RT5645_PWR_OM_R_BIT 14
895 #define RT5645_PWR_SV_R (0x1 << 14)
896 #define RT5645_PWR_SV_R_BIT 14
999 #define RT5645_DAC_L_OSR_MASK (0x3 << 14)
1000 #define RT5645_DAC_L_OSR_SFT 14
1001 #define RT5645_DAC_L_OSR_128 (0x0 << 14)
1002 #define RT5645_DAC_L_OSR_64 (0x1 << 14)
1003 #define RT5645_DAC_L_OSR_32 (0x2 << 14)
1004 #define RT5645_DAC_L_OSR_16 (0x3 << 14)
1021 #define RT5645_DMIC_2_EN_MASK (0x1 << 14)
1022 #define RT5645_DMIC_2_EN_SFT 14
1023 #define RT5645_DMIC_2_DIS (0x0 << 14)
1024 #define RT5645_DMIC_2_EN (0x1 << 14)
1064 #define RT5645_SCLK_SRC_MASK (0x3 << 14)
1065 #define RT5645_SCLK_SRC_SFT 14
1066 #define RT5645_SCLK_SRC_MCLK (0x0 << 14)
1067 #define RT5645_SCLK_SRC_PLL1 (0x1 << 14)
1068 #define RT5645_SCLK_SRC_RCCLK (0x2 << 14)
1103 #define RT5645_M1_T_MASK (0x1 << 14)
1104 #define RT5645_M1_T_SFT 14
1105 #define RT5645_M1_T_I2S2 (0x0 << 14)
1106 #define RT5645_M1_T_I2S2_D3 (0x1 << 14)
1287 #define RT5645_SPK_AG_MASK (0x1 << 14)
1288 #define RT5645_SPK_AG_SFT 14
1289 #define RT5645_SPK_AG_DIS (0x0 << 14)
1290 #define RT5645_SPK_AG_EN (0x1 << 14)
1297 #define RT5645_MIC2_BS_MASK (0x1 << 14)
1298 #define RT5645_MIC2_BS_SFT 14
1299 #define RT5645_MIC2_BS_9AV (0x0 << 14)
1300 #define RT5645_MIC2_BS_75AV (0x1 << 14)
1351 #define RT5645_EQ_UPD (0x1 << 14)
1352 #define RT5645_EQ_UPD_BIT 14
1414 #define RT5645_DRC_AGC_MASK (0x1 << 14)
1415 #define RT5645_DRC_AGC_SFT 14
1416 #define RT5645_DRC_AGC_DIS (0x0 << 14)
1417 #define RT5645_DRC_AGC_EN (0x1 << 14)
1470 #define RT5645_ANC_MASK (0x1 << 14)
1471 #define RT5645_ANC_SFT 14
1472 #define RT5645_ANC_DIS (0x0 << 14)
1473 #define RT5645_ANC_EN (0x1 << 14)
1609 #define RT5645_IRQ_OT_MASK (0x1 << 14)
1610 #define RT5645_IRQ_OT_SFT 14
1611 #define RT5645_IRQ_OT_BP (0x0 << 14)
1612 #define RT5645_IRQ_OT_NOR (0x1 << 14)
1640 #define RT5645_IRQ_MB2_OC_MASK (0x1 << 14)
1641 #define RT5645_IRQ_MB2_OC_SFT 14
1642 #define RT5645_IRQ_MB2_OC_BP (0x0 << 14)
1643 #define RT5645_IRQ_MB2_OC_NOR (0x1 << 14)
1670 #define RT5645_GP2_PIN_MASK (0x1 << 14)
1671 #define RT5645_GP2_PIN_SFT 14
1672 #define RT5645_GP2_PIN_GPIO2 (0x0 << 14)
1673 #define RT5645_GP2_PIN_DMIC1_SCL (0x1 << 14)
1829 #define RT5645_SCB_MASK (0x1 << 14)
1830 #define RT5645_SCB_SFT 14
1831 #define RT5645_SCB_DIS (0x0 << 14)
1832 #define RT5645_SCB_EN (0x1 << 14)
1860 #define RT5645_M_MP3_R_MASK (0x1 << 14)
1861 #define RT5645_M_MP3_R_SFT 14
1892 #define RT5645_3D_HP_MASK (0x1 << 14)
1893 #define RT5645_3D_HP_SFT 14
1894 #define RT5645_3D_HP_DIS (0x0 << 14)
1895 #define RT5645_3D_HP_EN (0x1 << 14)
1979 #define RT5645_SPO_SV_MASK (0x1 << 14)
1980 #define RT5645_SPO_SV_SFT 14
1981 #define RT5645_SPO_SV_DIS (0x0 << 14)
1982 #define RT5645_SPO_SV_EN (0x1 << 14)
2071 #define RT5645_DP_ATT_MASK (0x3 << 14)
2072 #define RT5645_DP_ATT_SFT 14