Lines Matching +full:dmic +full:- +full:ref
1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682.c -- RT5682 ALSA SoC audio component driver
26 #include <sound/soc-dapm.h>
54 ret = regmap_multi_reg_write(rt5682->regmap, patch_list, in rt5682_apply_patch_list()
743 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
744 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
811 regmap_write(rt5682->regmap, RT5682_RESET, 0); in rt5682_reset()
812 if (!rt5682->is_sdw) in rt5682_reset()
813 regmap_write(rt5682->regmap, RT5682_I2C_MODE, 1); in rt5682_reset()
818 * rt5682_sel_asrc_clk_src - select ASRC clock source for a set of filters
841 return -EINVAL; in rt5682_sel_asrc_clk_src()
867 dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type); in rt5682_button_detect()
888 if (rt5682->is_sdw) in rt5682_enable_push_button_irq()
912 * rt5682_headset_detect - Detect headset.
923 struct snd_soc_dapm_context *dapm = &component->dapm; in rt5682_headset_detect()
958 rt5682->jack_type = SND_JACK_HEADSET; in rt5682_headset_detect()
962 rt5682->jack_type = SND_JACK_HEADPHONE; in rt5682_headset_detect()
995 rt5682->jack_type = 0; in rt5682_headset_detect()
998 dev_dbg(component->dev, "jack_type = %d\n", rt5682->jack_type); in rt5682_headset_detect()
999 return rt5682->jack_type; in rt5682_headset_detect()
1008 rt5682->hs_jack = hs_jack; in rt5682_set_jack_detect()
1011 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, in rt5682_set_jack_detect()
1013 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, in rt5682_set_jack_detect()
1015 cancel_delayed_work_sync(&rt5682->jack_detect_work); in rt5682_set_jack_detect()
1020 if (!rt5682->is_sdw) { in rt5682_set_jack_detect()
1021 switch (rt5682->pdata.jd_src) { in rt5682_set_jack_detect()
1034 regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, in rt5682_set_jack_detect()
1036 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, in rt5682_set_jack_detect()
1040 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, in rt5682_set_jack_detect()
1042 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, in rt5682_set_jack_detect()
1045 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_4, in rt5682_set_jack_detect()
1046 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1047 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1048 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_5, in rt5682_set_jack_detect()
1049 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1050 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1051 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_6, in rt5682_set_jack_detect()
1052 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1053 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1054 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_7, in rt5682_set_jack_detect()
1055 0x7f7f, (rt5682->pdata.btndet_delay << 8 | in rt5682_set_jack_detect()
1056 rt5682->pdata.btndet_delay)); in rt5682_set_jack_detect()
1058 &rt5682->jack_detect_work, in rt5682_set_jack_detect()
1063 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, in rt5682_set_jack_detect()
1065 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, in rt5682_set_jack_detect()
1070 dev_warn(component->dev, "Wrong JD source\n"); in rt5682_set_jack_detect()
1084 while (!rt5682->component) in rt5682_jack_detect_handler()
1087 while (!rt5682->component->card->instantiated) in rt5682_jack_detect_handler()
1090 mutex_lock(&rt5682->calibrate_mutex); in rt5682_jack_detect_handler()
1092 val = snd_soc_component_read(rt5682->component, RT5682_AJD1_CTRL) in rt5682_jack_detect_handler()
1096 if (rt5682->jack_type == 0) { in rt5682_jack_detect_handler()
1098 rt5682->jack_type = in rt5682_jack_detect_handler()
1099 rt5682_headset_detect(rt5682->component, 1); in rt5682_jack_detect_handler()
1100 } else if ((rt5682->jack_type & SND_JACK_HEADSET) == in rt5682_jack_detect_handler()
1103 rt5682->jack_type = SND_JACK_HEADSET; in rt5682_jack_detect_handler()
1104 btn_type = rt5682_button_detect(rt5682->component); in rt5682_jack_detect_handler()
1116 rt5682->jack_type |= SND_JACK_BTN_0; in rt5682_jack_detect_handler()
1121 rt5682->jack_type |= SND_JACK_BTN_1; in rt5682_jack_detect_handler()
1126 rt5682->jack_type |= SND_JACK_BTN_2; in rt5682_jack_detect_handler()
1131 rt5682->jack_type |= SND_JACK_BTN_3; in rt5682_jack_detect_handler()
1136 dev_err(rt5682->component->dev, in rt5682_jack_detect_handler()
1144 rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0); in rt5682_jack_detect_handler()
1147 snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type, in rt5682_jack_detect_handler()
1152 if (!rt5682->is_sdw) { in rt5682_jack_detect_handler()
1153 if (rt5682->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 | in rt5682_jack_detect_handler()
1155 schedule_delayed_work(&rt5682->jd_check_work, 0); in rt5682_jack_detect_handler()
1157 cancel_delayed_work_sync(&rt5682->jd_check_work); in rt5682_jack_detect_handler()
1160 mutex_unlock(&rt5682->calibrate_mutex); in rt5682_jack_detect_handler()
1190 if (rt5682->sysclk < target) { in rt5682_div_sel()
1191 dev_err(rt5682->component->dev, in rt5682_div_sel()
1192 "sysclk rate %d is too low\n", rt5682->sysclk); in rt5682_div_sel()
1196 for (i = 0; i < size - 1; i++) { in rt5682_div_sel()
1197 dev_dbg(rt5682->component->dev, "div[%d]=%d\n", i, div[i]); in rt5682_div_sel()
1198 if (target * div[i] == rt5682->sysclk) in rt5682_div_sel()
1200 if (target * div[i + 1] > rt5682->sysclk) { in rt5682_div_sel()
1201 dev_dbg(rt5682->component->dev, in rt5682_div_sel()
1203 rt5682->sysclk); in rt5682_div_sel()
1208 if (target * div[i] < rt5682->sysclk) in rt5682_div_sel()
1209 dev_err(rt5682->component->dev, in rt5682_div_sel()
1210 "sysclk rate %d is too high\n", rt5682->sysclk); in rt5682_div_sel()
1212 return size - 1; in rt5682_div_sel()
1216 * set_dmic_clk - Set parameter of dmic.
1222 * Choose dmic clock between 1MHz and 3MHz.
1229 snd_soc_dapm_to_component(w->dapm); in set_dmic_clk()
1231 int idx = -EINVAL, dmic_clk_rate = 3072000; in set_dmic_clk()
1234 if (rt5682->pdata.dmic_clk_rate) in set_dmic_clk()
1235 dmic_clk_rate = rt5682->pdata.dmic_clk_rate; in set_dmic_clk()
1249 snd_soc_dapm_to_component(w->dapm); in set_filter_clk()
1251 int ref, val, reg, idx = -EINVAL; in set_filter_clk() local
1255 if (rt5682->is_sdw) in set_filter_clk()
1260 if (w->shift == RT5682_PWR_ADC_S1F_BIT && in set_filter_clk()
1262 ref = 256 * rt5682->lrck[RT5682_AIF2]; in set_filter_clk()
1264 ref = 256 * rt5682->lrck[RT5682_AIF1]; in set_filter_clk()
1266 idx = rt5682_div_sel(rt5682, ref, div_f, ARRAY_SIZE(div_f)); in set_filter_clk()
1268 if (w->shift == RT5682_PWR_ADC_S1F_BIT) in set_filter_clk()
1278 if (rt5682->sysclk <= 12288000 * div_o[idx]) in set_filter_clk()
1294 snd_soc_dapm_to_component(w->dapm); in is_sys_clk_from_pll1()
1309 snd_soc_dapm_to_component(w->dapm); in is_sys_clk_from_pll2()
1324 snd_soc_dapm_to_component(w->dapm); in is_using_asrc()
1326 switch (w->shift) { in is_using_asrc()
1399 /* MX-26 [13] [5] */
1419 /* MX-26 [11:10] [3:2] */
1439 /* MX-26 [12] [4] */
1441 "DAC MIX", "DMIC"
1458 /* MX-79 [6:4] I2S1 ADC data location */
1478 /* MX-2B [4], MX-2B [0]*/
1509 snd_soc_dapm_to_component(w->dapm); in rt5682_hp_event()
1540 snd_soc_dapm_to_component(w->dapm); in set_dmic_power()
1544 if (rt5682->pdata.dmic_delay) in set_dmic_power()
1545 delay = rt5682->pdata.dmic_delay; in set_dmic_power()
1562 if (!rt5682->jack_type) { in set_dmic_power()
1563 if (!snd_soc_dapm_get_pin_status(w->dapm, "MICBIAS")) in set_dmic_power()
1566 if (!snd_soc_dapm_get_pin_status(w->dapm, "Vref2")) in set_dmic_power()
1580 snd_soc_dapm_to_component(w->dapm); in rt5682_set_verf()
1584 switch (w->shift) { in rt5682_set_verf()
1599 switch (w->shift) { in rt5682_set_verf()
1658 SND_SOC_DAPM_SUPPLY_S("DMIC ASRC", 1, RT5682_PLL_TRACK_1,
1668 SND_SOC_DAPM_INPUT("DMIC L1"),
1669 SND_SOC_DAPM_INPUT("DMIC R1"),
1673 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1871 {"DMIC L1", NULL, "DMIC CLK"},
1872 {"DMIC L1", NULL, "DMIC1 Power"},
1873 {"DMIC R1", NULL, "DMIC CLK"},
1874 {"DMIC R1", NULL, "DMIC1 Power"},
1875 {"DMIC CLK", NULL, "DMIC ASRC"},
1884 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1889 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
2000 struct snd_soc_component *component = dai->component; in rt5682_set_tdm_slot()
2026 return -EINVAL; in rt5682_set_tdm_slot()
2035 return -EINVAL; in rt5682_set_tdm_slot()
2055 return -EINVAL; in rt5682_set_tdm_slot()
2069 struct snd_soc_component *component = dai->component; in rt5682_hw_params()
2074 rt5682->lrck[dai->id] = params_rate(params); in rt5682_hw_params()
2075 pre_div = rl6231_get_clk_info(rt5682->sysclk, rt5682->lrck[dai->id]); in rt5682_hw_params()
2079 dev_err(component->dev, "Unsupported frame size: %d\n", in rt5682_hw_params()
2081 return -EINVAL; in rt5682_hw_params()
2084 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5682_hw_params()
2085 rt5682->lrck[dai->id], pre_div, dai->id); in rt5682_hw_params()
2107 return -EINVAL; in rt5682_hw_params()
2110 switch (dai->id) { in rt5682_hw_params()
2114 if (rt5682->master[RT5682_AIF1]) { in rt5682_hw_params()
2119 (rt5682->sysclk_src) << RT5682_I2S_CLK_SRC_SFT); in rt5682_hw_params()
2133 if (rt5682->master[RT5682_AIF2]) { in rt5682_hw_params()
2148 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5682_hw_params()
2149 return -EINVAL; in rt5682_hw_params()
2157 struct snd_soc_component *component = dai->component; in rt5682_set_dai_fmt()
2163 rt5682->master[dai->id] = 1; in rt5682_set_dai_fmt()
2166 rt5682->master[dai->id] = 0; in rt5682_set_dai_fmt()
2169 return -EINVAL; in rt5682_set_dai_fmt()
2180 if (dai->id == RT5682_AIF1) in rt5682_set_dai_fmt()
2183 return -EINVAL; in rt5682_set_dai_fmt()
2186 if (dai->id == RT5682_AIF1) in rt5682_set_dai_fmt()
2190 return -EINVAL; in rt5682_set_dai_fmt()
2193 return -EINVAL; in rt5682_set_dai_fmt()
2212 return -EINVAL; in rt5682_set_dai_fmt()
2215 switch (dai->id) { in rt5682_set_dai_fmt()
2223 tdm_ctrl | rt5682->master[dai->id]); in rt5682_set_dai_fmt()
2226 if (rt5682->master[dai->id] == 0) in rt5682_set_dai_fmt()
2233 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5682_set_dai_fmt()
2234 return -EINVAL; in rt5682_set_dai_fmt()
2245 if (freq == rt5682->sysclk && clk_id == rt5682->sysclk_src) in rt5682_set_component_sysclk()
2266 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); in rt5682_set_component_sysclk()
2267 return -EINVAL; in rt5682_set_component_sysclk()
2272 if (rt5682->master[RT5682_AIF2]) { in rt5682_set_component_sysclk()
2278 rt5682->sysclk = freq; in rt5682_set_component_sysclk()
2279 rt5682->sysclk_src = clk_id; in rt5682_set_component_sysclk()
2281 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", in rt5682_set_component_sysclk()
2296 if (source == rt5682->pll_src[pll_id] && in rt5682_set_component_pll()
2297 freq_in == rt5682->pll_in[pll_id] && in rt5682_set_component_pll()
2298 freq_out == rt5682->pll_out[pll_id]) in rt5682_set_component_pll()
2302 dev_dbg(component->dev, "PLL disabled\n"); in rt5682_set_component_pll()
2304 rt5682->pll_in[pll_id] = 0; in rt5682_set_component_pll()
2305 rt5682->pll_out[pll_id] = 0; in rt5682_set_component_pll()
2319 dev_err(component->dev, "Unknown PLL2 Source %d\n", in rt5682_set_component_pll()
2321 return -EINVAL; in rt5682_set_component_pll()
2331 dev_err(component->dev, "Unsupport input clock %d\n", in rt5682_set_component_pll()
2335 dev_dbg(component->dev, "PLL2F: fin=%d fout=%d bypass=%d m=%d n=%d k=%d\n", in rt5682_set_component_pll()
2343 dev_err(component->dev, "Unsupport input clock %d\n", in rt5682_set_component_pll()
2347 dev_dbg(component->dev, "PLL2B: fin=%d fout=%d bypass=%d m=%d n=%d k=%d\n", in rt5682_set_component_pll()
2387 dev_err(component->dev, "Unknown PLL1 Source %d\n", in rt5682_set_component_pll()
2389 return -EINVAL; in rt5682_set_component_pll()
2394 dev_err(component->dev, "Unsupport input clock %d\n", in rt5682_set_component_pll()
2399 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", in rt5682_set_component_pll()
2410 rt5682->pll_in[pll_id] = freq_in; in rt5682_set_component_pll()
2411 rt5682->pll_out[pll_id] = freq_out; in rt5682_set_component_pll()
2412 rt5682->pll_src[pll_id] = source; in rt5682_set_component_pll()
2419 struct snd_soc_component *component = dai->component; in rt5682_set_bclk1_ratio()
2422 rt5682->bclk[dai->id] = ratio; in rt5682_set_bclk1_ratio()
2442 dev_err(dai->dev, "Invalid bclk1 ratio %d\n", ratio); in rt5682_set_bclk1_ratio()
2443 return -EINVAL; in rt5682_set_bclk1_ratio()
2451 struct snd_soc_component *component = dai->component; in rt5682_set_bclk2_ratio()
2454 rt5682->bclk[dai->id] = ratio; in rt5682_set_bclk2_ratio()
2468 dev_err(dai->dev, "Invalid bclk2 ratio %d\n", ratio); in rt5682_set_bclk2_ratio()
2469 return -EINVAL; in rt5682_set_bclk2_ratio()
2482 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, in rt5682_set_bias_level()
2484 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1, in rt5682_set_bias_level()
2490 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1, in rt5682_set_bias_level()
2494 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1, in rt5682_set_bias_level()
2496 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, in rt5682_set_bias_level()
2513 if (!rt5682->master[RT5682_AIF1]) { in rt5682_clk_check()
2514 dev_dbg(rt5682->component->dev, "sysclk/dai not set correctly\n"); in rt5682_clk_check()
2525 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_prepare()
2530 return -EINVAL; in rt5682_wclk_prepare()
2561 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_unprepare()
2572 if (!rt5682->jack_type) in rt5682_wclk_unprepare()
2591 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_recalc_rate()
2599 if (rt5682->lrck[RT5682_AIF1] != CLK_48 && in rt5682_wclk_recalc_rate()
2600 rt5682->lrck[RT5682_AIF1] != CLK_44) { in rt5682_wclk_recalc_rate()
2601 dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n", in rt5682_wclk_recalc_rate()
2606 return rt5682->lrck[RT5682_AIF1]; in rt5682_wclk_recalc_rate()
2615 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_round_rate()
2619 return -EINVAL; in rt5682_wclk_round_rate()
2625 dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n", in rt5682_wclk_round_rate()
2639 struct snd_soc_component *component = rt5682->component; in rt5682_wclk_set_rate()
2646 return -EINVAL; in rt5682_wclk_set_rate()
2655 parent_clk = clk_get_parent(hw->clk); in rt5682_wclk_set_rate()
2657 dev_warn(component->dev, in rt5682_wclk_set_rate()
2662 dev_warn(component->dev, "clk %s only support %d Hz input\n", in rt5682_wclk_set_rate()
2676 rt5682->lrck[RT5682_AIF1] = rate; in rt5682_wclk_set_rate()
2678 pre_div = rl6231_get_clk_info(rt5682->sysclk, rate); in rt5682_wclk_set_rate()
2683 (rt5682->sysclk_src) << RT5682_I2S_CLK_SRC_SFT); in rt5682_wclk_set_rate()
2694 struct snd_soc_component *component = rt5682->component; in rt5682_bclk_recalc_rate()
2738 return -EINVAL; in rt5682_bclk_round_rate()
2758 struct snd_soc_component *component = rt5682->component; in rt5682_bclk_set_rate()
2763 return -EINVAL; in rt5682_bclk_set_rate()
2768 if (dai->id == RT5682_AIF1) in rt5682_bclk_set_rate()
2771 dev_err(component->dev, "dai %d not found in component\n", in rt5682_bclk_set_rate()
2773 return -ENODEV; in rt5682_bclk_set_rate()
2796 struct device *dev = component->dev; in rt5682_register_dai_clks()
2798 struct rt5682_platform_data *pdata = &rt5682->pdata; in rt5682_register_dai_clks()
2807 dai_clk_hw = &rt5682->dai_clks_hw[i]; in rt5682_register_dai_clks()
2812 if (rt5682->mclk) { in rt5682_register_dai_clks()
2822 parent = &rt5682->dai_clks_hw[RT5682_DAI_WCLK_IDX]; in rt5682_register_dai_clks()
2828 return -EINVAL; in rt5682_register_dai_clks()
2831 init.name = pdata->dai_clk_names[i]; in rt5682_register_dai_clks()
2834 dai_clk_hw->init = &init; in rt5682_register_dai_clks()
2843 if (dev->of_node) { in rt5682_register_dai_clks()
2864 struct snd_soc_dapm_context *dapm = &component->dapm; in rt5682_probe()
2869 rt5682->component = component; in rt5682_probe()
2871 if (rt5682->is_sdw) { in rt5682_probe()
2872 slave = rt5682->slave; in rt5682_probe()
2874 &slave->initialization_complete, in rt5682_probe()
2877 dev_err(&slave->dev, "Initialization not complete, timed out\n"); in rt5682_probe()
2878 return -ETIMEDOUT; in rt5682_probe()
2883 rt5682->mclk = devm_clk_get(component->dev, "mclk"); in rt5682_probe()
2884 if (IS_ERR(rt5682->mclk)) { in rt5682_probe()
2885 if (PTR_ERR(rt5682->mclk) != -ENOENT) { in rt5682_probe()
2886 ret = PTR_ERR(rt5682->mclk); in rt5682_probe()
2889 rt5682->mclk = NULL; in rt5682_probe()
2898 rt5682->lrck[RT5682_AIF1] = CLK_48; in rt5682_probe()
2920 regcache_cache_only(rt5682->regmap, true); in rt5682_suspend()
2921 regcache_mark_dirty(rt5682->regmap); in rt5682_suspend()
2929 regcache_cache_only(rt5682->regmap, false); in rt5682_resume()
2930 regcache_sync(rt5682->regmap); in rt5682_resume()
2933 &rt5682->jack_detect_work, msecs_to_jiffies(250)); in rt5682_resume()
2981 device_property_read_u32(dev, "realtek,dmic1-data-pin", in rt5682_parse_dt()
2982 &rt5682->pdata.dmic1_data_pin); in rt5682_parse_dt()
2983 device_property_read_u32(dev, "realtek,dmic1-clk-pin", in rt5682_parse_dt()
2984 &rt5682->pdata.dmic1_clk_pin); in rt5682_parse_dt()
2985 device_property_read_u32(dev, "realtek,jd-src", in rt5682_parse_dt()
2986 &rt5682->pdata.jd_src); in rt5682_parse_dt()
2987 device_property_read_u32(dev, "realtek,btndet-delay", in rt5682_parse_dt()
2988 &rt5682->pdata.btndet_delay); in rt5682_parse_dt()
2989 device_property_read_u32(dev, "realtek,dmic-clk-rate-hz", in rt5682_parse_dt()
2990 &rt5682->pdata.dmic_clk_rate); in rt5682_parse_dt()
2991 device_property_read_u32(dev, "realtek,dmic-delay-ms", in rt5682_parse_dt()
2992 &rt5682->pdata.dmic_delay); in rt5682_parse_dt()
2994 rt5682->pdata.ldo1_en = of_get_named_gpio(dev->of_node, in rt5682_parse_dt()
2995 "realtek,ldo1-en-gpios", 0); in rt5682_parse_dt()
2997 if (device_property_read_string_array(dev, "clock-output-names", in rt5682_parse_dt()
2998 rt5682->pdata.dai_clk_names, in rt5682_parse_dt()
3001 rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX], in rt5682_parse_dt()
3002 rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]); in rt5682_parse_dt()
3012 mutex_lock(&rt5682->calibrate_mutex); in rt5682_calibrate()
3015 regmap_write(rt5682->regmap, RT5682_I2C_CTRL, 0x000f); in rt5682_calibrate()
3016 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xa2af); in rt5682_calibrate()
3018 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xf2af); in rt5682_calibrate()
3019 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0300); in rt5682_calibrate()
3020 regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x8000); in rt5682_calibrate()
3021 regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0100); in rt5682_calibrate()
3022 regmap_write(rt5682->regmap, RT5682_HP_IMP_SENS_CTRL_19, 0x3800); in rt5682_calibrate()
3023 regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x3000); in rt5682_calibrate()
3024 regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x7005); in rt5682_calibrate()
3025 regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0x686c); in rt5682_calibrate()
3026 regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0d0d); in rt5682_calibrate()
3027 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_2, 0x0321); in rt5682_calibrate()
3028 regmap_write(rt5682->regmap, RT5682_HP_LOGIC_CTRL_2, 0x0004); in rt5682_calibrate()
3029 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0x7c00); in rt5682_calibrate()
3030 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_3, 0x06a1); in rt5682_calibrate()
3031 regmap_write(rt5682->regmap, RT5682_A_DAC1_MUX, 0x0311); in rt5682_calibrate()
3032 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0x7c00); in rt5682_calibrate()
3034 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0xfc00); in rt5682_calibrate()
3037 regmap_read(rt5682->regmap, RT5682_HP_CALIB_STA_1, &value); in rt5682_calibrate()
3045 dev_err(rt5682->component->dev, "HP Calibration Failure\n"); in rt5682_calibrate()
3048 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x002f); in rt5682_calibrate()
3049 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); in rt5682_calibrate()
3050 regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x0000); in rt5682_calibrate()
3051 regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0000); in rt5682_calibrate()
3052 regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x2000); in rt5682_calibrate()
3053 regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x2005); in rt5682_calibrate()
3054 regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0xc0c4); in rt5682_calibrate()
3055 regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0c0c); in rt5682_calibrate()
3057 mutex_unlock(&rt5682->calibrate_mutex); in rt5682_calibrate()