Lines Matching refs:doesn

19 The instruction doesn't subtract the S0 and S1 and use the absolute value (the
61 The Vega ISA references doesn't say this (or doesn't make it clear), but
64 The RDNA ISA doesn't mention SMEM stores at all, but they seem to be supported
99 RDNA ISA doc says that `0x140` should be added to the opcode, but that doesn't
123 LLVM also doesn't emit any initialization of `m0` for LDS instructions, and this
136 as it doesn't make too much sense to set them independently, aside from some
162 What the doc doesn't say is that in case of NGG (and legacy VS) when there
207 This is not mentioned by LLVM among the other GFX10 bugs, but LLVM doesn't use
242 ACO doesn't use FLAT load/store on GFX10, so is unaffected.
249 ACO doesn't use FLAT load/store on GFX10, so is unaffected.
255 Confirmed by AMD devs that despite the name, this doesn't only affect v_cmpx.