Lines Matching refs:GFX10
1309 return chip >= GFX10; in radv_should_use_wgp_mode()
1311 return chip == GFX10 || (chip >= GFX10_3 && !info->is_ngg); in radv_should_use_wgp_mode()
1314 return chip == GFX10 && info->is_ngg; in radv_should_use_wgp_mode()
1340 assert((pdevice->rad_info.chip_class >= GFX10 && num_shared_vgprs % 8 == 0) || in radv_postprocess_config()
1341 (pdevice->rad_info.chip_class < GFX10 && num_shared_vgprs == 0)); in radv_postprocess_config()
1370 if (pdevice->rad_info.chip_class >= GFX10) { in radv_postprocess_config()
1382 config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10); in radv_postprocess_config()
1393 config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10); in radv_postprocess_config()
1404 if (pdevice->rad_info.chip_class >= GFX10) { in radv_postprocess_config()
1417 S_00B428_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10) | S_00B428_WGP_MODE(wgp_mode); in radv_postprocess_config()
1422 config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10); in radv_postprocess_config()
1439 if (info->vs.needs_instance_id && pdevice->rad_info.chip_class >= GFX10) { in radv_postprocess_config()
1449 config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10); in radv_postprocess_config()
1455 config_out->rsrc1 |= S_00B028_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10); in radv_postprocess_config()
1460 config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10); in radv_postprocess_config()
1466 S_00B848_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10) | S_00B848_WGP_MODE(wgp_mode); in radv_postprocess_config()
1483 if (pdevice->rad_info.chip_class >= GFX10 && info->is_ngg && in radv_postprocess_config()
1530 es_vgpr_comp_cnt = pdevice->rad_info.chip_class >= GFX10 ? 3 : 1; in radv_postprocess_config()
2102 if (conf->num_sgprs && chip_class < GFX10) {
2116 if (chip_class >= GFX10)
2123 return chip_class >= GFX10 ? max_simd_waves * (wave_size / 32) : max_simd_waves;