107 static bool si_alloc_separate_cmask(struct si_screen *sscreen, struct si_texture *tex)  in si_alloc_separate_cmask()  argument
119       si_aligned_buffer_create(&sscreen->b, SI_RESOURCE_FLAG_UNMAPPABLE, PIPE_USAGE_DEFAULT,  in si_alloc_separate_cmask()
127    p_atomic_inc(&sscreen->compressed_colortex_counter);  in si_alloc_separate_cmask()
168 bool vi_alpha_is_on_msb(struct si_screen *sscreen, enum pipe_format format)  in vi_alpha_is_on_msb()  argument
177    if (sscreen->info.chip_class >= GFX10 && desc->nr_channels == 1)  in vi_alpha_is_on_msb()
183 static bool vi_get_fast_clear_parameters(struct si_screen *sscreen, enum pipe_format base_format,  in vi_get_fast_clear_parameters()  argument
212    bool base_alpha_is_on_msb = vi_alpha_is_on_msb(sscreen, base_format);  in vi_get_fast_clear_parameters()
213    bool surf_alpha_is_on_msb = vi_alpha_is_on_msb(sscreen, surface_format);  in vi_get_fast_clear_parameters()
366 static void si_set_optimal_micro_tile_mode(struct si_screen *sscreen, struct si_texture *tex)  in si_set_optimal_micro_tile_mode()  argument
368    if (sscreen->info.chip_class >= GFX10 || tex->buffer.b.is_shared ||  in si_set_optimal_micro_tile_mode()
373    assert(sscreen->info.chip_class >= GFX9 ||  in si_set_optimal_micro_tile_mode()
377    if (sscreen->info.chip_class >= GFX9) {  in si_set_optimal_micro_tile_mode()
408    } else if (sscreen->info.chip_class >= GFX7) {  in si_set_optimal_micro_tile_mode()
466    p_atomic_inc(&sscreen->dirty_tex_counter);  in si_set_optimal_micro_tile_mode()