219          anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);  in genX()
611    anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in emit_ps_depth_count()
638    anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in emit_query_pc_availability()
800    GENX(IA_VERTICES_COUNT_num),
801    GENX(IA_PRIMITIVES_COUNT_num),
802    GENX(VS_INVOCATION_COUNT_num),
803    GENX(GS_INVOCATION_COUNT_num),
804    GENX(GS_PRIMITIVES_COUNT_num),
805    GENX(CL_INVOCATION_COUNT_num),
806    GENX(CL_PRIMITIVES_COUNT_num),
807    GENX(PS_INVOCATION_COUNT_num),
808    GENX(HS_INVOCATION_COUNT_num),
809    GENX(DS_INVOCATION_COUNT_num),
810    GENX(CS_INVOCATION_COUNT_num),
831                mi_reg64(GENX(SO_NUM_PRIMS_WRITTEN0_num) + stream * 8));  in emit_xfb_query()
833                mi_reg64(GENX(SO_PRIM_STORAGE_NEEDED0_num) + stream * 8));  in emit_xfb_query()
854          anv_batch_emit(&cmd_buffer->batch, GENX(MI_REPORT_PERF_COUNT), rpc) {  in emit_perf_intel_query()
910       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
926       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
984       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
999                                   GENX(MI_REPORT_PERF_COUNT_length),  in genX()
1000                                   GENX(MI_REPORT_PERF_COUNT),  in genX()
1005                                       GENX(MI_REPORT_PERF_COUNT_MemoryAddress_start) / 8);  in genX()
1014                                GENX(MI_STORE_REGISTER_MEM_length),  in genX()
1015                                GENX(MI_STORE_REGISTER_MEM),  in genX()
1021                                       GENX(MI_STORE_REGISTER_MEM_MemoryAddress_start) / 8);  in genX()
1025                                   GENX(MI_STORE_REGISTER_MEM_length),  in genX()
1026                                   GENX(MI_STORE_REGISTER_MEM),  in genX()
1032                                          GENX(MI_STORE_REGISTER_MEM_MemoryAddress_start) / 8);  in genX()
1046       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
1088       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
1106       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
1117       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
1136                                   GENX(MI_REPORT_PERF_COUNT_length),  in genX()
1137                                   GENX(MI_REPORT_PERF_COUNT),  in genX()
1142                                       GENX(MI_REPORT_PERF_COUNT_MemoryAddress_start) / 8);  in genX()
1151                                GENX(MI_STORE_REGISTER_MEM_length),  in genX()
1152                                GENX(MI_STORE_REGISTER_MEM),  in genX()
1158                                       GENX(MI_STORE_REGISTER_MEM_MemoryAddress_start) / 8);  in genX()
1162                                   GENX(MI_STORE_REGISTER_MEM_length),  in genX()
1163                                   GENX(MI_STORE_REGISTER_MEM),  in genX()
1169                                          GENX(MI_STORE_REGISTER_MEM_MemoryAddress_start) / 8);  in genX()
1181                          GENX(MI_STORE_DATA_IMM_length),  in genX()
1182                          GENX(MI_STORE_DATA_IMM),  in genX()
1187                                 GENX(MI_STORE_DATA_IMM_Address_start) / 8);  in genX()
1195       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
1252       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {  in genX()
1302    anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) {  in gpu_write_query_result_cond()