228 mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset, unsigned seg)  in mir_set_offset()  argument
231                 ins->swizzle[1][i] = 0;  in mir_set_offset()
232                 ins->swizzle[2][i] = 0;  in mir_set_offset()
240                 ins->load_store.bitsize_toggle = true;  in mir_set_offset()
241                 ins->load_store.arg_comp = seg & 0x3;  in mir_set_offset()
242                 ins->load_store.arg_reg = (seg >> 2) & 0x7;  in mir_set_offset()
243                 ins->src[2] = nir_src_index(ctx, offset);  in mir_set_offset()
244                 ins->src_types[2] = nir_type_uint | nir_src_bit_size(*offset);  in mir_set_offset()
247                         ins->load_store.index_format = midgard_index_address_s32;  in mir_set_offset()
249                         ins->load_store.index_format = midgard_index_address_u64;  in mir_set_offset()
259                 ins->src[1] = nir_ssa_index(match.A.def);  in mir_set_offset()
260                 ins->swizzle[1][0] = match.A.comp;  in mir_set_offset()
261                 ins->src_types[1] = nir_type_uint | match.A.def->bit_size;  in mir_set_offset()
263                 ins->load_store.bitsize_toggle = true;  in mir_set_offset()
264                 ins->load_store.arg_comp = seg & 0x3;  in mir_set_offset()
265                 ins->load_store.arg_reg = (seg >> 2) & 0x7;  in mir_set_offset()
269                 ins->src[2] = nir_ssa_index(match.B.def);  in mir_set_offset()
270                 ins->swizzle[2][0] = match.B.comp;  in mir_set_offset()
271                 ins->src_types[2] = nir_type_uint | match.B.def->bit_size;  in mir_set_offset()
273                 ins->load_store.index_reg = REGISTER_LDST_ZERO;  in mir_set_offset()
278         ins->load_store.index_format = match.type;  in mir_set_offset()
281         ins->load_store.index_shift = match.shift;  in mir_set_offset()
283         ins->constants.u32[0] = match.bias;  in mir_set_offset()
288 mir_set_ubo_offset(midgard_instruction *ins, nir_src *src, unsigned bias)  in mir_set_ubo_offset()  argument
294                 ins->src[2] = nir_ssa_index(match.B.def);  in mir_set_ubo_offset()
296                 for (unsigned i = 0; i < ARRAY_SIZE(ins->swizzle[2]); ++i)  in mir_set_ubo_offset()
297                         ins->swizzle[2][i] = match.B.comp;  in mir_set_ubo_offset()
300         ins->load_store.index_shift = match.shift;  in mir_set_ubo_offset()
301         ins->constants.u32[0] = match.bias + bias;  in mir_set_ubo_offset()