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K$L(?,D0o4M8<M@5D:H;L@PCTX9\E`3d1h4lFp0tHx>|6<8A7=2BGbuf_manager/buf_num/buf_ful/buf_emptyvpss_hal_hwbuff_modifyget_hal_ctxsecure/cmp_mode/topfirst/frame_indexvpss%02xunknowvpss_p%d_right_%d_x%d_%d_hz_.yuvvpss_src_right_%d_x%d_%d_hz_.yuvvpss_p%d_%d_x%d_%d_hz_.yuvvpss_src_%d_x%d_%d_hz_.yuvvpss_ctrl_init_contextvpss_src_move_nextbuttsecure/bypass/topfirst/real_top_firstvpss_hal_hwbuff_queue_rstvpss_ctrl_suspend_instvpss_ctrl_init_inst_listvpss_ctrl_init_spin_and_inst_listvpss_inst_destory_portvpss_ctrl_destroy_portvpss_intf_destroy_portvpss_inst_get_portout_width/out_height/b_3d_detect_portvpss_inst_create_porthi_drv_vpss_create_portvpss_ctrl_create_portvpss_intf_create_portvpss_inst_enable_portvpss_ctrl_enable_portvpss_intf_enable_portcheck_use_uv_invertvpss_hal_process_interruptvpss_comm_increase_frame_refcountvpss_comm_decrease_frame_refcountstate/bit_width/3d_support/out_countinst_num/targetpos/clear_task_countvpss_comm_increase_ref_countvpss_comm_decrease_ref_countvpss_inst_tran_reference_countvpss_ctrl_init_eventplugin_in_cnt/plugin_out_cnttotal_time/time_out_cntsrc_chg_cnt/src_drop_cnt/out_drop_cnt/reset_cntsrc_rel_cnt/out_rel_trans_cntclear_task_cntvpss_inst_last_tran_refrence_cntout_que_trans_cnt/out_que_trans_suc_cntout_dequeue_cnt/out_dequeue_suc_cntin_dequeue_cnt/in_dequeue_suc_cntout_queue_cnt/out_queue_suc_cntin_queue_cnt/in_queue_suc_cntout_release_cnt/out_release_suc_cntout_acquire_cnt/out_acquire_suc_cntsrc_rel_fence_cnt/src_rel_fence_suc_cntvpss_policy_support_out_fmtvpss_policy_check_frame_cmp_fmtvpss_policy_support_in_fmtconvert_data_fmtinter/rate/3d_type/fmtinterlace/rate/3d_type/fmtvpss_hal_hwbuff_check_modify_resultvpss_stt_blkmv_deinitvpss_stt_rgmv_deinitvpss_stt_prjv_deinitvpss_out_deinitvpss_stt_distcnt_deinitvpss_stt_dmcnt_deinitvpss_stt_ccclcnt_deinitvpss_stt_dihismt_deinitvpss_stt_blkmt_deinitvpss_wbc_nrrfr_deinitvpss_wbc_ccclrfr_deinitvpss_wbc_dierfr_deinitvpss_ctrl_deinitvpss_hal_deinitvpss_stt_global_deinitvpss_stt_prjh_deinitvpss_stt_cyc_buff_deinitvpss_stt_nrmad_deinitvpss_stt_blkmv_initvpss_stt_rgmv_initvpss_stt_prjv_initvpss_hal_smmu_initvpss_out_initvpss_stt_initvpss_stt_distcnt_initvpss_stt_dmcnt_initvpss_stt_ccclcnt_initvpss_stt_dihismt_initvpss_stt_blkmt_initvpss_wbc_nrrfr_initvpss_wbc_ccclrfr_initvpss_wbc_dierfr_initvpss_in_initvpss_ctrl_initvpss_hal_initvpss_stt_global_initvpss_stt_prjh_initvpss_stt_cyc_buff_initvpss_hal_smmu_de_initvpss_stt_de_initvpss_in_de_initvpss_src_de_initvpss_wbc_de_initvpss_drv_mod_initvpss_stt_nrmad_initvpss_src_initvpss_wbc_initvpss_hal_logic_cfg_limitsave_sp422_to_file_8bitwrite_sp422_to_file_8bitsave_sp420_to_file_8bitsave_sp422_to_file_10bitsave_sp420_to_file_10bitwrite_sp422_y_data_10bitwrite_sp420_y_data_10bitwrite_sp422_uv_data_10bitwrite_sp420_uv_data_10bitwidth/heightvpss_stt_blkmv_resetvpss_stt_rgmv_resetvpss_stt_prjv_resetvpss_out_resetvpss_stt_resetvpss_stt_distcnt_resetvpss_stt_dmcnt_resetvpss_stt_ccclcnt_resetvpss_stt_dihismt_resetvpss_stt_blkmt_resetvpss_wbc_nrrfr_resetvpss_wbc_ccclrfr_resetvpss_wbc_dierfr_resetvpss_in_resetvpss_stt_global_resetvpss_hal_clear_task_resetvpss_stt_prjh_resetvpss_hal_hwbuff_resetvpss_stt_cyc_buff_resetvpss_stt_nrmad_resetvpss_src_resetvpss_wbc_resetvpss_out_move_targetvpss_hal_hwbuff_warn_detconvert_crop_to_inrectrevise_rectvpss_inst_modify_buff_statusvpss_ctrl_notify_frame_statusvpss_intf_destroy_vpsshi_vpsshi_drv_vpss_create_vpssvpss_intf_create_vpsshi_vpss_processvpss_ctrl_thread_processacquire_success/release_successsleep/threadposwait_times/total_times%s/%susrvpss_ctrl_regist_isrupdate/isrstate/use_pq/uservpss_nrrfr_buffervpss_ccclrfr_buffervpss_dierfr_buffervpss_inst_get_frame_from_in_buffervpss_inst_release_in_buffervpss_inst_create_all_buffervpss_comm_vplugin_dequeue_buffervpss_comm_vplugin_queue_bufferreset_split_node_bufferget_split_node_buffervpss_split_node_bufferfree_all_split_node_buffermalloc_node_buffervpss port has no empty buffervpss port %d has no empty bufferdst_id/hw_idx/hw_addrvpss_hal_get_rgmv_addrvpss_inst_check_rgmv_addrvpss_hal_get_reg_vir_addrvpss_dbg_print_frame_addrget_sec_page_table_addrpixel_format/rotation/b_user_cropmax_framerate/lowdelay/h_flip/v_flipvpss_ctrl_get_distribute_ipvpss_send_pluginbuf_to_vdpvpss_queue_plugin_frame_to_vdpvpss_queue_frame_to_vdpvpss_comm_mem_unmapvpss_comm_mem_mapautovpss_stt_fill_stt_infovpss_proc_input_list_infovpss_dbg_print_ref_count_infovpss_stt_global_get_infovpss_stt_cyc_buff_get_infofill_mirror_node_addr_infovpss_inst_print_pq_infovpss_instance_get_crop_infovpss_dbg_print_tunl_infovpss_hal_init_hal_infovpss_inst_fill_hal_infovpss_inst_update_vpss_pq_timing_infovpss_comm_update_vpss_pq_timing_infovpss_get_cfg_infovpss_inst_check_flag_infovpss_inst_rotate_outframe_infovpss_inst_fill_output_frame_infovpss_inst_fill_input_frame_infovpss_inst_set_out_frame_infovpss_inst_set_3d_detect_out_frame_infovpss_wbc_nrrfr_get_frame_infovpss_wbc_ccclrfr_get_frame_infovpss_wbc_dierfr_get_frame_infovpss_wbc_fill_wbc_frame_infovpss_hal_set_node_infofill_prog_node_infofill_interlace_node_infoget_lbd_infoversionvpss_init_spinvpss_ctrl_openp_reg[ii]->vpss_di_p3_blkmv_ctrl.bits.di_p3_blkmv_enp_reg[ii]->vpss_di_p2_blkmv_ctrl.bits.di_p2_blkmv_enp_reg[ii]->vpss_di_p1_blkmv_ctrl.bits.di_p1_blkmv_enp_reg[ii]->vpss_rg_cf_rgmv_ctrl.bits.rg_cf_rgmv_enp_reg[ii]->vpss_nr_p2_rgmv_ctrl.bits.nr_p2_rgmv_enp_reg[ii]->vpss_di_p1_rgmv_ctrl.bits.di_p1_rgmv_enp_reg[ii]->vpss_rg_p1_rgmv_ctrl.bits.rg_p1_rgmv_enp_reg[ii]->vpss_rg_cf_rpjv_ctrl.bits.rg_cf_prjv_enp_reg[ii]->vpss_p2_prjv_ctrl.bits.rg_p2_prjv_enp_reg[ii]->vpss_di_p3_stcnt_ctrl.bits.di_p3_stcnt_enp_reg[ii]->vpss_di_p2_stcnt_ctrl.bits.di_p2_stcnt_enp_reg[ii]->vpss_dm_cf_cnt_ctrl.bits.dm_cf_cnt_enp_reg[ii]->vpss_dm_p2_cnt_ctrl.bits.dm_p2_cnt_enp_reg[ii]->vpss_di_p4_hismt_ctrl.bits.di_p4_hismt_enp_reg[ii]->vpss_di_p3_blkmt_ctrl.bits.di_p3_blkmt_enp_reg[ii]->vpss_di_p2_blkmt_ctrl.bits.di_p2_blkmt_endense_stripe_str_en == dense_stripe_det_enp_reg[ii]->vpss_nr_rfr_ctrl.bits.nr_rfr_enp_reg[ii]->vpss_di_rfr_ctrl.bits.di_rfr_enp_reg[ii]->vpss_p3i_ctrl.bits.p3i_enp_reg[ii]->vpss_rg_cf_rpjh_ctrl.bits.rg_cf_prjh_enp_reg[ii]->vpss_p2_prjh_ctrl.bits.rg_p2_prjh_enp_reg[ii]->vpss_di_blkmv_cyc_ctrl.bits.di_blkmv_cycbuf_enp_reg[ii]->vpss_cc_ycnt_cyc_ctrl.bits.cc_ycnt_cycbuf_enp_reg[ii]->vpss_di_stcnt_cyc_ctrl.bits.di_stcnt_cycbuf_enp_reg[ii]->vpss_cc_ccnt_cyc_ctrl.bits.cc_ccnt_cycbuf_enp_reg[ii]->vpss_di_hismt_cyc_ctrl.bits.di_hismt_cycbuf_enp_reg[ii]->vpss_di_blkmt_cyc_ctrl.bits.di_blkmt_cycbuf_enp_reg[ii]->vpss_di_cyc_ctrl.bits.di_cycbuf_enp_reg[ii]->vpss_ref_cyc_ctrl.bits.ref_cycbuf_enp_reg[ii]->vpss_nr_mad_cyc_ctrl.bits.nr_mad_cycbuf_enp_reg[ii]->vpss_cc_cyc_ctrl.bits.cc_cycbuf_envpss_hal_hwbuff_send_enp_reg[ii]->snr_reg0.bits.mndet_en == p_reg[ii]->vpss_ctrl.bits.dbd_enp_reg[ii]->vpss_nr_cf_mad_ctrl.bits.nr_cf_mad_enp_reg[ii]->vpss_snr_p2_mad_ctrl.bits.snr_p2_mad_enp_reg[ii]->vpss_nr_p2_mad_ctrl.bits.nr_p2_mad_enp_reg[ii]->vpss_p3_ctrl.bits.p3_enp_reg[ii]->vpss_p2_ctrl.bits.p2_enp_reg[ii]->vpss_p1_ctrl.bits.p1_enstate/instnumvpss_inst_check_port_numnode_num == pq_para->split_numadd_reg_buffer_num3drs_type/scan_numvpss_in_get_buf_numvpss_out_get_ful_frmvpss_out_rel_ful_frmvpss_out_get_original_frmvpss_comm_alloc_secmmz_memvpss_comm_allocate_mmz_memvpss_comm_free_mmz_memvpss_comm_alloc_secsmmu_memvpss_comm_allocate_smmu_memvpss_comm_free_smmu_memvpss_comm_vplugin_get_paramout_wtunl/out_rtunlin_wtunl/in_rtunlsrc_id/forward_tunlcall back func is nullmemcpy_s fail ----VPSS %d get process frame failfree/busy/wait/relcan't support tunnelrelease_frame_alloc_buffer_abnormalp_reg[ii]->hipp_dei_ctrl.bits.mchdir_c == p_reg[ii]->hipp_dei_ctrl.bits.mchdir_lp_reg[ii]->hipp_dei_ctrl.bits.dei_out_sel_c == p_reg[ii]->hipp_dei_ctrl.bits.dei_out_sel_lvpss_ctrl_clear_taskvpss_inst_config_rotation_taskvpss_inst_config_taskvpss_ctrl_config_taskvpss_inst_complete_taskvpss_ctrl_complete_taskvpss_ctrl_update_taskvpss_inst_prepare_taskvpss_ctrl_prepare_taskvpss_inst_config_3d_taskvpss_inst_config_2d_taskvpss_inst_regist_hookhi_drv_vpss_regist_hookvpss_ctrl_regist_hookvpss_intf_regist_hookvpss_hal_set_clockvpss_out_move_target_no_lockvpss_out_rel_ful_frm_no_lockvpss_out_add_empty_frm_buf_no_lockhandle/ctrl_ip/enable/quickvpss_mac_config_hight_checkvpss_sys_config_rotation_checkvpss_mac_config_chan_checkvpss_mac_config_comm_checkvpss_sys_config_checkvpss_tnr_config_checkvpss_snr_config_checkvpss_dei_config_checkvpss_sys_apb_config_checkvpss_mac_config_stride_checkpst_cfg_info[ii]->wth == st_scence_cfg_info->wthvpss_convert_bitwidthvpss_policy_support_height_and_width(P/I condition)/pix_format/height/widthvpss_src_flushacquire_hz/releasing/waiting/workingvpss_comm_run_algvpss_inst_set_inst_cfgvpss_inst_get_inst_cfghi_drv_vpss_get_default_port_cfgvpss_intf_get_default_port_cfgvpss_inst_set_port_cfghi_drv_vpss_set_port_cfgvpss_ctrl_set_port_cfgvpss_intf_set_port_cfgvpss_inst_get_port_cfghi_drv_vpss_get_port_cfgvpss_ctrl_get_port_cfgvpss_intf_get_port_cfgvpss_inst_check_port_cfghi_drv_vpss_get_default_cfgvpss_intf_get_default_cfgvpss_hal_hwbuff_init_cfgvpss_set_split_node_pq_maket_cfgvpss_stt_blkmv_get_cfgvpss_stt_rgmv_get_cfgvpss_stt_prjv_get_cfgvpss_stt_get_cfgvpss_stt_distcnt_get_cfgvpss_stt_dmcnt_get_cfgvpss_stt_ccclcnt_get_cfgvpss_stt_dihismt_get_cfgvpss_stt_blkmt_get_cfgvpss_stt_prjh_get_cfgvpss_stt_nrmad_get_cfgvpss_wbc_get_cfghi_drv_vpss_set_vpss_cfgvpss_ctrl_set_vpss_cfgvpss_intf_set_vpss_cfghi_drv_vpss_get_vpss_cfgvpss_ctrl_get_vpss_cfgvpss_intf_get_vpss_cfgvpss_wbc_get_nr_cfgvpss_set_split_node_pq_demo_cfgcheck_set_rchn_cfgvpss_mac_set_rchn_cfgconvert_to_wwbc_chn_cfgconvert_to_rwbc_chn_cfgvpss_set_split_node_pq_mark_cfgvpss_hal_hwbuff_cfgset_prog_node_cfgset_interlace_node_cfgvpss_comm_update_vpss_pq_regvpss_inst_check_port_flagvpss_out_get_empty_bufvpss_out_check_empty_bufvpss_stt_blkmv_bufvpss_stt_rgmv_bufvpss_stt_prjv_bufvpss_rot_bufvpss_stt_distcnt_bufvpss_stt_dmcnt_bufvpss_stt_ccclcnt_bufvpss_stt_dihismt_bufvpss_stt_blkmt_bufvpss_out_add_empty_frm_bufvpss_frm_bufvpss_out_add_ful_frm_bufvpss_stt_global_bufvpss_stt_prjh_bufvpss_reg_bufvpss_stt_nrmad_bufvpss_inst_check_in_out_buffvpss_reset_vplugin_buffvpss_inst_alloc_rotate_buffvpss_stt_cycle_buffget_mirror_node_buffget_reg_node_buffoff(p_reg[ii]->regload_mask1.bits.mask1 & 0x0000ffff) == 0x0000ffffget_cmp_sizevpss_wbc_nrrfr_cal_buf_sizevpss_wbc_ccclrfr_cal_buf_sizevpss_wbc_dierfr_cal_buf_sizevpss_comm_cal_buf_sizecal_split_node_buf_sizetruevpss_comm_fwritevpss_hal_modify_completevpss_stt_blkmv_completevpss_stt_rgmv_completevpss_stt_prjv_completevpss_stt_completevpss_stt_distcnt_completevpss_stt_dmcnt_completevpss_stt_ccclcnt_completevpss_stt_dihismt_completevpss_stt_blkmt_completevpss_wbc_nrrfr_completevpss_wbc_ccclrfr_completevpss_wbc_dierfr_completevpss_stt_global_completevpss_stt_prjh_completevpss_stt_cyc_buff_completevpss_stt_nrmad_completevpss_wbc_completedev_stateprocess_smmu_statevpss_hal_get_smmu_int_statevpss_hal_clear_smmu_int_statevpss_hal_get_int_statevpss_hal_clear_int_statevpss_out_get_statecheck_inst_need_drop_by_rateout_ratevpss_hal_hwbuff_updatevpss_ctrl_pausevpss instance%d state:pausesuspend/pausevpss_ctrl_closefalsevpss_get_wchn_class_typevpss_get_rchn_class_typevpss_inst_check_node_typebit_width/frame(W/H)/typevpss_ctrl_dev_resumevpss_inst_get_delay_timecreate_all_buffer_time/destroy_all_buffer_timecomplete_task_time/alg_run_timelogic_time/software time/total_timepq_timing_info_time/start_task_timecheck_task_time/prepare_task_timeconfig_task_time/update_pq_reg_timeconfig_time/start_time/complete_timecheck_time/prepare_timevpss_dbg_save_output_framevpss_inst_get_port_framevpss_inst_rel_port_framevpss_dbg_print_framevpss_wbc_nrrfr_init_framevpss_wbc_ccclrfr_init_framevpss_wbc_dierfr_init_framevpss_in_check_have_repeat_framebuff_have_repeat_framevpss_inst_add_process_framevpss_inst_process_trans_framevpss_intf_queue_task_frameset_prog_framevpss_dbg_save_framevpss_inst_dequeue_framehi_drv_vpss_dequeue_framevpss_in_dequeue_framevpss_ctrl_dequeue_framevpss_intf_dequeue_framevpss_inst_queue_framehi_drv_vpss_queue_framevpss_in_queue_framevpss_ctrl_queue_framevpss_intf_queue_framevpss_inst_release_framehi_drv_vpss_release_framevpss_in_release_framevpss_ctrl_release_framevpss_intf_release_framevpss_ctrl_advance_release_framehi_drv_vpss_acquire_framevpss_in_acquire_framevpss_ctrl_acquire_framevpss_intf_acquire_frameput_interlace_frameset_interlace_sd_framevpss_inst_send_framevpss_ctrl_advance_send_frameset_interlace_hd_framevpss_dbg_save_src_framevpss_comm_save_frame_to_filesave_sp422_to_filesave_sp420_to_filehi_drv_vpss_get_handlevpss_intf_get_handleinit_reg_tablevpss_comm_vplugin_get_enableallocate_mmz_and_cachevpss_src_put_imagevpss_inst_user_get_imagevpss_src_get_process_imagevpss_inst_user_rel_undo_imagevpss_inst_user_rel_imagevpss_inst_check_imagevpss_src_complete_imagevpss_policy_revise_imageset_mirror_nodevpss_hal_set_other_nodevpss_src_rls_done_full_nodeset_rotate_nodeconvert_hal_rwmodeframerate/3d_type/frametype/fieldmodesource/field_mode/buff_modesource/field_mode/pre_field_modevpss_comm_calc_cmp_y_stridep_reg[ii]->vpss_di_cyc_stride.bits.di_c_stride == p_reg[ii]->vpss_di_cyc_stride.bits.di_y_stridep_reg[ii]->vpss_ref_cyc_stride.bits.ref_c_stride == p_reg[ii]->vpss_ref_cyc_stride.bits.ref_y_stridep_reg[ii]->vpss_cc_cyc_stride.bits.cc_c_stride == p_reg[ii]->vpss_cc_cyc_stride.bits.cc_y_stridevpss_comm_query_mem_sourceonly_i_frame/quickout/secure/sourcevpss_comm_vplugin_destory_instancevpss_ctrl_destory_instancevpss_comm_vplugin_start_instancevpss_ctrl_get_instancevpss_comm_vplugin_stop_instancevpss_ctrl_del_instancevpss_comm_vplugin_create_instancevpss_ctrl_create_instancevpss_ctrl_add_instancevpss1_ctrl_int_serviceset_reg_interlacevpss_ctrl_dev_suspendIP/IRQ/open_num/suspendvpss_inst_reply_user_commandhi_drv_vpss_send_commandvpss_ctrl_send_commandvpss_intf_send_commandvpss_intf_process_cmdframe(W/H)/bit_width/special_fieldhw_idx/hw_addr/dst_idalloc_port_idcomplete fence buffer failed port = %d rel_port_frame %d failedvpss_ctrl_create_threadvpss_comm_freadvpss_inst_proc_readvpss_ctrl_proc_readvpss_ctrl%02dcan't support rotation %dcan't here ,3dtype %d, eye %dinvalid port_id %d, handle %dinvalid port_id %dvpss_inst_create_procvpss_ctrl_create_procvpss_comm_vplugin_get_funcdrv_vpss_register_funcvpss_hal_start_logicvpss_hal_complete_logic../../device/hisilicon/hi3751v350/sdk_linux/source/msp/drv/vpss/chip/hi3751v350/hal/cbb/vpss_hal_limit.c../../device/hisilicon/hi3751v350/sdk_linux/source/msp/drv/vpss/chip/hi3751v350/hal/vpss_hal_reg.cwrite_sp422_y_datawrite_sp420_y_datavpss_set_split_node_pq_get_parabusy_list[index, addr]wait_list[index, addr]rel_list [index, addr]DTVATVVPSS_OUTBUTTSTARTSCARTDEINIT8BIT12BIT10BITWAITpst_cfg_info[ii]->hgt >= HAL_LIMIT_MIN_HEIGHTpst_cfg_info[ii]->wth >= HAL_LIMIT_MIN_HEIGHTHDR10PLUSHI_VPSSSUCCESSFSYESCVBSSBSVPSS1_ISRVPSS0_ISRYPBPRTECHNICOLORSDRCLEARTOPVDPNOSVIDEOVPSS_INOPENBOTTOMpst_vpss_reg_logic != NULLALLDOLBY_ELDOLBY_BLNETWORKFPKVIHDMInode_num <= XDP_VPSS_MAX_NODELENGTHpst_cfg_info[ii]->wth >= HAL_LIMIT_MIN_WIDTHVDHHLGCONFIGSLFCLOSEPREPARENONEIDLESUSPEND2DGRAPHICTABMEDIAVGA%-40s:p_reg->vpss_mst_outstanding.bits.mstr0_woutstanding <= 7V5p_reg->vpss_mst_ctrl.bits.split_mode <= 0x4V42020-04-24pst_cfg_info[ii]->hgt == st_scence_cfg_info->hgt || pst_cfg_info[ii]->hgt == (st_scence_cfg_info->hgt + 3) / 4 * 4V3VDH3pst_cfg_info[ii]->format <= 3p_reg[ii]->vpss_chn_cfg_ctrl.bits.max_req_num <= 0x2p_reg->vpss_chn_cfg_ctrl.bits.img_pro_mode <= 0x2VDH2pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_422pst_cfg_info[ii]->format != 2VDH1pst_rchn_cfg->st_in_rect.hgt >= 31pst_rchn_cfg->st_in_rect.wth >= 31pq_para->block_x >= 1p_reg[ii]->vpss_ctrl.bits.snr_mad_copy_en == 1p_reg[ii]->vpss_ctrl.bits.meds_en == 1p_reg[ii]->snr_reg0.bits.snr_en == 1p_reg[ii]->hipp_ma_mt14.bits.ppre_info_en == 1p_reg[ii]->snr_reg0.bits.dm_en == 1p_reg[ii]->vpss_ctrl.bits.snr_mad_sel == 1p_reg->vpss_ctrl.bits.dei_switch == 1p_reg[ii]->vpss_chn_cfg_ctrl.bits.max_req_len <= 1p_reg[ii]->vpss_ctrl.bits.tnr_mad_mode != 190180270HDR1000pst_rchn_cfg->st_in_rect.x == 0p_reg->vpss_out_ctrl.bits.out_mirror == 0p_reg->vpss_ctrl.bits.snr_mad_copy_en == 0p_reg[ii]->vpss_ctrl.bits.snr_mad_copy_en == 0pst_cfg_info[ii]->u32cf_field_420_copy_en == 0p_reg[ii]->snr_reg0.bits.cbcr_v5h1_flt_en == 0p_reg->vpss_out_testpattern.bits.out_test_pat_en == 0p_reg->vpss_ctrl.bits.meds_en == 0p_reg[ii]->vpss_ctrl.bits.meds_en == 0p_reg->vpss_ctrl.bits.tnr_en == 0p_reg->vpss_ctrl.bits.snr_en == 0p_reg->vpss_ctrl.bits.mcnr_en == 0p_reg[ii]->snr_reg62.bits.dm_blkgradinfo_en == 0p_reg[ii]->hipp_ma_mt14.bits.pre_info_en == 0p_reg->vpss_ctrl.bits.igbm_en == 0p_reg->vpss_ctrl.bits.cccl_en == 0p_reg[ii]->vpss_tnr_reg25.bits.y_mc_adj_en == 0p_reg[ii]->vpss_tnr_reg25.bits.c_mc_adj_en == 0p_reg->vpss_ctrl.bits.dei_en == 0p_reg->vpss_ctrl.bits.mcdi_en == 0p_reg->vpss_chn_cfg_ctrl.bits.rotate_en == 0p_reg->vpss_ctrl.bits.rgme_en == 0p_reg[ii]->vpss_tnr_reg17.bits.ma_me_en == 0p_reg->vpss_ctrl.bits.dsd_en == 0p_reg->vpss_ctrl.bits.fod_en == 0p_reg->vpss_ctrl.bits.scd_en == 0p_reg->vpss_ctrl.bits.dbd_en == 0p_reg[ii]->vpss_snr_p2_mad_ctrl.bits.snr_p2_mad_en == 0p_reg[ii]->vpss_tnr_ctrl.bits.cls3d_en == 0p_reg[ii]->vpss_tnr_ctrl.bits.ccs_3d_en == 0p_reg[ii]->snr_reg0.bits.ccs2d_en == 0p_reg->vpss_ctrl.bits.vc1_en == 0p_reg->vpss_ctrl.bits.snr_mad_sel == 0p_reg[ii]->vpss_ctrl.bits.snr_mad_sel == 0p_reg->vpss_ctrl.bits.dei_switch == 0p_reg->vpss_chn_cfg_ctrl.bits.img_pro_mode == 0pst_rchn_cfg->st_addr[VPSS_RCHN_ADDR_DATA].y_str % 16 == 0pst_cfg_info[ii]->hgt % 0x4 == 0pst_cfg_info[ii]->hgt % 0x2 == 0pst_cfg_info[ii]->wth % 0x2 == 0(err_ns_wr_addr & 0xff) == 0(err_ns_rd_addr & 0xff) == 0(cb_ttbr & 0x3f) == 0(pst_rchn_cfg->st_in_rect.hgt % 2) == 0(pst_rchn_cfg->st_in_rect.wth % 2) == 0p_reg[ii]->vpss_di_cyc_y_start_addr_low.bits.di_y_start_addr != 0p_reg[ii]->vpss_ref_cyc_y_start_addr_low.bits.ref_y_start_addr != 0p_reg[ii]->vpss_cc_cyc_y_start_addr_low.bits.cc_y_start_addr != 0p_reg[ii]->vpss_di_blkmv_cyc_start_addr_low.bits.di_blkmv_start_addr != 0p_reg[ii]->vpss_cc_ycnt_cyc_start_addr_low.bits.cc_ycnt_start_addr != 0p_reg[ii]->vpss_di_stcnt_cyc_start_addr_low.bits.di_stcnt_start_addr != 0p_reg[ii]->vpss_cc_ccnt_cyc_start_addr_low.bits.cc_ccnt_start_addr != 0p_reg[ii]->vpss_di_hismt_cyc_start_addr_low.bits.di_hismt_start_addr != 0p_reg[ii]->vpss_di_blkmt_cyc_start_addr_low.bits.di_blkmt_start_addr != 0p_reg[ii]->vpss_nr_mad_cyc_start_addr_low.bits.nr_mad_start_addr != 0p_reg[ii]->vpss_di_cyc_c_start_addr_low.bits.di_c_start_addr != 0p_reg[ii]->vpss_ref_cyc_c_start_addr_low.bits.ref_c_start_addr != 0p_reg[ii]->vpss_cc_cyc_c_start_addr_low.bits.cc_c_start_addr != 0p_reg->vpss_mst_ctrl.bits.split_mode != 0p_reg->vpss_chn_cfg_ctrl.bits.img_pro_mode != 0invalid port_id %#x.invalid port_id %d, handle %d.increase_ref_count(try_increase/suc_increase)decrease_ref_count(try_decrease/suc_decrease)threadsleep/idle_sleep/task_sleep/wait_sleep(HZ)src_list(PUT/COMPL/REL/FULL)trans_fb_list(PUT/REL)src_list_total(PUT/REL)process_hz(try/OK)get_src_img_hz(try/OK)/get_out_buf_hz(try/OK)acquire(try/OK)/release(try/OK)out_rect(X/Y/W/H)crop_rect(X/Y/W/H)video_rect(X/Y/W/H)offset_rect(L/R/T/B)!(p_reg[ii]->hipp_dei_ctrl.bits.mc_only == 1 && p_reg[ii]->hipp_dei_ctrl.bits.ma_only == 1)!(dsd_en == 0 && dense_stripe_det_en == 1)!(dsd_en == 0 && dense_stripe_str_en == 1)!(p_reg[ii]->vpss_ctrl.bits.mcdi_en == 0 && igbm_en == 1)!(p_reg[ii]->vpss_ctrl.bits.dei_en == 0 && p_reg[ii]->vpss_ctrl.bits.mcdi_en == 1)!(p_reg[ii]->vpss_ctrl.bits.mcdi_en == 0 && fod_en == 1)(pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_420) || (pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_422) || (pst_rchn_cfg->en_data_fmt == XDP_PROC_FMT_SP_400)!(p_reg[ii]->vpss_ctrl.bits.mcdi_en == 0 && p_reg[ii]->hipp_dei_ctrl.bits.ma_only == 0)!(p_reg[ii]->vpss_ctrl.bits.dei_en == 1 && rgme_en == 0)!((pst_cfg_info[ii]->wth < HAL_ME_MIN_WIDTH && meds_en == 1) || (pst_cfg_info[ii]->wth > HAL_TVD_MAX_WIDTH && meds_en == 0 && p_reg[ii]->vpss_split_ctrl.bits.split_en == 0))true [%-8d,0x%x] process_hz(try/OK) process_cnt(try/OK) srclist is empty vpss out_get idx=%d addr=0x%x dstid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss deque idx=%d addr=0x%x dstid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss release idx=%d addr=0x%x dstid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss out_put idx=%d addr=0x%x srcid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss get idx=%d addr=0x%x srcid=%d tunl=%d hw_idx=%d hwaddr=0x%llx vpss que idx=%d addr=0x%x srcid=%d tunl=%d hw_idx=%d hwaddr=0x%llx type=%d,can't support refcnt, addr=0x%08x type=%d,can't support ref cnt, addr=0x%08x Can't find rel frame index=%d,addr:0x%08x decrease ref fail! addr=%08x Current rgmv addr err, cf addr %08x, head addr %08x %-40s:%-8s/%-8d/0x%-8x vpssprocess refcnt-- idx=%d addr=0x%x vpssunprocess refcnt-- idx=%d addr=0x%x vpss tran refcnt-- idx=%d addr=0x%x vpss queue refcnt++ idx=%d addr=0x%x vpss outtunl dst_id=%d idx=%d addr=0x%x vpss intunl src_id=%d idx=%d addr=0x%x this frame has been in vpss busy list 0x%x this frame has been in vpss wait_rel_list list 0x%x this frame has been in vpss release list 0x%x hi_drv_smmu_query_buffer_source fail ret 0x%x query buffer fail ret is 0x%x write_error_addr 0x%x, read_error_addr 0x%x query_mem_source fail, ret = 0x%x query mem_source fail, ret = 0x%x memset_s failed, err = 0x%x vpss command not found,cmd = 0x%x decrease ref fail addr=%x VPSS queue_frame to vdp failed id %d laddr %x raddr %x can't get rel_frm id %d,addr %x queue to vplugin failed %x invalid dbg_part %#x alloc buffer fail.size %#x no node needs start [%d]Warning: HWadd = %#x has been modified before opt VPSS IP%d, already de_init VPSS IP%d, already init list not init hal is not init VPSS HAL is not init resource has not init IN no node to get current field order is same with the last one and no more frame to process command print success command set rotate support alg width and height success command vpssbypass success command pqbypass success command open_tunl_read_error success command inter success command print_frame_addr success command closecmp success command printinfo success command print_ref_cnt_info success command tran_pq_info success command tran_vo_info success command print_tunl_info success command testpattern success command SetMeVersion success command SetMeScanNum success command tunl success command pause success command check alloc mem time success command print software time success command print logic time success command save_frame success command SetRate success can't get first two released nodes can't get first one released nodes %-40s:%-8s %-40s:%-8d/%-8llx/%-8s %-40s:%-8s/%-8s %-40s:%-8s/%-8s/%-8s %-40s:%-8s/%-8s/%-8s/%-8s %-40s:%-8d/%-8s/%-8s/%-8s %-40s:%-8d/%-8d/%-8s/%-8s %-40s:%-8d/%-8d/%-8s %-40s:%-8s/%-8d/%-8d/%-8s %-40s:%-8d/%-8d/%-8d/%-8s %-40s:%-8d/%-16s/%-16s snprintf_s failed! ret=%d str=%s snprintf_s failed! ret=%d proc_name=%s snprintf_s failed! ret=%d ch_file=%s ssert failed at: >file name: %s >function : %s >line no. : %d >condition: %s empty list err ful list err rel cnt err add out buf err rel_ful_frm_buf error,full list error get hw buffer reg addr error port [%d] error complete src image function is not register null pointer echo printinfo 0~11 0~3 num >/proc/msp/vpss_ctrl00 para1:0(port0)/1(port1)/2(port2)/3(src) para2:num is printframe number echo saveyuv 0~11 0~3 num >/proc/msp/vpss_ctrl00 para1:0(port0)/1(port1)/2(port2)/3(src) para2:num is frame number invalid out pix_format %d,can't get addr vpss dump logic chan config addr reg virtual address is zero echo openprint 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) explanation: open plugin input and output frameinfo echo refcntinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) explanation:print reference count infomation echo setbuffnum 0~11 0/1 2~6 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:(2~6) is buffer num p_args is null pArgs is null para is null IN no node to fill vpss refcount -- fail vpss refcount ++ fail task timeout %lld, clear task need_drop quote == 0, please check vpss resume finish vpss lowpower resume finish vpss suspend finish vpss lowpower suspend finish empty list node too big ful list node too big IN no node to dequeue echo readerrorstate 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) explanation: open tunl read error state echo checkmemtime 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) (alloc consume of parts) para2:0(off)/1(on) (total time) explanation: allocating mem time echo softwaretime 0~11 0/1 time >/proc/msp/vpss_ctrl00 para1:0(off)/1(on)para2: max logictime. explanation: print software time echo logictime 0~11 0/1 time >/proc/msp/vpss_ctrl00 para1:0(off)/1(on)para2: max logictime. explanation: print logic time repeat frame Don't support secure frame has only one frame vpss can't support this pixfmt=%d savetofile vpss can't support this bitwidth =%d savetofile vpss ctrl isn't enable %-40s:%-8lld/%-8lld/%-8lld/%-8lld %-40s:%-16lld/%-16lld %-40s:%-16lld/%-16lld/%-16lld logic_time %lld software time %lld VPSS IP%d, is not vaild ip %d is invalid h_vpss(%d) is invalid SRCIN has been de_inited out has been inited src has been inited IN has been inited h_vpss(%d) is not be vaild or created [%d] add = %#x modified successed vpss_hal_deinit failed memcpy_s failed memset_s failed create buffer failed VPSS add reg node buffer failed vpss_get_cfg_info failed set clock failed vpss_sys_config_check failed vpss_tnr_config_check failed vpss_snr_config_check failed vpss_dei_config_check failed vpss_mac_config_check failed vpss_sys_apb_config_check failed alloc ro_buf failed alloc vpss_reg_buf failed proc smmu state failed clear smmu int state failed get int state failed clear int state failed Mmz map_cache failed Alloc map_cache failed complete_image failed vpss_ctrl_del_instance failed error [%d] add = %#x modified failed vpss_ctrl_create_thread failed vpss_ctrl_create_proc failed hi_drv_smmu_map alloc failed hi_drv_module_register VPSS failed ioremap VPSS_REG(%#x) failed %-40s:%-8d %-40s:%-8s/%-8d %-40s:%-8s/%-8s/%-8s/%-8d %-40s:%-8s/%-8d/%-8s/%-8d %-40s:%-8d/%-8d %-40s:%-8d/%-8d/%-8d %-40s:%-8s/%-8d/%-8d/%-8d %-40s:%-8d/%-8d/%-8d/%-8d %-40s:%-16s/%-16d %-40s:%-16lld/%-16d %-40s:%-16d/%-16d %-40s:%-12d/%-12d/%-12d/%-12d input tunnel error!!!! state = %x cnt=%d snprintf_s failed! ret=%d vpss_ctrl_wait_inst_idle ERROR state = %d,waittime ms=%d vpss_ctrl_pause waittime ms=%d rchn=%d, yaddr = 0x%llx, caddr = 0x%llx, w=%d,h=%d,ys=%d,cs=%d vpss can't support lossless cmp mode b_loss_cmp=%d vpss get reg buffer failed, node_num=%d g_st_vpss_ctrl[%d].inst_ctrl_info.instance_num=%d wchn=%d, yaddr = 0x%llx, caddr = 0x%llx, w=%d,h=%d,ys=%d,cs=%d,size=%d vpss doesn't have buffer to config logic, nodetype=%d invalid frm info w=%d,h=%d,yaddr=0x%08x,caddr=0x%08x,ystride=%d,cstride=%d vpss can't support the ip ,id=%d timing interlace %d b422 %d en_cs %d pixfmt %d en_in %d rate %d h %d w %d src h %d src w %d run_alg out scd %d scd_va %d key_va %d film_ty %d field_or %d dir_mch %d die_out %d can't be processed top_field_first %d don't support this port %d vpss can't support fmt %d can't be processed fmt %d file name is not right %d offset is too long, top %d bottom %d height %d 3D tile image can't be processed e_pix_format %d vpss can't be processed output pix_format %d vpss can't be processed inpute pix_format %d invalid port format %d Instance num should be 0, but num is %d 3dtype err %d vpss input invaild enum in %s! var %d not support cmp %d invalide ip %d vpss ctrl isn't opened, ip %d port num %d is more than %d not vpss channel. hw_buff_chan %d can't run here, i %d task num %d vpss can't support bitwidth %d vpss can't support this bitwidth %d can't be processed bit_width %d offset is too long, left %d right %d width %d Set virtual_rect error w %d h %d can't be processed w %d, h %d file name is too long %d vpss alloc split node buffer failed, no secure,size %d vir_addr is NULL,alloc size %d rgmv alloc memory failed. size %d prjv alloc memory failed. size %d blkmt alloc memory failed. size %d prjh alloc memory failed. size %d vpss alloc buffer failed. size %d Alloc mmz failed, size %d Alloc smmu failed, size %d instance get wbc cfg failed, eye %d can't be processed frame_rate %d can't be processed secure %d can't be processed frm_type %d can't be processed src_frame_type %d invalid frame_type %d invalid refcnt type %d invalid tunl type %d instance get stt cfg failed, type %d can't be processed only_have_i_frame %d port doesn't exit, handle %d invalid port ID %d, handle %d can't be processed buffer_mode %d in image can't be processed field_mode %d can't be processed source %d can't be processed interlace %d run_alg in hand %d source %d interlace %d w %d h %d stride %d scd %d fieldorder %d ref_field %d error,can't happen portid %d 3D image can't be processed W %d node num too big. NUM %d 3D image can't be processed H %d invalid port ID %d check frame para fail,index = %d check_use_uv_invert error,infmt = %d, outfmt = %d get instance failed , h_vpss = %d get instance failed , vpss = %d 2d image has been saved to '%s' W=%d H=%d format=%d ys = %d, cs = %d vpss delay timems = %d, buf num = %d stt global init alloc memory failed. size = %d cyc buff init alloc memory failed. size = %d vpss malloc buffer failed, size = %d can not use increaseref now en_mem_source = %d unknown command = %d function : %s line: %d wchn: %d function : %s line: %d rchn: %d rotate angle error %d %-20s allocating spend %-8d ns, size %-4d kb <===[Exit] ===>[Enter] vpss_hal_alloc_port_id failed!en_port [%d] src waiting buffer: src complete buffer: decreaseref fail.en_mem_source = %d .just support 0 1 echo help > /proc/msp/vpss_ctrl00 input number %d is too big,we support 0~1000 vpss delay timems = 0 invalid VPSS HANDLE %x. out: ystride %d, cstride %d, w %d, h %d, phy %#llx, size %d, yoffset %#x, uvoffset %#x. in: ystride %d, cstride %d, w %d, h %d, phy %#llx, size %d, yoffset %#x, uvoffset %#x. ctrl_del_init error,destroy instance first. vpss_src_get_pre_img_info delint. vpss_src_put_image delint. vpss_src_get_process_image delint. vpss_src_complete_image delint. stt has not init. STT not init. set_port err. vpss_src_move_next error. read or write mode %d is error. write mode 0 is error. read mode 0 is error. set_port_cfg error. data is null pointer. P is null pointer. Split block doesn't support out pattern. echo rotateneedalg 0~11 w h >/proc/msp/vpss_ctrl00 para1:w(width) para2:h(height) explanation:if less than this resolution, rotation support algrithm. Frame info is null. Buf is null. File is null. VPSS_GET_SRCIMAGE is null. port%d buffer is full. there is not enough space. h_port is invalid. 3dsupport %d is invalid. h_port %d is invalid. hvpss %d is invalid. h_vpss %d is invalid. vert_flip %d is invalid. hori_flip %d is invalid. rotation %d is invalid. buf_type %d is invalid. tunnel_enable %d is invalid. para en_mode %d is invalid. bit_width %d invalid. by_pass_mode %d invalid. blkmv alloc memory failed. distcnt alloc memory failed. dmcnt alloc memory failed. dihismt alloc memory failed. Init inst list failed. Init event failed. vpss_ctrl_init failed. Smmu init failed. Init failed. Notify frame status failed. Init spin failed. Update pq timing failed. Mmz_map_cache failed. set_mirror_node failed. drv_vpss_register_func failed. register VPSS failed. can not create thread. instance number is max,%d. port num is max %d. unsupport pixformat %d. unsupport bitwidth %d and pixformat %d. unsupport bitwidth %d, pixformat %d. init_frame fail. bitwidth %d, pixformat %d. init frame fail. bitwidth %d, pixformat %d. unsupport pix_format %d. use multi port, port num %d. ctrl_del_init error,vpss hasn't initted,ip %d,open num %d. buffer destory error already delete %d total %d. unsupport bitwidth %d. unsupport bit_width %d. wakeup_thread success. cfg %d pre %d in_frm %d out_buff %d. cccl_cnt init alloc memory failed, size %d. VPSS nrmad alloc memory failed, size %d. nr wbc alloc memory failed, size %d. cccl wbc alloc memory failed, size %d. die wbc alloc memory failed, size %d. stt context is NULL. wbc context is NULL. STT context is NULL. pst_vpss_frame is NULL. inst %d OUT buf is FULL. input para3 is too big, need 64 <= input_height <= 1088. Input para3 is too big, 0:v3 1:v4 2:v5. Input para3 is too big, 0:4 1:5. Input para2 %d is too big, inst num should 0~3. Input para2 is too big, inst num should 0~3. input para2 is too big, need 0/1/2/3. input para2 is too big, inst num should 0~1. Input para2 is too big, inst num should 0~1. Input para2 is too big, inst num should 0~11. Buff num %d is wrong. num should be 1~20. input para2 is too big, need 128 <= input_width <= 1920. Cmp_rate is 0. vpss resume start... vpss lowpower resume start... vpss suspend start... vpss lowpower suspend start... blkmv deinit error(not init). rgmv deinit error(not init). prjv deinit error(not init). distcnt deinit error(not init). dmcnt deinit error(not init). ccclcnt deinit error(not init). dihismt deinit error(not init). blkmt deinit error(not init). prjh deinit error(not init). nrmad deinit error(not init). cccl wbc deinit error(not init). die wbc deinit error(not init). cyc buffer de_init error(not init). nr wbc de_init error(not init). STT de_init error(not init). blkmv reset error(not init). rgmv reset error(not init). prjv reset error(not init). distcnt reset error(not init). dmcnt reset error(not init). dihismt reset error(not init). cyc buffer reset error(not init). prjh reset error(not init). nrmad reset error(not init). nr wbc reset error(not init). cccl wbc reset error(not init). die wbc reset error(not init). STT reset error(not init). rgmv get_info error(not init). distcnt get_info error(not init). prjh get_info error(not init). vpss cccl_cnt get_ref_info error(not init). die wbc get_wbc_info error(not init). blkmv get info error(not init). prjv get info error(not init). dmcnt get info error(not init). dihismt get info error(not init). blkmt get info error(not init). nr_mad get info error(not init). nr wbc get frame info error(not init). cccl wbc get frame info error(not init). cyc buffer getcfg error(not init). STT getcfg error(not init). blkmv complete error(not init). rgmv complete error(not init). prjv complete error(not init). distcnt complete error(not init). dmcnt complete error(not init). ccclcnt complete error(not init). cccl_cnt complete error(not init). dihismt complete error(not init). blkmt complete error(not init). cyc buffer complete error(not init). prjh complete error(not init). nrmad complete error(not init). nr wbc complete error(not init). cccl wbc complete error(not init). die wbc complete error(not init). STT complete error(not init). Delint failed(not init). VPSS src reset failed(not init). wbc deinit failed.(not init). -----------vpss src buffer status---------- -------------------------------VPSS%04x algorithm----------------------------- -------------------------------source_frame_list info------------------------------ --------------------------------orignal frame_info------------------------------- -----------------------------frame in node info------------------------------- -------------------------------thread info------------------------------- -------------------------------VPSS CTRL-------------------------------- --------------------------------revise frame_info--------------------------------- -----------------------------out_frame_list info--------------------------------- -------------------------------ctrl info--------------------------------- -------------------------------task[0x%x] info--------------------------------- -------------------------------VPSS%04x STATE--------------------------------- -----------------------------reference count info----------------------------------- --------------------------------tunl info------------------------------------- ------------------------------port[0x%x] info-------------------------------------- ------------------------------------VPSS--------------------------------------- ------------------------------------------------------------------------------- -------------------------performance statistics ----------------------------------- -------------------------vplugin info ----------------------------------- --------------------------------prog_info_condition ------------------------------- Stt deinit fail.(not init) STT de_init fail.(not init) Ctrl deinit failed. (not init) echo printframeaddr 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo outtestpattern 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printtunlinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printmemcinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo intestpattern 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printpqinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo printvoinfo 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo vpssbypass 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo pqbypass 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo colsecmp 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo setpause 0~11 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) echo outtunlenable 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:0(output tunl disable)/1(output tunl enable) echo intunlenable 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:0(input tunl disable)/1(input tunl enable) echo setinter 0~11 0/1 0/1 >/proc/msp/vpss_ctrl00 para1:0(off)/1(on) para2:0(prog)/1(interlace) This chip can't support vpss id (%d) vpss para null pointer in %s! vpss input invaild bool in %s! set_node_info err! fix_task err! can't happen,error! set_node_info error! get_image error! line %d: fwrite fail! hiirq_platform_set_irq_reg for vpss1 fail! hiirq_platform_set_irq_reg for vpss0 fail! open file '%s' fail! write file '%s' fail! can not unmap in secure mode! can not map in secure mode! send ladder to vdp fail,port invalid! address is not valid! can't get original frm,memcpy_s failed! get node buffer failed! get node12 buffer failed! get node01 buffer failed! set_out_frame_info failed! get_cmp_size failed! get_image failed! get_src_image failed! vpss add proc failed! VPSS%d registe IRQ failed! mutex init dailed! no this node type:%d! get_lbd_info error frame w %d h %d,lbd top %d bot %d left %d right %d! get_lbd_info t %d b %d l %d r %d shift %d %d %d %d! error,en_lr = %d! hi_drv_mmz_alloc_and_map alloc failed,alloc size = %d! hi_drv_smmu_alloc or map alloc failed,alloc size = %d! hi_drv_secmmz_alloc alloc failed,alloc size = %d! hi_drv_secsmmu_alloc alloc failed,alloc size = %d! vir_addr is NULL,alloc size = %d! can't get instance %d proc! Framerate %d is out of limit,should be 1~500HZ! pointer is NULL! not same frame(%d), (%d)! set_node_info err!! start_rotate_task err!!! start 3d task err!!! start 2d task err!!! set_node_info ROTATION_C err!!! set_node_info ROTATION_Y error!!! invalid 3D type %d!!!!! vpss_comm_allocate_smmu_mem para is null !!!!!!!!!! vpss not use pq alg now !! vpss_comm_mem_map para is null !! vpss_comm_free_mmz_mem para is null ! vpss_comm_free_smmu_mem para is null ! memset_s failed ! _rel error full list id %d,addr %x rel frm_id %d,laddr %x,raddr %x VPSS queue_frame to vdp failed id %d laddr %x vpss node_timeout!!!! state = %x node_end_m_int!!!! state = %x vpss bus0 write error!!!! state = %x vpss bus0 read error!!!! state = %x vpss logic error, irq = %x [%d]timeout_err [%d]qfrm_tmvdp_reg_conflict_err [%d]cover_err [%d]cover_warn args is null [%d]wline over rline vmalloc instance node failed vpss_ctrl_add_instance failed vpss_ctrl_create_inst_proc failed [%d] add = %#x has changed to %#x before modified 2d image has been saved to '%s' W=%d H=%d format=%d image info:index %d type %d tun_addr %#x format %d W %d H %dprog %d field_mode %d buff_mode %d PTS %d rate %d last_flag %ddelta %d cmp_type %d,source_type %d,bit_width %d b_flip %d L:Y %#x C %#x YH %#x CH %#x YS %d CS %d R:Y %#x C %#x YH %#x CH %#x YS %d CS %d index=%d L:Y %#x C %#x YH %#x CH %#x YS %d CS %d R:Y %#x C %#x YH %#x CH %#x YS %d CS %d don't support. w: %d, [%d,%d] don't support. h: %d, [%d,%d] ful list node too big! wd_stat error in smmu mod !!! rd_stat error in smmu mod !!! PTW trans error in smmu mod !!! TLB missing in smmu mod !!! echo command inst_id/para1/para2 >/proc/msp/vpss_ctrl00 fn_vplugin_get_queue_buffer failed %08x fn_vplugin_get_param failed %08x fn_vplugin_get_enable failed %08x fn_vplugin_destroy_instance failed %08x fn_vplugin_start_instance failed %08x fn_vplugin_stop_instance failed %08x fn_vplugin_create_instance failed %08x fn_vplugin_dequeue_buffer failed! NULL pointer fn_vplugin_queue_buffer failed! NULL pointer fn_vplugin_get_param failed! NULL pointer fn_vplugin_get_enable failed! NULL pointer fn_vplugin_destory_instance failed! NULL pointer fn_vplugin_start_instance failed! NULL pointer fn_vplugin_stop_instance failed! NULL pointer fn_vplugin_create_instance failed! NULL pointer hi_drv_module_get_function HI_ID_PQ failed %08x, update_vpss_timing_info is null hi_drv_module_get_function HI_ID_PQ failed %08x, update_vpss_alg is null hi_drv_module_get_function HI_ID_PQ failed %08x, update_vpss_reg is null hi_drv_module_get_function HI_ID_PQ failed %08x, g_st_pq_ext_func is null hi_drv_module_get_function HI_ID_VPLUGIN failed %08x, g_st_vplugin_ext_func is null malloc vpss_state failed hi_drv_module_get_function HI_ID_PQ failed %08x hi_drv_module_get_function HI_ID_VPLUGIN failed %08x ffile->private_data is null Allocating memory total time %d ns AAA\@@@[@A@\FFF`EEEFE`E_DFD`CCC]C_CFC`C@E@DAFAdAc@gAf@@ @` 0@P`p 0@` 0@P`p          @A@@A@A@@A@A@@A@A@@A ?-?? @-p@/ ?!BCv @Q :/P3/1o?o 0CΏLL0/@-뀀P1"@ P1"@ P2"@ P2"@ P3" @  P3" @ P4" @  P4" @ P5" @  P5" @ P6" @  P6" @ P7" @  P7" @ P8"@ P8"@ P9"@ P9"@ P:"@ P:"@ P;"@ P;"@ P<"@ P<"@ P0"@ P@0"@ P 0"@ P0"@ P0"@ P0"@ P0"@ P0"@ /QJ:/P/1o?o 0CL/P@ P@ P@ P@ P @  P @ P @  P @ P @  P @ P @  P @ P @  P @ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ P@ //JzD!HxDh!n" @!|T pG𵇰F$HPxDh8h@ -#H FxDh0F!^ h hJB zD !6F `0F!PH"!JE#xDzDH"!JF#xDzD !D%9h(F!@XTLuL>TpIJyDzDhh1h(F! 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