1# SPDX-License-Identifier: GPL-2.0 2comment "Processor Type" 3 4choice 5 prompt "CPU family support" 6 default M68KCLASSIC if MMU 7 default COLDFIRE if !MMU 8 help 9 The Freescale (was Motorola) M68K family of processors implements 10 the full 68000 processor instruction set. 11 The Freescale ColdFire family of processors is a modern derivative 12 of the 68000 processor family. They are mainly targeted at embedded 13 applications, and are all System-On-Chip (SOC) devices, as opposed 14 to stand alone CPUs. They implement a subset of the original 68000 15 processor instruction set. 16 If you anticipate running this kernel on a computer with a classic 17 MC68xxx processor, select M68KCLASSIC. 18 If you anticipate running this kernel on a computer with a ColdFire 19 processor, select COLDFIRE. 20 21config M68KCLASSIC 22 bool "Classic M68K CPU family support" 23 24config COLDFIRE 25 bool "Coldfire CPU family support" 26 select ARCH_HAVE_CUSTOM_GPIO_H 27 select CPU_HAS_NO_BITFIELDS 28 select CPU_HAS_NO_CAS 29 select CPU_HAS_NO_MULDIV64 30 select GENERIC_CSUM 31 select GPIOLIB 32 select HAVE_LEGACY_CLK 33 34endchoice 35 36if M68KCLASSIC 37 38config M68000 39 bool "MC68000" 40 depends on !MMU 41 select CPU_HAS_NO_BITFIELDS 42 select CPU_HAS_NO_CAS 43 select CPU_HAS_NO_MULDIV64 44 select CPU_HAS_NO_UNALIGNED 45 select GENERIC_CSUM 46 select CPU_NO_EFFICIENT_FFS 47 select HAVE_ARCH_HASH 48 help 49 The Freescale (was Motorola) 68000 CPU is the first generation of 50 the well known M68K family of processors. The CPU core as well as 51 being available as a stand alone CPU was also used in many 52 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 53 a paging MMU. 54 55config MCPU32 56 bool 57 select CPU_HAS_NO_BITFIELDS 58 select CPU_HAS_NO_CAS 59 select CPU_HAS_NO_UNALIGNED 60 select CPU_NO_EFFICIENT_FFS 61 help 62 The Freescale (was then Motorola) CPU32 is a CPU core that is 63 based on the 68020 processor. For the most part it is used in 64 System-On-Chip parts, and does not contain a paging MMU. 65 66config M68020 67 bool "68020 support" 68 depends on MMU 69 select FPU 70 select CPU_HAS_ADDRESS_SPACES 71 help 72 If you anticipate running this kernel on a computer with a MC68020 73 processor, say Y. Otherwise, say N. Note that the 68020 requires a 74 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 75 Sun 3, which provides its own version. 76 77config M68030 78 bool "68030 support" 79 depends on MMU && !MMU_SUN3 80 select FPU 81 select CPU_HAS_ADDRESS_SPACES 82 help 83 If you anticipate running this kernel on a computer with a MC68030 84 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 85 work, as it does not include an MMU (Memory Management Unit). 86 87config M68040 88 bool "68040 support" 89 depends on MMU && !MMU_SUN3 90 select FPU 91 select CPU_HAS_ADDRESS_SPACES 92 help 93 If you anticipate running this kernel on a computer with a MC68LC040 94 or MC68040 processor, say Y. Otherwise, say N. Note that an 95 MC68EC040 will not work, as it does not include an MMU (Memory 96 Management Unit). 97 98config M68060 99 bool "68060 support" 100 depends on MMU && !MMU_SUN3 101 select FPU 102 select CPU_HAS_ADDRESS_SPACES 103 help 104 If you anticipate running this kernel on a computer with a MC68060 105 processor, say Y. Otherwise, say N. 106 107config M68328 108 bool "MC68328" 109 depends on !MMU 110 select M68000 111 help 112 Motorola 68328 processor support. 113 114config M68EZ328 115 bool "MC68EZ328" 116 depends on !MMU 117 select M68000 118 help 119 Motorola 68EX328 processor support. 120 121config M68VZ328 122 bool "MC68VZ328" 123 depends on !MMU 124 select M68000 125 help 126 Motorola 68VZ328 processor support. 127 128endif # M68KCLASSIC 129 130if COLDFIRE 131 132choice 133 prompt "ColdFire SoC type" 134 default M520x 135 help 136 Select the type of ColdFire System-on-Chip (SoC) that you want 137 to build for. 138 139config M5206 140 bool "MCF5206" 141 depends on !MMU 142 select COLDFIRE_SW_A7 143 select HAVE_MBAR 144 select CPU_NO_EFFICIENT_FFS 145 help 146 Motorola ColdFire 5206 processor support. 147 148config M5206e 149 bool "MCF5206e" 150 depends on !MMU 151 select COLDFIRE_SW_A7 152 select HAVE_MBAR 153 select CPU_NO_EFFICIENT_FFS 154 help 155 Motorola ColdFire 5206e processor support. 156 157config M520x 158 bool "MCF520x" 159 depends on !MMU 160 select GENERIC_CLOCKEVENTS 161 select HAVE_CACHE_SPLIT 162 help 163 Freescale Coldfire 5207/5208 processor support. 164 165config M523x 166 bool "MCF523x" 167 depends on !MMU 168 select GENERIC_CLOCKEVENTS 169 select HAVE_CACHE_SPLIT 170 select HAVE_IPSBAR 171 help 172 Freescale Coldfire 5230/1/2/4/5 processor support 173 174config M5249 175 bool "MCF5249" 176 depends on !MMU 177 select COLDFIRE_SW_A7 178 select HAVE_MBAR 179 select CPU_NO_EFFICIENT_FFS 180 help 181 Motorola ColdFire 5249 processor support. 182 183config M525x 184 bool "MCF525x" 185 depends on !MMU 186 select COLDFIRE_SW_A7 187 select HAVE_MBAR 188 select CPU_NO_EFFICIENT_FFS 189 help 190 Freescale (Motorola) Coldfire 5251/5253 processor support. 191 192config M5271 193 bool "MCF5271" 194 depends on !MMU 195 select M527x 196 select HAVE_CACHE_SPLIT 197 select HAVE_IPSBAR 198 select GENERIC_CLOCKEVENTS 199 help 200 Freescale (Motorola) ColdFire 5270/5271 processor support. 201 202config M5272 203 bool "MCF5272" 204 depends on !MMU 205 select COLDFIRE_SW_A7 206 select HAVE_MBAR 207 select CPU_NO_EFFICIENT_FFS 208 help 209 Motorola ColdFire 5272 processor support. 210 211config M5275 212 bool "MCF5275" 213 depends on !MMU 214 select M527x 215 select HAVE_CACHE_SPLIT 216 select HAVE_IPSBAR 217 select GENERIC_CLOCKEVENTS 218 help 219 Freescale (Motorola) ColdFire 5274/5275 processor support. 220 221config M528x 222 bool "MCF528x" 223 depends on !MMU 224 select GENERIC_CLOCKEVENTS 225 select HAVE_CACHE_SPLIT 226 select HAVE_IPSBAR 227 help 228 Motorola ColdFire 5280/5282 processor support. 229 230config M5307 231 bool "MCF5307" 232 depends on !MMU 233 select COLDFIRE_SW_A7 234 select HAVE_CACHE_CB 235 select HAVE_MBAR 236 select CPU_NO_EFFICIENT_FFS 237 help 238 Motorola ColdFire 5307 processor support. 239 240config M532x 241 bool "MCF532x" 242 depends on !MMU 243 select M53xx 244 select HAVE_CACHE_CB 245 help 246 Freescale (Motorola) ColdFire 532x processor support. 247 248config M537x 249 bool "MCF537x" 250 depends on !MMU 251 select M53xx 252 select HAVE_CACHE_CB 253 help 254 Freescale ColdFire 537x processor support. 255 256config M5407 257 bool "MCF5407" 258 depends on !MMU 259 select COLDFIRE_SW_A7 260 select HAVE_CACHE_CB 261 select HAVE_MBAR 262 select CPU_NO_EFFICIENT_FFS 263 help 264 Motorola ColdFire 5407 processor support. 265 266config M547x 267 bool "MCF547x" 268 select M54xx 269 select MMU_COLDFIRE if MMU 270 select FPU if MMU 271 select HAVE_CACHE_CB 272 select HAVE_MBAR 273 select CPU_NO_EFFICIENT_FFS 274 help 275 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 276 277config M548x 278 bool "MCF548x" 279 select MMU_COLDFIRE if MMU 280 select FPU if MMU 281 select M54xx 282 select HAVE_CACHE_CB 283 select HAVE_MBAR 284 select CPU_NO_EFFICIENT_FFS 285 help 286 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 287 288config M5441x 289 bool "MCF5441x" 290 select MMU_COLDFIRE if MMU 291 select GENERIC_CLOCKEVENTS 292 select HAVE_CACHE_CB 293 help 294 Freescale Coldfire 54410/54415/54416/54417/54418 processor support. 295 296endchoice 297 298config M527x 299 bool 300 301config M53xx 302 bool 303 304config M54xx 305 select HAVE_PCI 306 bool 307 308endif # COLDFIRE 309 310 311comment "Processor Specific Options" 312 313config M68KFPU_EMU 314 bool "Math emulation support" 315 depends on MMU 316 help 317 At some point in the future, this will cause floating-point math 318 instructions to be emulated by the kernel on machines that lack a 319 floating-point math coprocessor. Thrill-seekers and chronically 320 sleep-deprived psychotic hacker types can say Y now, everyone else 321 should probably wait a while. 322 323config M68KFPU_EMU_EXTRAPREC 324 bool "Math emulation extra precision" 325 depends on M68KFPU_EMU 326 help 327 The fpu uses normally a few bit more during calculations for 328 correct rounding, the emulator can (often) do the same but this 329 extra calculation can cost quite some time, so you can disable 330 it here. The emulator will then "only" calculate with a 64 bit 331 mantissa and round slightly incorrect, what is more than enough 332 for normal usage. 333 334config M68KFPU_EMU_ONLY 335 bool "Math emulation only kernel" 336 depends on M68KFPU_EMU 337 help 338 This option prevents any floating-point instructions from being 339 compiled into the kernel, thereby the kernel doesn't save any 340 floating point context anymore during task switches, so this 341 kernel will only be usable on machines without a floating-point 342 math coprocessor. This makes the kernel a bit faster as no tests 343 needs to be executed whether a floating-point instruction in the 344 kernel should be executed or not. 345 346config ADVANCED 347 bool "Advanced configuration options" 348 depends on MMU 349 help 350 This gives you access to some advanced options for the CPU. The 351 defaults should be fine for most users, but these options may make 352 it possible for you to improve performance somewhat if you know what 353 you are doing. 354 355 Note that the answer to this question won't directly affect the 356 kernel: saying N will just cause the configurator to skip all 357 the questions about these options. 358 359 Most users should say N to this question. 360 361config RMW_INSNS 362 bool "Use read-modify-write instructions" 363 depends on ADVANCED && !CPU_HAS_NO_CAS 364 help 365 This allows to use certain instructions that work with indivisible 366 read-modify-write bus cycles. While this is faster than the 367 workaround of disabling interrupts, it can conflict with DMA 368 ( = direct memory access) on many Amiga systems, and it is also said 369 to destabilize other machines. It is very likely that this will 370 cause serious problems on any Amiga or Atari Medusa if set. The only 371 configuration where it should work are 68030-based Ataris, where it 372 apparently improves performance. But you've been warned! Unless you 373 really know what you are doing, say N. Try Y only if you're quite 374 adventurous. 375 376config SINGLE_MEMORY_CHUNK 377 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 378 depends on MMU 379 default y if SUN3 380 select NEED_MULTIPLE_NODES 381 help 382 Ignore all but the first contiguous chunk of physical memory for VM 383 purposes. This will save a few bytes kernel size and may speed up 384 some operations. Say N if not sure. 385 386config ARCH_DISCONTIGMEM_ENABLE 387 def_bool MMU && !SINGLE_MEMORY_CHUNK 388 389config 060_WRITETHROUGH 390 bool "Use write-through caching for 68060 supervisor accesses" 391 depends on ADVANCED && M68060 392 help 393 The 68060 generally uses copyback caching of recently accessed data. 394 Copyback caching means that memory writes will be held in an on-chip 395 cache and only written back to memory some time later. Saying Y 396 here will force supervisor (kernel) accesses to use writethrough 397 caching. Writethrough caching means that data is written to memory 398 straight away, so that cache and memory data always agree. 399 Writethrough caching is less efficient, but is needed for some 400 drivers on 68060 based systems where the 68060 bus snooping signal 401 is hardwired on. The 53c710 SCSI driver is known to suffer from 402 this problem. 403 404config M68K_L2_CACHE 405 bool 406 depends on MAC 407 default y 408 409config NODES_SHIFT 410 int 411 default "3" 412 depends on !SINGLE_MEMORY_CHUNK 413 414config CPU_HAS_NO_BITFIELDS 415 bool 416 417config CPU_HAS_NO_CAS 418 bool 419 420config CPU_HAS_NO_MULDIV64 421 bool 422 423config CPU_HAS_NO_UNALIGNED 424 bool 425 426config CPU_HAS_ADDRESS_SPACES 427 bool 428 429config FPU 430 bool 431 432config COLDFIRE_SW_A7 433 bool 434 435config HAVE_CACHE_SPLIT 436 bool 437 438config HAVE_CACHE_CB 439 bool 440 441config HAVE_MBAR 442 bool 443 444config HAVE_IPSBAR 445 bool 446 447config CLOCK_FREQ 448 int "Set the core clock frequency" 449 default "25000000" if M5206 450 default "54000000" if M5206e 451 default "166666666" if M520x 452 default "140000000" if M5249 453 default "150000000" if M527x || M523x 454 default "90000000" if M5307 455 default "50000000" if M5407 456 default "266000000" if M54xx 457 default "66666666" 458 depends on COLDFIRE 459 help 460 Define the CPU clock frequency in use. This is the core clock 461 frequency, it may or may not be the same as the external clock 462 crystal fitted to your board. Some processors have an internal 463 PLL and can have their frequency programmed at run time, others 464 use internal dividers. In general the kernel won't setup a PLL 465 if it is fitted (there are some exceptions). This value will be 466 specific to the exact CPU that you are using. 467 468config OLDMASK 469 bool "Old mask 5307 (1H55J) silicon" 470 depends on M5307 471 help 472 Build support for the older revision ColdFire 5307 silicon. 473 Specifically this is the 1H55J mask revision. 474 475if HAVE_CACHE_SPLIT 476choice 477 prompt "Split Cache Configuration" 478 default CACHE_I 479 480config CACHE_I 481 bool "Instruction" 482 help 483 Use all of the ColdFire CPU cache memory as an instruction cache. 484 485config CACHE_D 486 bool "Data" 487 help 488 Use all of the ColdFire CPU cache memory as a data cache. 489 490config CACHE_BOTH 491 bool "Both" 492 help 493 Split the ColdFire CPU cache, and use half as an instruction cache 494 and half as a data cache. 495endchoice 496endif 497 498if HAVE_CACHE_CB 499choice 500 prompt "Data cache mode" 501 default CACHE_WRITETHRU 502 503config CACHE_WRITETHRU 504 bool "Write-through" 505 help 506 The ColdFire CPU cache is set into Write-through mode. 507 508config CACHE_COPYBACK 509 bool "Copy-back" 510 help 511 The ColdFire CPU cache is set into Copy-back mode. 512endchoice 513endif 514 515