1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2018-2020 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 #ifndef HL_BOOT_IF_H 9 #define HL_BOOT_IF_H 10 11 #define LKD_HARD_RESET_MAGIC 0xED7BD694 12 #define HL_POWER9_HOST_MAGIC 0x1DA30009 13 14 #define BOOT_FIT_SRAM_OFFSET 0x200000 15 16 /* 17 * CPU error bits in BOOT_ERROR registers 18 * 19 * CPU_BOOT_ERR0_DRAM_INIT_FAIL DRAM initialization failed. 20 * DRAM is not reliable to use. 21 * 22 * CPU_BOOT_ERR0_FIT_CORRUPTED FIT data integrity verification of the 23 * image provided by the host has failed. 24 * 25 * CPU_BOOT_ERR0_TS_INIT_FAIL Thermal Sensor initialization failed. 26 * Boot continues as usual, but keep in 27 * mind this is a warning. 28 * 29 * CPU_BOOT_ERR0_DRAM_SKIPPED DRAM initialization has been skipped. 30 * Skipping DRAM initialization has been 31 * requested (e.g. strap, command, etc.) 32 * and FW skipped the DRAM initialization. 33 * Host can initialize the DRAM. 34 * 35 * CPU_BOOT_ERR0_BMC_WAIT_SKIPPED Waiting for BMC data will be skipped. 36 * Meaning the BMC data might not be 37 * available until reset. 38 * 39 * CPU_BOOT_ERR0_NIC_DATA_NOT_RDY NIC data from BMC is not ready. 40 * BMC has not provided the NIC data yet. 41 * Once provided this bit will be cleared. 42 * 43 * CPU_BOOT_ERR0_NIC_FW_FAIL NIC FW loading failed. 44 * The NIC FW loading and initialization 45 * failed. This means NICs are not usable. 46 * 47 * CPU_BOOT_ERR0_SECURITY_NOT_RDY Chip security initialization has been 48 * started, but is not ready yet - chip 49 * cannot be accessed. 50 * 51 * CPU_BOOT_ERR0_SECURITY_FAIL Security related tasks have failed. 52 * The tasks are security init (root of 53 * trust), boot authentication (chain of 54 * trust), data packets authentication. 55 * 56 * CPU_BOOT_ERR0_ENABLED Error registers enabled. 57 * This is a main indication that the 58 * running FW populates the error 59 * registers. Meaning the error bits are 60 * not garbage, but actual error statuses. 61 */ 62 #define CPU_BOOT_ERR0_DRAM_INIT_FAIL (1 << 0) 63 #define CPU_BOOT_ERR0_FIT_CORRUPTED (1 << 1) 64 #define CPU_BOOT_ERR0_TS_INIT_FAIL (1 << 2) 65 #define CPU_BOOT_ERR0_DRAM_SKIPPED (1 << 3) 66 #define CPU_BOOT_ERR0_BMC_WAIT_SKIPPED (1 << 4) 67 #define CPU_BOOT_ERR0_NIC_DATA_NOT_RDY (1 << 5) 68 #define CPU_BOOT_ERR0_NIC_FW_FAIL (1 << 6) 69 #define CPU_BOOT_ERR0_SECURITY_NOT_RDY (1 << 7) 70 #define CPU_BOOT_ERR0_SECURITY_FAIL (1 << 8) 71 #define CPU_BOOT_ERR0_ENABLED (1 << 31) 72 73 enum cpu_boot_status { 74 CPU_BOOT_STATUS_NA = 0, /* Default value after reset of chip */ 75 CPU_BOOT_STATUS_IN_WFE = 1, 76 CPU_BOOT_STATUS_DRAM_RDY = 2, 77 CPU_BOOT_STATUS_SRAM_AVAIL = 3, 78 CPU_BOOT_STATUS_IN_BTL = 4, /* BTL is H/W FSM */ 79 CPU_BOOT_STATUS_IN_PREBOOT = 5, 80 CPU_BOOT_STATUS_IN_SPL, /* deprecated - not reported */ 81 CPU_BOOT_STATUS_IN_UBOOT = 7, 82 CPU_BOOT_STATUS_DRAM_INIT_FAIL, /* deprecated - will be removed */ 83 CPU_BOOT_STATUS_FIT_CORRUPTED, /* deprecated - will be removed */ 84 /* U-Boot console prompt activated, commands are not processed */ 85 CPU_BOOT_STATUS_UBOOT_NOT_READY = 10, 86 /* Finished NICs init, reported after DRAM and NICs */ 87 CPU_BOOT_STATUS_NIC_FW_RDY = 11, 88 CPU_BOOT_STATUS_TS_INIT_FAIL, /* deprecated - will be removed */ 89 CPU_BOOT_STATUS_DRAM_SKIPPED, /* deprecated - will be removed */ 90 CPU_BOOT_STATUS_BMC_WAITING_SKIPPED, /* deprecated - will be removed */ 91 /* Last boot loader progress status, ready to receive commands */ 92 CPU_BOOT_STATUS_READY_TO_BOOT = 15, 93 /* Internal Boot finished, ready for boot-fit */ 94 CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT = 16, 95 /* Internal Security has been initialized, device can be accessed */ 96 CPU_BOOT_STATUS_SECURITY_READY = 17, 97 }; 98 99 enum kmd_msg { 100 KMD_MSG_NA = 0, 101 KMD_MSG_GOTO_WFE, 102 KMD_MSG_FIT_RDY, 103 KMD_MSG_SKIP_BMC, 104 }; 105 106 enum cpu_msg_status { 107 CPU_MSG_CLR = 0, 108 CPU_MSG_OK, 109 CPU_MSG_ERR, 110 }; 111 112 #endif /* HL_BOOT_IF_H */ 113