1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /**
33 * @defgroup los_hw Hardware
34 * @ingroup kernel
35 */
36 #ifndef _LOS_HW_H
37 #define _LOS_HW_H
38
39 #include "los_typedef.h"
40 #include "los_hw_cpu.h"
41 #ifdef __cplusplus
42 #if __cplusplus
43 extern "C" {
44 #endif /* __cplusplus */
45 #endif /* __cplusplus */
46
47 #define OS_SCHEDULE_IN_IRQ 0x0
48 #define OS_SCHEDULE_IN_TASK 0x1
49
50 #define PSR_T_ARM 0x00000000u
51 #define PSR_T_THUMB 0x00000020u
52 #define PSR_MODE_SVC 0x00000013u
53 #define PSR_MODE_SYS 0x0000001Fu
54 #define PSR_FIQ_DIS 0x00000040u
55 #define PSR_IRQ_DIS 0x00000080u
56 #define PSR_MODE_USR 0x00000010u
57
58 #define PSR_MODE_SVC_THUMB (PSR_MODE_SVC | PSR_T_THUMB | PSR_FIQ_DIS | PSR_IRQ_DIS)
59 #define PSR_MODE_SVC_ARM (PSR_MODE_SVC | PSR_T_ARM | PSR_FIQ_DIS | PSR_IRQ_DIS)
60
61 #define PSR_MODE_SYS_THUMB (PSR_MODE_SYS | PSR_T_THUMB)
62 #define PSR_MODE_SYS_ARM (PSR_MODE_SYS | PSR_T_ARM)
63
64 #define PSR_MODE_USR_THUMB (PSR_MODE_USR | PSR_T_THUMB)
65 #define PSR_MODE_USR_ARM (PSR_MODE_USR | PSR_T_ARM)
66
67 #define LOS_CHECK_SCHEDULE ((!OS_INT_ACTIVE) && OsPreemptable())
68
69 typedef struct {
70 const UINT32 partNo;
71 const CHAR *cpuName;
72 } CpuVendor;
73
74 extern CpuVendor g_cpuTable[];
75 extern UINT64 g_cpuMap[];
76
77 #define CPU_MAP_GET(cpuid) g_cpuMap[(cpuid)]
78 #define CPU_MAP_SET(cpuid, hwid) g_cpuMap[(cpuid)] = (hwid)
79
80 /**
81 * @ingroup los_hw
82 * @brief Invalidate instruction cache.
83 *
84 * @par Description:
85 * <ul>
86 * <li>This API is used to invalidate the instruction cache.</li>
87 * </ul>
88 * @attention None.
89 *
90 * @param None.
91 *
92 * @retval #None.
93 *
94 * @par Dependency:
95 * los_hw.h: the header file that contains the API declaration.
96 * @see None.
97 */
98 extern VOID FlushICache(VOID);
99
100 /**
101 * @ingroup los_hw
102 * @brief Flush data cache.
103 *
104 * @par Description:
105 * <ul>
106 * <li>This API is used to flush the data cache to the memory.</li>
107 * </ul>
108 * @attention
109 * <ul>
110 * <li>The input end address must be greater than the input start address.</li>
111 * </ul>
112 *
113 * @param start [IN] Type #int Flush start address.
114 * @param end [IN] Type #int Flush end address.
115 *
116 * @retval #None.
117 *
118 * @par Dependency:
119 * los_hw.h: the header file that contains the API declaration.
120 * @see None.
121 */
122 extern VOID DCacheFlushRange(UINTPTR start, UINTPTR end);
123
124 /**
125 * @ingroup los_hw
126 * @brief Invalidate data cache.
127 *
128 * @par Description:
129 * <ul>
130 * <li>This API is used to Invalidate the data in cache.</li>
131 * </ul>
132 * @attention
133 * <ul>
134 * <li>The input end address must be greater than the input start address.</li>
135 * </ul>
136 *
137 * @param start [IN] Type #int Invalidate start address.
138 * @param end [IN] Type #int Invalidate end address .
139 *
140 * @retval #None.
141 *
142 * @par Dependency:
143 * los_hw.h: the header file that contains the API declaration.
144 * @see None.
145 */
146 extern VOID DCacheInvRange(UINTPTR start, UINTPTR end);
147
148 /**
149 * @ingroup los_hw
150 * @brief Get cpu core name.
151 *
152 * @par Description:
153 * <ul>
154 * <li>This API is used to get cpu core name.</li>
155 * </ul>
156 * @attention
157 * <ul>
158 * <li>None.</li>
159 * </ul>
160 *
161 * @param
162 * @retval #CHAR * cpu core name.
163 *
164 * @par Dependency:
165 * los_hw.h: the header file that contains the API declaration.
166 * @see None.
167 */
LOS_CpuInfo(VOID)168 STATIC INLINE const CHAR *LOS_CpuInfo(VOID)
169 {
170 INT32 i;
171 UINT32 midr = OsMainIDGet();
172 /* [15:4] is the primary part number */
173 UINT32 partNo = (midr & 0xFFF0) >> 0x4;
174
175 for (i = 0; g_cpuTable[i].partNo != 0; i++) {
176 if (partNo == g_cpuTable[i].partNo) {
177 return g_cpuTable[i].cpuName;
178 }
179 }
180
181 return "unknown";
182 }
183
184 #ifdef __cplusplus
185 #if __cplusplus
186 }
187 #endif /* __cplusplus */
188 #endif /* __cplusplus */
189
190 #endif /* _LOS_HW_H */
191