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Searched defs:LR (Results 1 – 25 of 61) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveRangeCalc.cpp65 LiveRange &LR, const MachineOperand &MO) { in createDeadDef()
147 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) { in createDeadDefs()
156 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask Mask, in extendToUses()
241 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg, in extend()
276 bool LiveRangeCalc::isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs, in isDefOnEntry()
346 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, in findReachingDefs()
553 LiveRange &LR = I.LR; in updateSSA() local
DLiveRegMatrix.cpp178 LiveIntervalUnion::Query &LiveRegMatrix::query(const LiveRange &LR, in query()
200 [&](unsigned Unit, const LiveRange &LR) { in checkInterference()
214 LiveRange LR; in checkInterference() local
DLiveIntervals.cpp159 if (LiveRange *LR = RegUnitRanges[Unit]) in print() local
268 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) { in computeRegUnitRange()
335 LiveRange *LR = RegUnitRanges[Unit]; in computeLiveInRegUnits() local
355 static void createSegmentsForValues(LiveRange &LR, in createSegmentsForValues()
623 void LiveIntervals::extendToIndices(LiveRange &LR, in extendToIndices()
632 void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill, in pruneValue()
1022 if (LiveRange *LR = getRegUnitLI(*Units)) in updateAllRanges() local
1032 void updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) { in updateRange()
1056 void handleMoveDown(LiveRange &LR) { in handleMoveDown()
1229 void handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) { in handleMoveUp()
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DRegAllocFast.cpp369 void RegAllocFast::addKillFlag(const LiveReg &LR) { in addKillFlag()
388 void RegAllocFast::killVirtReg(LiveReg &LR) { in killVirtReg()
418 void RegAllocFast::spillVirtReg(MachineBasicBlock::iterator MI, LiveReg &LR) { in spillVirtReg()
611 void RegAllocFast::assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) { in assignVirtToPhysReg()
662 void RegAllocFast::allocVirtReg(MachineInstr &MI, LiveReg &LR, Register Hint0) { in allocVirtReg()
931 LiveReg &LR = reloadVirtReg(MI, I, Reg, 0); in handleThroughOperands() local
940 LiveReg &LR = reloadVirtReg(MI, I, Reg, 0); in handleThroughOperands() local
1112 LiveReg &LR = reloadVirtReg(MI, I, Reg, CopyDstReg); in allocateInstruction() local
DLiveRangeUtils.h26 static void DistributeRange(LiveRangeT &LR, LiveRangeT *SplitLRs[], in DistributeRange()
DRegisterPressure.cpp424 bool(*Property)(const LiveRange &LR, SlotIndex Pos)) { in getLanesWithProperty()
440 const LiveRange *LR = LIS.getCachedRegUnit(RegUnit); in getLanesWithProperty() local
455 [](const LiveRange &LR, SlotIndex Pos) { in getLiveLanesAt()
584 const LiveRange *LR = getLiveRange(LIS, Reg); in detectDeadDefs() local
1248 [](const LiveRange &LR, SlotIndex Pos) { in getLiveLanesAt()
1258 [](const LiveRange &LR, SlotIndex Pos) { in getLastUsedLanes()
1269 [](const LiveRange &LR, SlotIndex Pos) { in getLiveThroughAt()
DLiveInterval.cpp67 LiveRange *LR; member in __anon34a033d50111::CalcLiveRangeUtilBase
70 CalcLiveRangeUtilBase(LiveRange *LR) : LR(LR) {} in CalcLiveRangeUtilBase()
288 CalcLiveRangeUtilVector(LiveRange *LR) : CalcLiveRangeUtilVectorBase(LR) {} in CalcLiveRangeUtilVector()
314 CalcLiveRangeUtilSet(LiveRange *LR) : CalcLiveRangeUtilSetBase(LR) {} in CalcLiveRangeUtilSet()
1318 unsigned ConnectedVNInfoEqClasses::Classify(const LiveRange &LR) { in Classify()
DMachineVerifier.cpp527 void MachineVerifier::report_context(const LiveRange &LR, unsigned VRegUnit, in report_context()
1870 unsigned MONum, SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit, in checkLivenessAtUse()
1892 unsigned MONum, SlotIndex DefIdx, const LiveRange &LR, unsigned VRegOrUnit, in checkLivenessAtDef()
1959 if (const LiveRange *LR = LiveInts->getCachedRegUnit(*Units)) in checkLiveness() local
2381 if (const LiveRange *LR = LiveInts->getCachedRegUnit(i)) in verifyLiveIntervals() local
2385 void MachineVerifier::verifyLiveRangeValue(const LiveRange &LR, in verifyLiveRangeValue()
2477 void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR, in verifyLiveRangeSegment()
2692 void MachineVerifier::verifyLiveRange(const LiveRange &LR, unsigned Reg, in verifyLiveRange()
DInterferenceCache.cpp237 LiveRange *LR = RegUnits[i].Fixed; in update() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ExecutionEngine/Orc/
DLambdaResolver.h65 using LR = LambdaResolver<DylibLookupFtorT, ExternalLookupFtorT>; in createLambdaResolver() local
75 using LR = LambdaResolver<DylibLookupFtorT, ExternalLookupFtorT>; in createLambdaResolver() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DLiveRangeCalc.h102 LiveRange &LR; member
222 void extendToUses(LiveRange &LR, unsigned PhysReg) { in extendToUses()
DLiveIntervals.h187 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices) { in extendToIndices()
245 bool isLiveInToMBB(const LiveRange &LR, in isLiveInToMBB()
250 bool isLiveOutOfMBB(const LiveRange &LR, in isLiveOutOfMBB()
394 LiveRange *LR = RegUnitRanges[Unit]; in getRegUnit() local
DLiveIntervalUnion.h111 const LiveRange *LR = nullptr; variable
133 Query(const LiveRange &LR, const LiveIntervalUnion &LIU): in Query()
/third_party/mindspore/mindspore/ccsrc/backend/kernel_compiler/cpu/
Dsgd_cpu_kernel.h42 enum input_list_ { PARAM, GRAD, LR, ACCUM, MOMENTUM, STAT }; enumerator
Dadam_weight_decay_cpu_kernel.h42 enum input_list_ { VAR, M, V, LR, BETA1, BETA2, EPSILON, DECAY, GRAD }; enumerator
Dadam_cpu_kernel.h45 enum input_list_ { VAR, M, V, BETA1_POWER, BETA2_POWER, LR, BETA1, BETA2, EPSILON, GRAD }; enumerator
Dfused_cast_adam_weight_decay_cpu_kernel.h48 enum input_list_ { VAR, M, V, LR, BETA1, BETA2, EPSILON, DECAY, GRAD }; enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/GSYM/
DLookupResult.cpp54 raw_ostream &llvm::gsym::operator<<(raw_ostream &OS, const LookupResult &LR) { in operator <<()
DFunctionInfo.cpp155 LookupResult LR; in lookup() local
/third_party/libunwind/src/arm/
Dunwind_i.h37 #define LR 14 macro
/third_party/libunwind/src/aarch64/
Dunwind_i.h39 #define LR 30 macro
/third_party/skia/third_party/externals/swiftshader/third_party/marl/src/
Dosfiber_asm_arm.h70 uintptr_t LR; // link register (r14) member
Dosfiber_asm_aarch64.h87 uintptr_t LR; // link register (R30) member
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIWholeQuadMode.cpp288 LiveRange &LR = LIS->getRegUnit(*RegUnit); in markInstructionUses() local
586 LiveRange &LR = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::SCC, TRI)); in prepareInsertion() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/JITLink/
DJITLinkGeneric.cpp88 Expected<AsyncLookupResult> LR, in linkPhase2()

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