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1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #ifndef __MT7915_H
5 #define __MT7915_H
6 
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #include "../mt76.h"
10 #include "regs.h"
11 
12 #define MT7915_MAX_INTERFACES		4
13 #define MT7915_MAX_WMM_SETS		4
14 #define MT7915_WTBL_SIZE		288
15 #define MT7915_WTBL_RESERVED		(MT7915_WTBL_SIZE - 1)
16 #define MT7915_WTBL_STA			(MT7915_WTBL_RESERVED - \
17 					 MT7915_MAX_INTERFACES)
18 
19 #define MT7915_WATCHDOG_TIME		(HZ / 10)
20 #define MT7915_RESET_TIMEOUT		(30 * HZ)
21 
22 #define MT7915_TX_RING_SIZE		2048
23 #define MT7915_TX_MCU_RING_SIZE		256
24 #define MT7915_TX_FWDL_RING_SIZE	128
25 
26 #define MT7915_RX_RING_SIZE		1536
27 #define MT7915_RX_MCU_RING_SIZE		512
28 
29 #define MT7915_FIRMWARE_WA		"mediatek/mt7915_wa.bin"
30 #define MT7915_FIRMWARE_WM		"mediatek/mt7915_wm.bin"
31 #define MT7915_ROM_PATCH		"mediatek/mt7915_rom_patch.bin"
32 
33 #define MT7915_EEPROM_SIZE		3584
34 #define MT7915_TOKEN_SIZE		8192
35 
36 #define MT7915_CFEND_RATE_DEFAULT	0x49	/* OFDM 24M */
37 #define MT7915_CFEND_RATE_11B		0x03	/* 11B LP, 11M */
38 #define MT7915_5G_RATE_DEFAULT		0x4b	/* OFDM 6M */
39 #define MT7915_2G_RATE_DEFAULT		0x0	/* CCK 1M */
40 
41 #define MT7915_SKU_RATE_NUM		161
42 #define MT7915_SKU_MAX_DELTA_IDX	MT7915_SKU_RATE_NUM
43 #define MT7915_SKU_TABLE_SIZE		(MT7915_SKU_RATE_NUM + 1)
44 
45 struct mt7915_vif;
46 struct mt7915_sta;
47 struct mt7915_dfs_pulse;
48 struct mt7915_dfs_pattern;
49 
50 enum mt7915_txq_id {
51 	MT7915_TXQ_FWDL = 16,
52 	MT7915_TXQ_MCU_WM,
53 	MT7915_TXQ_BAND0,
54 	MT7915_TXQ_BAND1,
55 	MT7915_TXQ_MCU_WA,
56 };
57 
58 enum mt7915_rxq_id {
59 	MT7915_RXQ_BAND0 = 0,
60 	MT7915_RXQ_BAND1,
61 	MT7915_RXQ_MCU_WM = 0,
62 	MT7915_RXQ_MCU_WA,
63 };
64 
65 struct mt7915_sta_stats {
66 	struct rate_info prob_rate;
67 	struct rate_info tx_rate;
68 
69 	unsigned long per;
70 	unsigned long changed;
71 	unsigned long jiffies;
72 };
73 
74 struct mt7915_sta {
75 	struct mt76_wcid wcid; /* must be first */
76 
77 	struct mt7915_vif *vif;
78 
79 	struct list_head stats_list;
80 	struct list_head poll_list;
81 	struct list_head rc_list;
82 	u32 airtime_ac[8];
83 
84 	struct mt7915_sta_stats stats;
85 
86 	unsigned long ampdu_state;
87 };
88 
89 struct mt7915_vif {
90 	u16 idx;
91 	u8 omac_idx;
92 	u8 band_idx;
93 	u8 wmm_idx;
94 
95 	struct mt7915_sta sta;
96 	struct mt7915_phy *phy;
97 
98 	struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
99 };
100 
101 struct mib_stats {
102 	u32 ack_fail_cnt;
103 	u32 fcs_err_cnt;
104 	u32 rts_cnt;
105 	u32 rts_retries_cnt;
106 	u32 ba_miss_cnt;
107 };
108 
109 struct mt7915_phy {
110 	struct mt76_phy *mt76;
111 	struct mt7915_dev *dev;
112 
113 	struct ieee80211_sband_iftype_data iftype[2][NUM_NL80211_IFTYPES];
114 
115 	u32 rxfilter;
116 	u32 omac_mask;
117 
118 	u16 noise;
119 	u16 chainmask;
120 
121 	s16 coverage_class;
122 	u8 slottime;
123 
124 	u8 rdd_state;
125 	int dfs_state;
126 
127 	__le32 rx_ampdu_ts;
128 	u32 ampdu_ref;
129 
130 	struct mib_stats mib;
131 	struct list_head stats_list;
132 
133 	struct delayed_work mac_work;
134 	u8 mac_work_count;
135 	u8 sta_work_count;
136 };
137 
138 struct mt7915_dev {
139 	union { /* must be first */
140 		struct mt76_dev mt76;
141 		struct mt76_phy mphy;
142 	};
143 
144 	const struct mt76_bus_ops *bus_ops;
145 	struct mt7915_phy phy;
146 
147 	u16 chainmask;
148 
149 	struct work_struct init_work;
150 	struct work_struct rc_work;
151 	struct work_struct reset_work;
152 	wait_queue_head_t reset_wait;
153 	u32 reset_state;
154 
155 	struct list_head sta_rc_list;
156 	struct list_head sta_poll_list;
157 	spinlock_t sta_poll_lock;
158 
159 	u32 hw_pattern;
160 
161 	spinlock_t token_lock;
162 	struct idr token;
163 
164 	s8 **rate_power; /* TODO: use mt76_rate_power */
165 
166 	bool fw_debug;
167 };
168 
169 enum {
170 	HW_BSSID_0 = 0x0,
171 	HW_BSSID_1,
172 	HW_BSSID_2,
173 	HW_BSSID_3,
174 	HW_BSSID_MAX,
175 	EXT_BSSID_START = 0x10,
176 	EXT_BSSID_1,
177 	EXT_BSSID_2,
178 	EXT_BSSID_3,
179 	EXT_BSSID_4,
180 	EXT_BSSID_5,
181 	EXT_BSSID_6,
182 	EXT_BSSID_7,
183 	EXT_BSSID_8,
184 	EXT_BSSID_9,
185 	EXT_BSSID_10,
186 	EXT_BSSID_11,
187 	EXT_BSSID_12,
188 	EXT_BSSID_13,
189 	EXT_BSSID_14,
190 	EXT_BSSID_15,
191 	EXT_BSSID_END
192 };
193 
194 enum {
195 	MT_LMAC_AC00,
196 	MT_LMAC_AC01,
197 	MT_LMAC_AC02,
198 	MT_LMAC_AC03,
199 	MT_LMAC_ALTX0 = 0x10,
200 	MT_LMAC_BMC0,
201 	MT_LMAC_BCN0,
202 };
203 
204 enum {
205 	MT_RX_SEL0,
206 	MT_RX_SEL1,
207 };
208 
209 enum mt7915_rdd_cmd {
210 	RDD_STOP,
211 	RDD_START,
212 	RDD_DET_MODE,
213 	RDD_RADAR_EMULATE,
214 	RDD_START_TXQ = 20,
215 	RDD_CAC_START = 50,
216 	RDD_CAC_END,
217 	RDD_NORMAL_START,
218 	RDD_DISABLE_DFS_CAL,
219 	RDD_PULSE_DBG,
220 	RDD_READ_PULSE,
221 	RDD_RESUME_BF,
222 	RDD_IRQ_OFF,
223 };
224 
225 enum {
226 	RATE_CTRL_RU_INFO,
227 	RATE_CTRL_FIXED_RATE_INFO,
228 	RATE_CTRL_DUMP_INFO,
229 	RATE_CTRL_MU_INFO,
230 };
231 
232 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)233 mt7915_hw_phy(struct ieee80211_hw *hw)
234 {
235 	struct mt76_phy *phy = hw->priv;
236 
237 	return phy->priv;
238 }
239 
240 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)241 mt7915_hw_dev(struct ieee80211_hw *hw)
242 {
243 	struct mt76_phy *phy = hw->priv;
244 
245 	return container_of(phy->dev, struct mt7915_dev, mt76);
246 }
247 
248 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)249 mt7915_ext_phy(struct mt7915_dev *dev)
250 {
251 	struct mt76_phy *phy = dev->mt76.phy2;
252 
253 	if (!phy)
254 		return NULL;
255 
256 	return phy->priv;
257 }
258 
mt7915_lmac_mapping(struct mt7915_dev * dev,u8 ac)259 static inline u8 mt7915_lmac_mapping(struct mt7915_dev *dev, u8 ac)
260 {
261 	/* LMAC uses the reverse order of mac80211 AC indexes */
262 	return 3 - ac;
263 }
264 
265 extern const struct ieee80211_ops mt7915_ops;
266 extern struct pci_driver mt7915_pci_driver;
267 
268 u32 mt7915_reg_map(struct mt7915_dev *dev, u32 addr);
269 
270 int mt7915_register_device(struct mt7915_dev *dev);
271 void mt7915_unregister_device(struct mt7915_dev *dev);
272 int mt7915_register_ext_phy(struct mt7915_dev *dev);
273 void mt7915_unregister_ext_phy(struct mt7915_dev *dev);
274 int mt7915_eeprom_init(struct mt7915_dev *dev);
275 u32 mt7915_eeprom_read(struct mt7915_dev *dev, u32 offset);
276 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
277 				   struct ieee80211_channel *chan,
278 				   u8 chain_idx);
279 void mt7915_eeprom_init_sku(struct mt7915_dev *dev);
280 int mt7915_dma_init(struct mt7915_dev *dev);
281 void mt7915_dma_prefetch(struct mt7915_dev *dev);
282 void mt7915_dma_cleanup(struct mt7915_dev *dev);
283 int mt7915_mcu_init(struct mt7915_dev *dev);
284 int mt7915_mcu_add_dev_info(struct mt7915_dev *dev,
285 			    struct ieee80211_vif *vif, bool enable);
286 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
287 			    struct ieee80211_vif *vif, int enable);
288 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
289 		       struct ieee80211_sta *sta, bool enable);
290 int mt7915_mcu_add_sta_adv(struct mt7915_dev *dev, struct ieee80211_vif *vif,
291 			   struct ieee80211_sta *sta, bool enable);
292 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
293 			 struct ieee80211_ampdu_params *params,
294 			 bool add);
295 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
296 			 struct ieee80211_ampdu_params *params,
297 			 bool add);
298 int mt7915_mcu_add_key(struct mt7915_dev *dev, struct ieee80211_vif *vif,
299 		       struct mt7915_sta *msta, struct ieee80211_key_conf *key,
300 		       enum set_key_cmd cmd);
301 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
302 			  int enable);
303 int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif,
304                             bool enable);
305 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
306 			     struct ieee80211_sta *sta);
307 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
308 			struct ieee80211_sta *sta);
309 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
310 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
311 int mt7915_mcu_set_fixed_rate(struct mt7915_dev *dev,
312 			      struct ieee80211_sta *sta, u32 rate);
313 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
314 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset);
315 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
316 		       bool hdr_trans);
317 int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable);
318 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
319 int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val);
320 int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter);
321 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable);
322 int mt7915_mcu_set_sku(struct mt7915_phy *phy);
323 int mt7915_mcu_set_txbf_type(struct mt7915_dev *dev);
324 int mt7915_mcu_set_txbf_sounding(struct mt7915_dev *dev);
325 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
326 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
327 			    const struct mt7915_dfs_pulse *pulse);
328 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
329 			    const struct mt7915_dfs_pattern *pattern);
330 int mt7915_mcu_get_rate_info(struct mt7915_dev *dev, u32 cmd, u16 wlan_idx);
331 int mt7915_mcu_get_temperature(struct mt7915_dev *dev, int index);
332 int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev, enum mt7915_rdd_cmd cmd,
333 		       u8 index, u8 rx_sel, u8 val);
334 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 ctrl);
335 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
336 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
337 void mt7915_mcu_exit(struct mt7915_dev *dev);
338 
is_mt7915(struct mt76_dev * dev)339 static inline bool is_mt7915(struct mt76_dev *dev)
340 {
341 	return mt76_chip(dev) == 0x7915;
342 }
343 
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)344 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
345 {
346 	mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
347 }
348 
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)349 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
350 {
351 	mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
352 }
353 
354 static inline u32
mt7915_reg_map_l1(struct mt7915_dev * dev,u32 addr)355 mt7915_reg_map_l1(struct mt7915_dev *dev, u32 addr)
356 {
357 	u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr);
358 	u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr);
359 
360 	mt76_rmw_field(dev, MT_HIF_REMAP_L1, MT_HIF_REMAP_L1_MASK, base);
361 	/* use read to push write */
362 	mt76_rr(dev, MT_HIF_REMAP_L1);
363 
364 	return MT_HIF_REMAP_BASE_L1 + offset;
365 }
366 
367 static inline u32
mt7915_l1_rr(struct mt7915_dev * dev,u32 addr)368 mt7915_l1_rr(struct mt7915_dev *dev, u32 addr)
369 {
370 	return mt76_rr(dev, mt7915_reg_map_l1(dev, addr));
371 }
372 
373 static inline void
mt7915_l1_wr(struct mt7915_dev * dev,u32 addr,u32 val)374 mt7915_l1_wr(struct mt7915_dev *dev, u32 addr, u32 val)
375 {
376 	mt76_wr(dev, mt7915_reg_map_l1(dev, addr), val);
377 }
378 
379 static inline u32
mt7915_l1_rmw(struct mt7915_dev * dev,u32 addr,u32 mask,u32 val)380 mt7915_l1_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val)
381 {
382 	val |= mt7915_l1_rr(dev, addr) & ~mask;
383 	mt7915_l1_wr(dev, addr, val);
384 
385 	return val;
386 }
387 
388 #define mt7915_l1_set(dev, addr, val)	mt7915_l1_rmw(dev, addr, 0, val)
389 #define mt7915_l1_clear(dev, addr, val)	mt7915_l1_rmw(dev, addr, val, 0)
390 
391 static inline u32
mt7915_reg_map_l2(struct mt7915_dev * dev,u32 addr)392 mt7915_reg_map_l2(struct mt7915_dev *dev, u32 addr)
393 {
394 	u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr);
395 	u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr);
396 
397 	mt76_rmw_field(dev, MT_HIF_REMAP_L2, MT_HIF_REMAP_L2_MASK, base);
398 	/* use read to push write */
399 	mt76_rr(dev, MT_HIF_REMAP_L2);
400 
401 	return MT_HIF_REMAP_BASE_L2 + offset;
402 }
403 
404 static inline u32
mt7915_l2_rr(struct mt7915_dev * dev,u32 addr)405 mt7915_l2_rr(struct mt7915_dev *dev, u32 addr)
406 {
407 	return mt76_rr(dev, mt7915_reg_map_l2(dev, addr));
408 }
409 
410 static inline void
mt7915_l2_wr(struct mt7915_dev * dev,u32 addr,u32 val)411 mt7915_l2_wr(struct mt7915_dev *dev, u32 addr, u32 val)
412 {
413 	mt76_wr(dev, mt7915_reg_map_l2(dev, addr), val);
414 }
415 
416 static inline u32
mt7915_l2_rmw(struct mt7915_dev * dev,u32 addr,u32 mask,u32 val)417 mt7915_l2_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val)
418 {
419 	val |= mt7915_l2_rr(dev, addr) & ~mask;
420 	mt7915_l2_wr(dev, addr, val);
421 
422 	return val;
423 }
424 
425 #define mt7915_l2_set(dev, addr, val)	mt7915_l2_rmw(dev, addr, 0, val)
426 #define mt7915_l2_clear(dev, addr, val)	mt7915_l2_rmw(dev, addr, val, 0)
427 
428 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
429 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
430 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
431 void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi,
432 			   struct sk_buff *skb, struct mt76_wcid *wcid,
433 			   struct ieee80211_key_conf *key, bool beacon);
434 void mt7915_mac_set_timing(struct mt7915_phy *phy);
435 int mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb);
436 void mt7915_mac_tx_free(struct mt7915_dev *dev, struct sk_buff *skb);
437 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
438 		       struct ieee80211_sta *sta);
439 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
440 			   struct ieee80211_sta *sta);
441 void mt7915_mac_work(struct work_struct *work);
442 void mt7915_mac_reset_work(struct work_struct *work);
443 void mt7915_mac_sta_rc_work(struct work_struct *work);
444 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
445 			  enum mt76_txq_id qid, struct mt76_wcid *wcid,
446 			  struct ieee80211_sta *sta,
447 			  struct mt76_tx_info *tx_info);
448 void mt7915_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
449 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
450 			 struct sk_buff *skb);
451 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
452 void mt7915_stats_work(struct work_struct *work);
453 void mt7915_txp_skb_unmap(struct mt76_dev *dev,
454 			  struct mt76_txwi_cache *txwi);
455 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
456 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
457 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
458 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
459 void mt7915_update_channel(struct mt76_dev *mdev);
460 int mt7915_init_debugfs(struct mt7915_dev *dev);
461 #ifdef CONFIG_MAC80211_DEBUGFS
462 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
463 			    struct ieee80211_sta *sta, struct dentry *dir);
464 #endif
465 
466 #endif
467