1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * MV-643XX ethernet platform device data definition file. 4 */ 5 6 #ifndef __LINUX_MV643XX_ETH_H 7 #define __LINUX_MV643XX_ETH_H 8 9 #include <linux/mbus.h> 10 #include <linux/if_ether.h> 11 12 #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" 13 #define MV643XX_ETH_NAME "mv643xx_eth_port" 14 #define MV643XX_ETH_SHARED_REGS 0x2000 15 #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 16 #define MV643XX_ETH_BAR_4 0x2220 17 #define MV643XX_ETH_SIZE_REG_4 0x2224 18 #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 19 20 #define MV643XX_TX_CSUM_DEFAULT_LIMIT 0 21 22 struct mv643xx_eth_shared_platform_data { 23 struct mbus_dram_target_info *dram; 24 /* 25 * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default 26 * limit of 9KiB will be used. 27 */ 28 int tx_csum_limit; 29 }; 30 31 #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 32 #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) 33 #define MV643XX_ETH_PHY_NONE 0xff 34 35 struct device_node; 36 struct mv643xx_eth_platform_data { 37 /* 38 * Pointer back to our parent instance, and our port number. 39 */ 40 struct platform_device *shared; 41 int port_number; 42 43 /* 44 * Whether a PHY is present, and if yes, at which address. 45 */ 46 int phy_addr; 47 struct device_node *phy_node; 48 49 /* 50 * Use this MAC address if it is valid, overriding the 51 * address that is already in the hardware. 52 */ 53 u8 mac_addr[ETH_ALEN]; 54 55 /* 56 * If speed is 0, autonegotiation is enabled. 57 * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. 58 * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. 59 */ 60 int speed; 61 int duplex; 62 63 /* 64 * How many RX/TX queues to use. 65 */ 66 int rx_queue_count; 67 int tx_queue_count; 68 69 /* 70 * Override default RX/TX queue sizes if nonzero. 71 */ 72 int rx_queue_size; 73 int tx_queue_size; 74 75 /* 76 * Use on-chip SRAM for RX/TX descriptors if size is nonzero 77 * and sufficient to contain all descriptors for the requested 78 * ring sizes. 79 */ 80 unsigned long rx_sram_addr; 81 int rx_sram_size; 82 unsigned long tx_sram_addr; 83 int tx_sram_size; 84 }; 85 86 87 #endif 88