| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1453 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1490 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
1829 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
1933 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
1978 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
2197 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2475 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2503 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2668 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2690 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 334 IValueT encodeShiftRotateImm5(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateImm5()
343 IValueT encodeShiftRotateReg(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateReg()
389 IValueT Rm; in encodeOperand() local
985 RegARM32::GPRRegister Rm = getGPRReg(kRmShift, Address); in emitMemOp() local
1062 IValueT Rn, IValueT Rm) { in emitDivOp()
1129 IValueT Rn, IValueT Rm, IValueT Rs, in emitMulOp()
1159 IValueT Rm = encodeGPRegister(OpSrc0, "Rm", InstName); in emitSignExtend() local
1435 IValueT Rm = encodeGPRegister(Target, "Rm", BlxName); in blx() local
1443 void AssemblerARM32::bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond) { in bx()
1467 IValueT Rm = encodeGPRegister(OpSrc, RmName, ClzName); in clz() local
[all …]
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| D | IceAssemblerX8664.h | 986 void emitRexRB(const Type Ty, const RegType Reg, const RmType Rm) { in emitRexRB()
992 const RmType Rm) { in emitRexRB()
999 template <typename RmType> void emitRexB(const Type Ty, const RmType Rm) { in emitRexB()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 3375 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3382 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3412 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3424 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3443 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3463 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3471 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3489 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
3503 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 938 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1509 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 939 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1257 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
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| /third_party/boost/libs/wave/test/testwave/testfiles/ |
| D | t_5_035.hpp | 737 #define Rm macro
|