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Searched defs:Src1 (Results 1 – 25 of 65) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceTargetLoweringMIPS32.h166 void _add(Variable *Dest, Variable *Src0, Variable *Src1) { in _add()
170 void _addu(Variable *Dest, Variable *Src0, Variable *Src1) { in _addu()
174 void _and(Variable *Dest, Variable *Src0, Variable *Src1) { in _and()
189 Operand *Src1, CondMIPS32::Cond Condition) { in _br()
200 Operand *Src1, const InstMIPS32Label *Label, in _br()
222 void _add_d(Variable *Dest, Variable *Src0, Variable *Src1) { in _add_d()
226 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { in _add_s()
234 void _addiu(Variable *Dest, Variable *Src0, Operand *Src1, RelocOp Reloc) { in _addiu()
238 void _c_eq_d(Variable *Src0, Variable *Src1) { in _c_eq_d()
242 void _c_eq_s(Variable *Src0, Variable *Src1) { in _c_eq_s()
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DIceTargetLoweringARM32.h847 void _vadd(Variable *Dest, Variable *Src0, Variable *Src1) { in _vadd()
850 void _vand(Variable *Dest, Variable *Src0, Variable *Src1) { in _vand()
853 InstARM32Vbsl *_vbsl(Variable *Dest, Variable *Src0, Variable *Src1) { in _vbsl()
856 void _vceq(Variable *Dest, Variable *Src0, Variable *Src1) { in _vceq()
859 InstARM32Vcge *_vcge(Variable *Dest, Variable *Src0, Variable *Src1) { in _vcge()
862 InstARM32Vcgt *_vcgt(Variable *Dest, Variable *Src0, Variable *Src1) { in _vcgt()
869 void _vdiv(Variable *Dest, Variable *Src0, Variable *Src1) { in _vdiv()
883 void _veor(Variable *Dest, Variable *Src0, Variable *Src1) { in _veor()
897 void _vmla(Variable *Dest, Variable *Src0, Variable *Src1) { in _vmla()
900 void _vmlap(Variable *Dest, Variable *Src0, Variable *Src1) { in _vmlap()
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DIceTargetLoweringX8632.h447 void _adc_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _adc_rmw()
453 void _add_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _add_rmw()
472 void _and_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _and_rmw()
475 void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) { in _blendvps()
505 void _cmp(Operand *Src0, Operand *Src1) { in _cmp()
536 void _div(Variable *Dest, Operand *Src0, Operand *Src1) { in _div()
547 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) { in _idiv()
556 void _insertps(Variable *Dest, Operand *Src0, Operand *Src1) { in _insertps()
613 void _mul(Variable *Dest, Variable *Src0, Operand *Src1) { in _mul()
630 void _or_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _or_rmw()
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DIceTargetLoweringX8664.h443 void _adc_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _adc_rmw()
449 void _add_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _add_rmw()
468 void _and_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _and_rmw()
471 void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) { in _blendvps()
501 void _cmp(Operand *Src0, Operand *Src1) { in _cmp()
532 void _div(Variable *Dest, Operand *Src0, Operand *Src1) { in _div()
541 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) { in _idiv()
550 void _insertps(Variable *Dest, Operand *Src0, Operand *Src1) { in _insertps()
607 void _mul(Variable *Dest, Variable *Src0, Operand *Src1) { in _mul()
624 void _or_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _or_rmw()
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DIceInstARM32.h771 Operand *Src1, CondARM32::Cond Predicate, bool SetFlags) in InstARM32ThreeAddrGPR()
796 Variable *Src1) { in create()
821 InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1) in InstARM32ThreeAddrFP()
846 Variable *Src0, Variable *Src1) { in create()
852 create(Cfg *Func, Variable *Dest, Variable *Src0, ConstantInteger32 *Src1) { in create()
862 Operand *Src1) in InstARM32ThreeAddrSignAwareFP()
876 Variable *Src1, Variable *Src2, in create()
901 Variable *Src1, Variable *Src2, in InstARM32FourAddrGPR()
926 Variable *Src1) { in create()
950 InstARM32FourAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) in InstARM32FourAddrFP()
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DIceInstMIPS32.h500 Variable *Src0, Variable *Src1) { in create()
528 Variable *Src1) in InstMIPS32ThreeAddrFPR()
549 Variable *Src0, Variable *Src1) { in create()
577 Variable *Src1) in InstMIPS32ThreeAddrGPR()
821 Operand *Src1, CondMIPS32::Cond Cond) { in create()
837 Operand *Src1, const InstMIPS32Label *Label, in create()
903 static InstMIPS32FPCmp *create(Cfg *Func, Variable *Src0, Variable *Src1) { in create()
937 InstMIPS32FPCmp(Cfg *Func, Variable *Src0, Variable *Src1) in InstMIPS32FPCmp()
988 static InstMIPS32Trap *create(Cfg *Func, Operand *Src0, Operand *Src1, in create()
1025 InstMIPS32Trap(Cfg *Func, Operand *Src0, Operand *Src1, const uint32_t Tcode) in InstMIPS32Trap()
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DIceTargetLoweringX8664.cpp666 Operand *&Src0, Operand *&Src1) { in canFoldLoadIntoBinaryInst()
721 Operand *Src1 = Arith->getSrc(1); in doLoadOpt() local
728 Operand *Src1 = Icmp->getSrc(1); in doLoadOpt() local
735 Operand *Src1 = Fcmp->getSrc(1); in doLoadOpt() local
742 Operand *Src1 = Select->getFalseOperand(); in doLoadOpt() local
1350 int32_t Src1) { in optimizeScalarMul()
1662 Operand *Src1 = legalize(Instr->getSrc(1)); in lowerArithmetic() local
2786 Operand *Src1 = Fcmp->getSrc(1); in lowerFcmpAndConsumer() local
2890 Operand *Src1 = Fcmp->getSrc(1); in lowerFcmpVector() local
2962 Operand *Src1 = legalize(Icmp->getSrc(1)); in lowerIcmpAndConsumer() local
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DIceTargetLoweringX8632.cpp657 Operand *&Src0, Operand *&Src1) { in canFoldLoadIntoBinaryInst()
711 Operand *Src1 = Arith->getSrc(1); in doLoadOpt() local
718 Operand *Src1 = Icmp->getSrc(1); in doLoadOpt() local
725 Operand *Src1 = Fcmp->getSrc(1); in doLoadOpt() local
732 Operand *Src1 = Select->getFalseOperand(); in doLoadOpt() local
1427 int32_t Src1) { in optimizeScalarMul()
1739 Operand *Src1 = legalize(Instr->getSrc(1)); in lowerArithmetic() local
3083 Operand *Src1 = Fcmp->getSrc(1); in lowerFcmpAndConsumer() local
3187 Operand *Src1 = Fcmp->getSrc(1); in lowerFcmpVector() local
3259 Operand *Src1 = legalize(Icmp->getSrc(1)); in lowerIcmpAndConsumer() local
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DIceTargetLoweringARM32.cpp532 Operand *Src1 = Instr->getSrc(1); in genTargetHelperCallFor() local
2133 Operand *Src1, ExtInstr ExtFunc, in lowerIDivRem()
2171 Operand *Src1 = Instr->getSrc(1); in lowerInt1Arithmetic() local
2259 Operand *const Src1; member in Ice::ARM32::__anondab86aea0a11::NumericOperandsBase
2367 Operand *Src1 = Instr->getArg(1); in preambleDivRem() local
2399 Operand *Src1) { in lowerInt64Arithmetic()
2903 Operand *Src1 = legalizeUndef(Instr->getSrc(1)); in lowerArithmetic() local
4053 Operand *Src1 = Instr->getSrc(1); in lowerExtractElement() local
4132 Operand *Src1 = Instr->getSrc(1); in lowerFcmpCond() local
4170 auto *Src1 = legalizeToReg(Instr->getSrc(1)); in lowerFcmp() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/Interpreter/
DExecution.cpp108 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, in executeFAddInst()
119 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, in executeFSubInst()
130 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, in executeFMulInst()
141 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, in executeFDivInst()
152 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, in executeFRemInst()
191 static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, in executeICMP_EQ()
205 static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, in executeICMP_NE()
219 static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, in executeICMP_ULT()
233 static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, in executeICMP_SLT()
247 static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, in executeICMP_UGT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DConstantFoldingMIRBuilder.h51 const SrcOp &Src1 = SrcOps[1]; variable
62 const SrcOp &Src1 = SrcOps[1]; variable
DMachineIRBuilder.h1313 const SrcOp &Src1) { in buildAnd()
1328 const SrcOp &Src1) { in buildOr()
1334 const SrcOp &Src1) { in buildXor()
1380 const SrcOp &Src1) { in buildFSub()
1424 const SrcOp &Src1) { in buildFCopysign()
1450 const SrcOp &Src1) { in buildSMin()
1456 const SrcOp &Src1) { in buildSMax()
1462 const SrcOp &Src1) { in buildUMin()
1468 const SrcOp &Src1) { in buildUMax()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIOptimizeExecMasking.cpp110 const MachineOperand &Src1 = MI.getOperand(1); in isLogicalOpOnExec() local
126 const MachineOperand &Src1 = MI.getOperand(1); in isLogicalOpOnExec() local
390 MachineOperand &Src1 = SaveExecInst->getOperand(2); in runOnMachineFunction() local
DR600ExpandSpecialInstrs.cpp161 Register Src1 = in runOnMachineFunction() local
212 unsigned Src1 = 0; in runOnMachineFunction() local
DSIPeepholeSDWA.cpp571 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
609 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
644 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
691 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
1043 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA() local
DSIShrinkInstructions.cpp188 const MachineOperand &Src1 = MI.getOperand(1); in shrinkScalarCompare() local
322 MachineOperand *Src1 = &MI.getOperand(2); in shrinkScalarLogicOp() local
636 MachineOperand *Src1 = &MI.getOperand(2); in runOnMachineFunction() local
DGCNDPPCombine.cpp230 if (auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) { in createDPPInst() local
323 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in createDPPInst() local
DSIFoldOperands.cpp1005 MachineOperand *Src1 = getImmOrMaterializedImm(MRI, MI->getOperand(Src1Idx)); in tryConstantFoldOp() local
1109 const MachineOperand *Src1 = TII->getNamedOperand(*MI, AMDGPU::OpName::src1); in tryFoldInst() local
1275 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isClamp() local
1391 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() local
1420 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() local
DSIInstrInfo.cpp1633 MachineOperand &Src1, in swapSourceModifiers()
1691 MachineOperand &Src1 = MI.getOperand(Src1Idx); in commuteInstructionImpl() local
2377 MachineOperand *Src1 = getNamedOperand(UseMI, AMDGPU::OpName::src1); in FoldImmediate() local
2655 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in convertToThreeAddress() local
3013 const MachineOperand *Src1 in canShrink() local
3034 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() local
3087 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in buildShrunkInst() local
3526 const MachineOperand &Src1 = MI.getOperand(Src1Idx); in verifyInstruction() local
3539 const MachineOperand &Src1 = MI.getOperand(Src1Idx); in verifyInstruction() local
4030 MachineOperand &Src1 = MI.getOperand(Src1Idx); in legalizeOperandsVOP2() local
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DControlFlow.cpp17 #define TestJ(C, Near, Dest, Src0, Value0, Src1, Value1) \ in TEST_F() argument
39 #define TestImpl(Dst, Src0, Src1) \ in TEST_F() argument
DGPRArith.cpp33 #define TestSetCC(C, Dest, IsTrue, Src0, Value0, Src1, Value1) \ in TEST_F() argument
57 #define TestImpl(Dest, Src0, Src1) \ in TEST_F() argument
709 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
800 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
862 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
873 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \ in TEST_F() argument
879 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \ in TEST_F() argument
885 #define TestImpl(Dst0, Dst1, Src0, Src1) \ in TEST_F() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp156 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
173 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZSelectionDAGInfo.cpp146 SDValue Src1, SDValue Src2, uint64_t Size) { in emitCLC()
180 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp()
231 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForStrcmp()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DControlFlow.cpp18 #define TestJ(C, Near, Src0, Value0, Src1, Value1, Dest) \ in TEST_F() argument
DGPRArith.cpp48 #define TestSetCC(C, Src0, Value0, Src1, Value1, Dest, IsTrue) \ in TEST_F() argument
678 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
773 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
837 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
848 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \ in TEST_F() argument
854 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \ in TEST_F() argument
860 #define TestImpl(Dst0, Dst1, Src0, Src1) \ in TEST_F() argument

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