1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * SMP related functions
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
9 *
10 * based on other smp stuff by
11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
12 * (c) 1998 Ingo Molnar
13 *
14 * The code outside of smp.c uses logical cpu numbers, only smp.c does
15 * the translation of logical to physical cpu ids. All new code that
16 * operates on physical cpu numbers needs to go into smp.c.
17 */
18
19 #define KMSG_COMPONENT "cpu"
20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22 #include <linux/workqueue.h>
23 #include <linux/memblock.h>
24 #include <linux/export.h>
25 #include <linux/init.h>
26 #include <linux/mm.h>
27 #include <linux/err.h>
28 #include <linux/spinlock.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/irqflags.h>
33 #include <linux/cpu.h>
34 #include <linux/slab.h>
35 #include <linux/sched/hotplug.h>
36 #include <linux/sched/task_stack.h>
37 #include <linux/crash_dump.h>
38 #include <linux/kprobes.h>
39 #include <asm/asm-offsets.h>
40 #include <asm/diag.h>
41 #include <asm/switch_to.h>
42 #include <asm/facility.h>
43 #include <asm/ipl.h>
44 #include <asm/setup.h>
45 #include <asm/irq.h>
46 #include <asm/tlbflush.h>
47 #include <asm/vtimer.h>
48 #include <asm/lowcore.h>
49 #include <asm/sclp.h>
50 #include <asm/vdso.h>
51 #include <asm/debug.h>
52 #include <asm/os_info.h>
53 #include <asm/sigp.h>
54 #include <asm/idle.h>
55 #include <asm/nmi.h>
56 #include <asm/stacktrace.h>
57 #include <asm/topology.h>
58 #include "entry.h"
59
60 enum {
61 ec_schedule = 0,
62 ec_call_function_single,
63 ec_stop_cpu,
64 ec_mcck_pending,
65 };
66
67 enum {
68 CPU_STATE_STANDBY,
69 CPU_STATE_CONFIGURED,
70 };
71
72 static DEFINE_PER_CPU(struct cpu *, cpu_device);
73
74 struct pcpu {
75 struct lowcore *lowcore; /* lowcore page(s) for the cpu */
76 unsigned long ec_mask; /* bit mask for ec_xxx functions */
77 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
78 signed char state; /* physical cpu state */
79 signed char polarization; /* physical polarization */
80 u16 address; /* physical cpu address */
81 };
82
83 static u8 boot_core_type;
84 static struct pcpu pcpu_devices[NR_CPUS];
85
86 unsigned int smp_cpu_mt_shift;
87 EXPORT_SYMBOL(smp_cpu_mt_shift);
88
89 unsigned int smp_cpu_mtid;
90 EXPORT_SYMBOL(smp_cpu_mtid);
91
92 #ifdef CONFIG_CRASH_DUMP
93 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
94 #endif
95
96 static unsigned int smp_max_threads __initdata = -1U;
97
early_nosmt(char * s)98 static int __init early_nosmt(char *s)
99 {
100 smp_max_threads = 1;
101 return 0;
102 }
103 early_param("nosmt", early_nosmt);
104
early_smt(char * s)105 static int __init early_smt(char *s)
106 {
107 get_option(&s, &smp_max_threads);
108 return 0;
109 }
110 early_param("smt", early_smt);
111
112 /*
113 * The smp_cpu_state_mutex must be held when changing the state or polarization
114 * member of a pcpu data structure within the pcpu_devices arreay.
115 */
116 DEFINE_MUTEX(smp_cpu_state_mutex);
117
118 /*
119 * Signal processor helper functions.
120 */
__pcpu_sigp_relax(u16 addr,u8 order,unsigned long parm)121 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
122 {
123 int cc;
124
125 while (1) {
126 cc = __pcpu_sigp(addr, order, parm, NULL);
127 if (cc != SIGP_CC_BUSY)
128 return cc;
129 cpu_relax();
130 }
131 }
132
pcpu_sigp_retry(struct pcpu * pcpu,u8 order,u32 parm)133 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
134 {
135 int cc, retry;
136
137 for (retry = 0; ; retry++) {
138 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
139 if (cc != SIGP_CC_BUSY)
140 break;
141 if (retry >= 3)
142 udelay(10);
143 }
144 return cc;
145 }
146
pcpu_stopped(struct pcpu * pcpu)147 static inline int pcpu_stopped(struct pcpu *pcpu)
148 {
149 u32 status;
150
151 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
152 0, &status) != SIGP_CC_STATUS_STORED)
153 return 0;
154 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
155 }
156
pcpu_running(struct pcpu * pcpu)157 static inline int pcpu_running(struct pcpu *pcpu)
158 {
159 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
160 0, NULL) != SIGP_CC_STATUS_STORED)
161 return 1;
162 /* Status stored condition code is equivalent to cpu not running. */
163 return 0;
164 }
165
166 /*
167 * Find struct pcpu by cpu address.
168 */
pcpu_find_address(const struct cpumask * mask,u16 address)169 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
170 {
171 int cpu;
172
173 for_each_cpu(cpu, mask)
174 if (pcpu_devices[cpu].address == address)
175 return pcpu_devices + cpu;
176 return NULL;
177 }
178
pcpu_ec_call(struct pcpu * pcpu,int ec_bit)179 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
180 {
181 int order;
182
183 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
184 return;
185 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
186 pcpu->ec_clk = get_tod_clock_fast();
187 pcpu_sigp_retry(pcpu, order, 0);
188 }
189
pcpu_alloc_lowcore(struct pcpu * pcpu,int cpu)190 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
191 {
192 unsigned long async_stack, nodat_stack;
193 struct lowcore *lc;
194
195 if (pcpu != &pcpu_devices[0]) {
196 pcpu->lowcore = (struct lowcore *)
197 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
199 if (!pcpu->lowcore || !nodat_stack)
200 goto out;
201 } else {
202 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET;
203 }
204 async_stack = stack_alloc();
205 if (!async_stack)
206 goto out;
207 lc = pcpu->lowcore;
208 memcpy(lc, &S390_lowcore, 512);
209 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
210 lc->async_stack = async_stack + STACK_INIT_OFFSET;
211 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
212 lc->cpu_nr = cpu;
213 lc->spinlock_lockval = arch_spin_lockval(cpu);
214 lc->spinlock_index = 0;
215 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
216 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
217 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
218 lc->preempt_count = PREEMPT_DISABLED;
219 if (nmi_alloc_per_cpu(lc))
220 goto out_async;
221 if (vdso_alloc_per_cpu(lc))
222 goto out_mcesa;
223 lowcore_ptr[cpu] = lc;
224 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
225 return 0;
226
227 out_mcesa:
228 nmi_free_per_cpu(lc);
229 out_async:
230 stack_free(async_stack);
231 out:
232 if (pcpu != &pcpu_devices[0]) {
233 free_pages(nodat_stack, THREAD_SIZE_ORDER);
234 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
235 }
236 return -ENOMEM;
237 }
238
pcpu_free_lowcore(struct pcpu * pcpu)239 static void pcpu_free_lowcore(struct pcpu *pcpu)
240 {
241 unsigned long async_stack, nodat_stack, lowcore;
242
243 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET;
244 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET;
245 lowcore = (unsigned long) pcpu->lowcore;
246
247 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
248 lowcore_ptr[pcpu - pcpu_devices] = NULL;
249 vdso_free_per_cpu(pcpu->lowcore);
250 nmi_free_per_cpu(pcpu->lowcore);
251 stack_free(async_stack);
252 if (pcpu == &pcpu_devices[0])
253 return;
254 free_pages(nodat_stack, THREAD_SIZE_ORDER);
255 free_pages(lowcore, LC_ORDER);
256 }
257
pcpu_prepare_secondary(struct pcpu * pcpu,int cpu)258 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
259 {
260 struct lowcore *lc = pcpu->lowcore;
261
262 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
263 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
264 lc->cpu_nr = cpu;
265 lc->spinlock_lockval = arch_spin_lockval(cpu);
266 lc->spinlock_index = 0;
267 lc->percpu_offset = __per_cpu_offset[cpu];
268 lc->kernel_asce = S390_lowcore.kernel_asce;
269 lc->user_asce = S390_lowcore.kernel_asce;
270 lc->machine_flags = S390_lowcore.machine_flags;
271 lc->user_timer = lc->system_timer =
272 lc->steal_timer = lc->avg_steal_timer = 0;
273 __ctl_store(lc->cregs_save_area, 0, 15);
274 lc->cregs_save_area[1] = lc->kernel_asce;
275 lc->cregs_save_area[7] = lc->vdso_asce;
276 save_access_regs((unsigned int *) lc->access_regs_save_area);
277 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
278 sizeof(lc->stfle_fac_list));
279 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
280 sizeof(lc->alt_stfle_fac_list));
281 arch_spin_lock_setup(cpu);
282 }
283
pcpu_attach_task(struct pcpu * pcpu,struct task_struct * tsk)284 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
285 {
286 struct lowcore *lc = pcpu->lowcore;
287
288 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
289 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
290 lc->current_task = (unsigned long) tsk;
291 lc->lpp = LPP_MAGIC;
292 lc->current_pid = tsk->pid;
293 lc->user_timer = tsk->thread.user_timer;
294 lc->guest_timer = tsk->thread.guest_timer;
295 lc->system_timer = tsk->thread.system_timer;
296 lc->hardirq_timer = tsk->thread.hardirq_timer;
297 lc->softirq_timer = tsk->thread.softirq_timer;
298 lc->steal_timer = 0;
299 }
300
pcpu_start_fn(struct pcpu * pcpu,void (* func)(void *),void * data)301 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
302 {
303 struct lowcore *lc = pcpu->lowcore;
304
305 lc->restart_stack = lc->nodat_stack;
306 lc->restart_fn = (unsigned long) func;
307 lc->restart_data = (unsigned long) data;
308 lc->restart_source = -1UL;
309 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
310 }
311
312 /*
313 * Call function via PSW restart on pcpu and stop the current cpu.
314 */
__pcpu_delegate(void (* func)(void *),void * data)315 static void __pcpu_delegate(void (*func)(void*), void *data)
316 {
317 func(data); /* should not return */
318 }
319
pcpu_delegate(struct pcpu * pcpu,void (* func)(void *),void * data,unsigned long stack)320 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu,
321 void (*func)(void *),
322 void *data, unsigned long stack)
323 {
324 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
325 unsigned long source_cpu = stap();
326
327 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
328 if (pcpu->address == source_cpu)
329 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data);
330 /* Stop target cpu (if func returns this stops the current cpu). */
331 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
332 /* Restart func on the target cpu and stop the current cpu. */
333 mem_assign_absolute(lc->restart_stack, stack);
334 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
335 mem_assign_absolute(lc->restart_data, (unsigned long) data);
336 mem_assign_absolute(lc->restart_source, source_cpu);
337 __bpon();
338 asm volatile(
339 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
340 " brc 2,0b # busy, try again\n"
341 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
342 " brc 2,1b # busy, try again\n"
343 : : "d" (pcpu->address), "d" (source_cpu),
344 "K" (SIGP_RESTART), "K" (SIGP_STOP)
345 : "0", "1", "cc");
346 for (;;) ;
347 }
348
349 /*
350 * Enable additional logical cpus for multi-threading.
351 */
pcpu_set_smt(unsigned int mtid)352 static int pcpu_set_smt(unsigned int mtid)
353 {
354 int cc;
355
356 if (smp_cpu_mtid == mtid)
357 return 0;
358 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
359 if (cc == 0) {
360 smp_cpu_mtid = mtid;
361 smp_cpu_mt_shift = 0;
362 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
363 smp_cpu_mt_shift++;
364 pcpu_devices[0].address = stap();
365 }
366 return cc;
367 }
368
369 /*
370 * Call function on an online CPU.
371 */
smp_call_online_cpu(void (* func)(void *),void * data)372 void smp_call_online_cpu(void (*func)(void *), void *data)
373 {
374 struct pcpu *pcpu;
375
376 /* Use the current cpu if it is online. */
377 pcpu = pcpu_find_address(cpu_online_mask, stap());
378 if (!pcpu)
379 /* Use the first online cpu. */
380 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
381 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
382 }
383
384 /*
385 * Call function on the ipl CPU.
386 */
smp_call_ipl_cpu(void (* func)(void *),void * data)387 void smp_call_ipl_cpu(void (*func)(void *), void *data)
388 {
389 struct lowcore *lc = pcpu_devices->lowcore;
390
391 if (pcpu_devices[0].address == stap())
392 lc = &S390_lowcore;
393
394 pcpu_delegate(&pcpu_devices[0], func, data,
395 lc->nodat_stack);
396 }
397
smp_find_processor_id(u16 address)398 int smp_find_processor_id(u16 address)
399 {
400 int cpu;
401
402 for_each_present_cpu(cpu)
403 if (pcpu_devices[cpu].address == address)
404 return cpu;
405 return -1;
406 }
407
schedule_mcck_handler(void)408 void schedule_mcck_handler(void)
409 {
410 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending);
411 }
412
arch_vcpu_is_preempted(int cpu)413 bool notrace arch_vcpu_is_preempted(int cpu)
414 {
415 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
416 return false;
417 if (pcpu_running(pcpu_devices + cpu))
418 return false;
419 return true;
420 }
421 EXPORT_SYMBOL(arch_vcpu_is_preempted);
422
smp_yield_cpu(int cpu)423 void notrace smp_yield_cpu(int cpu)
424 {
425 if (!MACHINE_HAS_DIAG9C)
426 return;
427 diag_stat_inc_norecursion(DIAG_STAT_X09C);
428 asm volatile("diag %0,0,0x9c"
429 : : "d" (pcpu_devices[cpu].address));
430 }
431
432 /*
433 * Send cpus emergency shutdown signal. This gives the cpus the
434 * opportunity to complete outstanding interrupts.
435 */
smp_emergency_stop(void)436 void notrace smp_emergency_stop(void)
437 {
438 cpumask_t cpumask;
439 u64 end;
440 int cpu;
441
442 cpumask_copy(&cpumask, cpu_online_mask);
443 cpumask_clear_cpu(smp_processor_id(), &cpumask);
444
445 end = get_tod_clock() + (1000000UL << 12);
446 for_each_cpu(cpu, &cpumask) {
447 struct pcpu *pcpu = pcpu_devices + cpu;
448 set_bit(ec_stop_cpu, &pcpu->ec_mask);
449 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
450 0, NULL) == SIGP_CC_BUSY &&
451 get_tod_clock() < end)
452 cpu_relax();
453 }
454 while (get_tod_clock() < end) {
455 for_each_cpu(cpu, &cpumask)
456 if (pcpu_stopped(pcpu_devices + cpu))
457 cpumask_clear_cpu(cpu, &cpumask);
458 if (cpumask_empty(&cpumask))
459 break;
460 cpu_relax();
461 }
462 }
463 NOKPROBE_SYMBOL(smp_emergency_stop);
464
465 /*
466 * Stop all cpus but the current one.
467 */
smp_send_stop(void)468 void smp_send_stop(void)
469 {
470 int cpu;
471
472 /* Disable all interrupts/machine checks */
473 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
474 trace_hardirqs_off();
475
476 debug_set_critical();
477
478 if (oops_in_progress)
479 smp_emergency_stop();
480
481 /* stop all processors */
482 for_each_online_cpu(cpu) {
483 if (cpu == smp_processor_id())
484 continue;
485 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
486 while (!pcpu_stopped(pcpu_devices + cpu))
487 cpu_relax();
488 }
489 }
490
491 /*
492 * This is the main routine where commands issued by other
493 * cpus are handled.
494 */
smp_handle_ext_call(void)495 static void smp_handle_ext_call(void)
496 {
497 unsigned long bits;
498
499 /* handle bit signal external calls */
500 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
501 if (test_bit(ec_stop_cpu, &bits))
502 smp_stop_cpu();
503 if (test_bit(ec_schedule, &bits))
504 scheduler_ipi();
505 if (test_bit(ec_call_function_single, &bits))
506 generic_smp_call_function_single_interrupt();
507 if (test_bit(ec_mcck_pending, &bits))
508 s390_handle_mcck();
509 }
510
do_ext_call_interrupt(struct ext_code ext_code,unsigned int param32,unsigned long param64)511 static void do_ext_call_interrupt(struct ext_code ext_code,
512 unsigned int param32, unsigned long param64)
513 {
514 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
515 smp_handle_ext_call();
516 }
517
arch_send_call_function_ipi_mask(const struct cpumask * mask)518 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
519 {
520 int cpu;
521
522 for_each_cpu(cpu, mask)
523 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
524 }
525
arch_send_call_function_single_ipi(int cpu)526 void arch_send_call_function_single_ipi(int cpu)
527 {
528 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
529 }
530
531 /*
532 * this function sends a 'reschedule' IPI to another CPU.
533 * it goes straight through and wastes no time serializing
534 * anything. Worst case is that we lose a reschedule ...
535 */
smp_send_reschedule(int cpu)536 void smp_send_reschedule(int cpu)
537 {
538 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
539 }
540
541 /*
542 * parameter area for the set/clear control bit callbacks
543 */
544 struct ec_creg_mask_parms {
545 unsigned long orval;
546 unsigned long andval;
547 int cr;
548 };
549
550 /*
551 * callback for setting/clearing control bits
552 */
smp_ctl_bit_callback(void * info)553 static void smp_ctl_bit_callback(void *info)
554 {
555 struct ec_creg_mask_parms *pp = info;
556 unsigned long cregs[16];
557
558 __ctl_store(cregs, 0, 15);
559 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
560 __ctl_load(cregs, 0, 15);
561 }
562
563 /*
564 * Set a bit in a control register of all cpus
565 */
smp_ctl_set_bit(int cr,int bit)566 void smp_ctl_set_bit(int cr, int bit)
567 {
568 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
569
570 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
571 }
572 EXPORT_SYMBOL(smp_ctl_set_bit);
573
574 /*
575 * Clear a bit in a control register of all cpus
576 */
smp_ctl_clear_bit(int cr,int bit)577 void smp_ctl_clear_bit(int cr, int bit)
578 {
579 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
580
581 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
582 }
583 EXPORT_SYMBOL(smp_ctl_clear_bit);
584
585 #ifdef CONFIG_CRASH_DUMP
586
smp_store_status(int cpu)587 int smp_store_status(int cpu)
588 {
589 struct pcpu *pcpu = pcpu_devices + cpu;
590 unsigned long pa;
591
592 pa = __pa(&pcpu->lowcore->floating_pt_save_area);
593 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
594 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
595 return -EIO;
596 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
597 return 0;
598 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
599 if (MACHINE_HAS_GS)
600 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
601 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
602 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
603 return -EIO;
604 return 0;
605 }
606
607 /*
608 * Collect CPU state of the previous, crashed system.
609 * There are four cases:
610 * 1) standard zfcp/nvme dump
611 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
612 * The state for all CPUs except the boot CPU needs to be collected
613 * with sigp stop-and-store-status. The boot CPU state is located in
614 * the absolute lowcore of the memory stored in the HSA. The zcore code
615 * will copy the boot CPU state from the HSA.
616 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
617 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
618 * The state for all CPUs except the boot CPU needs to be collected
619 * with sigp stop-and-store-status. The firmware or the boot-loader
620 * stored the registers of the boot CPU in the absolute lowcore in the
621 * memory of the old system.
622 * 3) kdump and the old kernel did not store the CPU state,
623 * or stand-alone kdump for DASD
624 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
625 * The state for all CPUs except the boot CPU needs to be collected
626 * with sigp stop-and-store-status. The kexec code or the boot-loader
627 * stored the registers of the boot CPU in the memory of the old system.
628 * 4) kdump and the old kernel stored the CPU state
629 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
630 * This case does not exist for s390 anymore, setup_arch explicitly
631 * deactivates the elfcorehdr= kernel parameter
632 */
smp_save_cpu_vxrs(struct save_area * sa,u16 addr,bool is_boot_cpu,unsigned long page)633 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
634 bool is_boot_cpu, unsigned long page)
635 {
636 __vector128 *vxrs = (__vector128 *) page;
637
638 if (is_boot_cpu)
639 vxrs = boot_cpu_vector_save_area;
640 else
641 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
642 save_area_add_vxrs(sa, vxrs);
643 }
644
smp_save_cpu_regs(struct save_area * sa,u16 addr,bool is_boot_cpu,unsigned long page)645 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
646 bool is_boot_cpu, unsigned long page)
647 {
648 void *regs = (void *) page;
649
650 if (is_boot_cpu)
651 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
652 else
653 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
654 save_area_add_regs(sa, regs);
655 }
656
smp_save_dump_cpus(void)657 void __init smp_save_dump_cpus(void)
658 {
659 int addr, boot_cpu_addr, max_cpu_addr;
660 struct save_area *sa;
661 unsigned long page;
662 bool is_boot_cpu;
663
664 if (!(OLDMEM_BASE || is_ipl_type_dump()))
665 /* No previous system present, normal boot. */
666 return;
667 /* Allocate a page as dumping area for the store status sigps */
668 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31);
669 if (!page)
670 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
671 PAGE_SIZE, 1UL << 31);
672
673 /* Set multi-threading state to the previous system. */
674 pcpu_set_smt(sclp.mtid_prev);
675 boot_cpu_addr = stap();
676 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
677 for (addr = 0; addr <= max_cpu_addr; addr++) {
678 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
679 SIGP_CC_NOT_OPERATIONAL)
680 continue;
681 is_boot_cpu = (addr == boot_cpu_addr);
682 /* Allocate save area */
683 sa = save_area_alloc(is_boot_cpu);
684 if (!sa)
685 panic("could not allocate memory for save area\n");
686 if (MACHINE_HAS_VX)
687 /* Get the vector registers */
688 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
689 /*
690 * For a zfcp/nvme dump OLDMEM_BASE == NULL and the registers
691 * of the boot CPU are stored in the HSA. To retrieve
692 * these registers an SCLP request is required which is
693 * done by drivers/s390/char/zcore.c:init_cpu_info()
694 */
695 if (!is_boot_cpu || OLDMEM_BASE)
696 /* Get the CPU registers */
697 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
698 }
699 memblock_free(page, PAGE_SIZE);
700 diag_dma_ops.diag308_reset();
701 pcpu_set_smt(0);
702 }
703 #endif /* CONFIG_CRASH_DUMP */
704
smp_cpu_set_polarization(int cpu,int val)705 void smp_cpu_set_polarization(int cpu, int val)
706 {
707 pcpu_devices[cpu].polarization = val;
708 }
709
smp_cpu_get_polarization(int cpu)710 int smp_cpu_get_polarization(int cpu)
711 {
712 return pcpu_devices[cpu].polarization;
713 }
714
smp_cpu_get_cpu_address(int cpu)715 int smp_cpu_get_cpu_address(int cpu)
716 {
717 return pcpu_devices[cpu].address;
718 }
719
smp_get_core_info(struct sclp_core_info * info,int early)720 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
721 {
722 static int use_sigp_detection;
723 int address;
724
725 if (use_sigp_detection || sclp_get_core_info(info, early)) {
726 use_sigp_detection = 1;
727 for (address = 0;
728 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
729 address += (1U << smp_cpu_mt_shift)) {
730 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
731 SIGP_CC_NOT_OPERATIONAL)
732 continue;
733 info->core[info->configured].core_id =
734 address >> smp_cpu_mt_shift;
735 info->configured++;
736 }
737 info->combined = info->configured;
738 }
739 }
740
741 static int smp_add_present_cpu(int cpu);
742
smp_add_core(struct sclp_core_entry * core,cpumask_t * avail,bool configured,bool early)743 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
744 bool configured, bool early)
745 {
746 struct pcpu *pcpu;
747 int cpu, nr, i;
748 u16 address;
749
750 nr = 0;
751 if (sclp.has_core_type && core->type != boot_core_type)
752 return nr;
753 cpu = cpumask_first(avail);
754 address = core->core_id << smp_cpu_mt_shift;
755 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
756 if (pcpu_find_address(cpu_present_mask, address + i))
757 continue;
758 pcpu = pcpu_devices + cpu;
759 pcpu->address = address + i;
760 if (configured)
761 pcpu->state = CPU_STATE_CONFIGURED;
762 else
763 pcpu->state = CPU_STATE_STANDBY;
764 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
765 set_cpu_present(cpu, true);
766 if (!early && smp_add_present_cpu(cpu) != 0)
767 set_cpu_present(cpu, false);
768 else
769 nr++;
770 cpumask_clear_cpu(cpu, avail);
771 cpu = cpumask_next(cpu, avail);
772 }
773 return nr;
774 }
775
__smp_rescan_cpus(struct sclp_core_info * info,bool early)776 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
777 {
778 struct sclp_core_entry *core;
779 static cpumask_t avail;
780 bool configured;
781 u16 core_id;
782 int nr, i;
783
784 nr = 0;
785 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
786 /*
787 * Add IPL core first (which got logical CPU number 0) to make sure
788 * that all SMT threads get subsequent logical CPU numbers.
789 */
790 if (early) {
791 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
792 for (i = 0; i < info->configured; i++) {
793 core = &info->core[i];
794 if (core->core_id == core_id) {
795 nr += smp_add_core(core, &avail, true, early);
796 break;
797 }
798 }
799 }
800 for (i = 0; i < info->combined; i++) {
801 configured = i < info->configured;
802 nr += smp_add_core(&info->core[i], &avail, configured, early);
803 }
804 return nr;
805 }
806
smp_detect_cpus(void)807 void __init smp_detect_cpus(void)
808 {
809 unsigned int cpu, mtid, c_cpus, s_cpus;
810 struct sclp_core_info *info;
811 u16 address;
812
813 /* Get CPU information */
814 info = memblock_alloc(sizeof(*info), 8);
815 if (!info)
816 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
817 __func__, sizeof(*info), 8);
818 smp_get_core_info(info, 1);
819 /* Find boot CPU type */
820 if (sclp.has_core_type) {
821 address = stap();
822 for (cpu = 0; cpu < info->combined; cpu++)
823 if (info->core[cpu].core_id == address) {
824 /* The boot cpu dictates the cpu type. */
825 boot_core_type = info->core[cpu].type;
826 break;
827 }
828 if (cpu >= info->combined)
829 panic("Could not find boot CPU type");
830 }
831
832 /* Set multi-threading state for the current system */
833 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
834 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
835 pcpu_set_smt(mtid);
836
837 /* Print number of CPUs */
838 c_cpus = s_cpus = 0;
839 for (cpu = 0; cpu < info->combined; cpu++) {
840 if (sclp.has_core_type &&
841 info->core[cpu].type != boot_core_type)
842 continue;
843 if (cpu < info->configured)
844 c_cpus += smp_cpu_mtid + 1;
845 else
846 s_cpus += smp_cpu_mtid + 1;
847 }
848 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
849
850 /* Add CPUs present at boot */
851 get_online_cpus();
852 __smp_rescan_cpus(info, true);
853 put_online_cpus();
854 memblock_free_early((unsigned long)info, sizeof(*info));
855 }
856
smp_init_secondary(void)857 static void smp_init_secondary(void)
858 {
859 int cpu = raw_smp_processor_id();
860
861 S390_lowcore.last_update_clock = get_tod_clock();
862 restore_access_regs(S390_lowcore.access_regs_save_area);
863 set_cpu_flag(CIF_ASCE_PRIMARY);
864 set_cpu_flag(CIF_ASCE_SECONDARY);
865 cpu_init();
866 rcu_cpu_starting(cpu);
867 init_cpu_timer();
868 vtime_init();
869 pfault_init();
870 notify_cpu_starting(cpu);
871 if (topology_cpu_dedicated(cpu))
872 set_cpu_flag(CIF_DEDICATED_CPU);
873 else
874 clear_cpu_flag(CIF_DEDICATED_CPU);
875 set_cpu_online(cpu, true);
876 update_cpu_masks();
877 inc_irq_stat(CPU_RST);
878 local_irq_enable();
879 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
880 }
881
882 /*
883 * Activate a secondary processor.
884 */
smp_start_secondary(void * cpuvoid)885 static void __no_sanitize_address smp_start_secondary(void *cpuvoid)
886 {
887 S390_lowcore.restart_stack = (unsigned long) restart_stack;
888 S390_lowcore.restart_fn = (unsigned long) do_restart;
889 S390_lowcore.restart_data = 0;
890 S390_lowcore.restart_source = -1UL;
891 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
892 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
893 CALL_ON_STACK_NORETURN(smp_init_secondary, S390_lowcore.kernel_stack);
894 }
895
896 /* Upping and downing of CPUs */
__cpu_up(unsigned int cpu,struct task_struct * tidle)897 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
898 {
899 struct pcpu *pcpu = pcpu_devices + cpu;
900 int rc;
901
902 if (pcpu->state != CPU_STATE_CONFIGURED)
903 return -EIO;
904 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
905 SIGP_CC_ORDER_CODE_ACCEPTED)
906 return -EIO;
907
908 rc = pcpu_alloc_lowcore(pcpu, cpu);
909 if (rc)
910 return rc;
911 pcpu_prepare_secondary(pcpu, cpu);
912 pcpu_attach_task(pcpu, tidle);
913 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
914 /* Wait until cpu puts itself in the online & active maps */
915 while (!cpu_online(cpu))
916 cpu_relax();
917 return 0;
918 }
919
920 static unsigned int setup_possible_cpus __initdata;
921
_setup_possible_cpus(char * s)922 static int __init _setup_possible_cpus(char *s)
923 {
924 get_option(&s, &setup_possible_cpus);
925 return 0;
926 }
927 early_param("possible_cpus", _setup_possible_cpus);
928
__cpu_disable(void)929 int __cpu_disable(void)
930 {
931 unsigned long cregs[16];
932
933 /* Handle possible pending IPIs */
934 smp_handle_ext_call();
935 set_cpu_online(smp_processor_id(), false);
936 update_cpu_masks();
937 /* Disable pseudo page faults on this cpu. */
938 pfault_fini();
939 /* Disable interrupt sources via control register. */
940 __ctl_store(cregs, 0, 15);
941 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
942 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
943 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
944 __ctl_load(cregs, 0, 15);
945 clear_cpu_flag(CIF_NOHZ_DELAY);
946 return 0;
947 }
948
__cpu_die(unsigned int cpu)949 void __cpu_die(unsigned int cpu)
950 {
951 struct pcpu *pcpu;
952
953 /* Wait until target cpu is down */
954 pcpu = pcpu_devices + cpu;
955 while (!pcpu_stopped(pcpu))
956 cpu_relax();
957 pcpu_free_lowcore(pcpu);
958 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
959 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
960 }
961
cpu_die(void)962 void __noreturn cpu_die(void)
963 {
964 idle_task_exit();
965 __bpon();
966 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
967 for (;;) ;
968 }
969
smp_fill_possible_mask(void)970 void __init smp_fill_possible_mask(void)
971 {
972 unsigned int possible, sclp_max, cpu;
973
974 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
975 sclp_max = min(smp_max_threads, sclp_max);
976 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
977 possible = setup_possible_cpus ?: nr_cpu_ids;
978 possible = min(possible, sclp_max);
979 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
980 set_cpu_possible(cpu, true);
981 }
982
smp_prepare_cpus(unsigned int max_cpus)983 void __init smp_prepare_cpus(unsigned int max_cpus)
984 {
985 /* request the 0x1201 emergency signal external interrupt */
986 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
987 panic("Couldn't request external interrupt 0x1201");
988 /* request the 0x1202 external call external interrupt */
989 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
990 panic("Couldn't request external interrupt 0x1202");
991 }
992
smp_prepare_boot_cpu(void)993 void __init smp_prepare_boot_cpu(void)
994 {
995 struct pcpu *pcpu = pcpu_devices;
996
997 WARN_ON(!cpu_present(0) || !cpu_online(0));
998 pcpu->state = CPU_STATE_CONFIGURED;
999 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
1000 S390_lowcore.percpu_offset = __per_cpu_offset[0];
1001 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
1002 }
1003
smp_setup_processor_id(void)1004 void __init smp_setup_processor_id(void)
1005 {
1006 pcpu_devices[0].address = stap();
1007 S390_lowcore.cpu_nr = 0;
1008 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1009 S390_lowcore.spinlock_index = 0;
1010 }
1011
1012 /*
1013 * the frequency of the profiling timer can be changed
1014 * by writing a multiplier value into /proc/profile.
1015 *
1016 * usually you want to run this on all CPUs ;)
1017 */
setup_profiling_timer(unsigned int multiplier)1018 int setup_profiling_timer(unsigned int multiplier)
1019 {
1020 return 0;
1021 }
1022
cpu_configure_show(struct device * dev,struct device_attribute * attr,char * buf)1023 static ssize_t cpu_configure_show(struct device *dev,
1024 struct device_attribute *attr, char *buf)
1025 {
1026 ssize_t count;
1027
1028 mutex_lock(&smp_cpu_state_mutex);
1029 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1030 mutex_unlock(&smp_cpu_state_mutex);
1031 return count;
1032 }
1033
cpu_configure_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1034 static ssize_t cpu_configure_store(struct device *dev,
1035 struct device_attribute *attr,
1036 const char *buf, size_t count)
1037 {
1038 struct pcpu *pcpu;
1039 int cpu, val, rc, i;
1040 char delim;
1041
1042 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1043 return -EINVAL;
1044 if (val != 0 && val != 1)
1045 return -EINVAL;
1046 get_online_cpus();
1047 mutex_lock(&smp_cpu_state_mutex);
1048 rc = -EBUSY;
1049 /* disallow configuration changes of online cpus and cpu 0 */
1050 cpu = dev->id;
1051 cpu = smp_get_base_cpu(cpu);
1052 if (cpu == 0)
1053 goto out;
1054 for (i = 0; i <= smp_cpu_mtid; i++)
1055 if (cpu_online(cpu + i))
1056 goto out;
1057 pcpu = pcpu_devices + cpu;
1058 rc = 0;
1059 switch (val) {
1060 case 0:
1061 if (pcpu->state != CPU_STATE_CONFIGURED)
1062 break;
1063 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1064 if (rc)
1065 break;
1066 for (i = 0; i <= smp_cpu_mtid; i++) {
1067 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1068 continue;
1069 pcpu[i].state = CPU_STATE_STANDBY;
1070 smp_cpu_set_polarization(cpu + i,
1071 POLARIZATION_UNKNOWN);
1072 }
1073 topology_expect_change();
1074 break;
1075 case 1:
1076 if (pcpu->state != CPU_STATE_STANDBY)
1077 break;
1078 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1079 if (rc)
1080 break;
1081 for (i = 0; i <= smp_cpu_mtid; i++) {
1082 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1083 continue;
1084 pcpu[i].state = CPU_STATE_CONFIGURED;
1085 smp_cpu_set_polarization(cpu + i,
1086 POLARIZATION_UNKNOWN);
1087 }
1088 topology_expect_change();
1089 break;
1090 default:
1091 break;
1092 }
1093 out:
1094 mutex_unlock(&smp_cpu_state_mutex);
1095 put_online_cpus();
1096 return rc ? rc : count;
1097 }
1098 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1099
show_cpu_address(struct device * dev,struct device_attribute * attr,char * buf)1100 static ssize_t show_cpu_address(struct device *dev,
1101 struct device_attribute *attr, char *buf)
1102 {
1103 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1104 }
1105 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1106
1107 static struct attribute *cpu_common_attrs[] = {
1108 &dev_attr_configure.attr,
1109 &dev_attr_address.attr,
1110 NULL,
1111 };
1112
1113 static struct attribute_group cpu_common_attr_group = {
1114 .attrs = cpu_common_attrs,
1115 };
1116
1117 static struct attribute *cpu_online_attrs[] = {
1118 &dev_attr_idle_count.attr,
1119 &dev_attr_idle_time_us.attr,
1120 NULL,
1121 };
1122
1123 static struct attribute_group cpu_online_attr_group = {
1124 .attrs = cpu_online_attrs,
1125 };
1126
smp_cpu_online(unsigned int cpu)1127 static int smp_cpu_online(unsigned int cpu)
1128 {
1129 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1130
1131 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1132 }
1133
smp_cpu_pre_down(unsigned int cpu)1134 static int smp_cpu_pre_down(unsigned int cpu)
1135 {
1136 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1137
1138 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1139 return 0;
1140 }
1141
smp_add_present_cpu(int cpu)1142 static int smp_add_present_cpu(int cpu)
1143 {
1144 struct device *s;
1145 struct cpu *c;
1146 int rc;
1147
1148 c = kzalloc(sizeof(*c), GFP_KERNEL);
1149 if (!c)
1150 return -ENOMEM;
1151 per_cpu(cpu_device, cpu) = c;
1152 s = &c->dev;
1153 c->hotpluggable = 1;
1154 rc = register_cpu(c, cpu);
1155 if (rc)
1156 goto out;
1157 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1158 if (rc)
1159 goto out_cpu;
1160 rc = topology_cpu_init(c);
1161 if (rc)
1162 goto out_topology;
1163 return 0;
1164
1165 out_topology:
1166 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1167 out_cpu:
1168 unregister_cpu(c);
1169 out:
1170 return rc;
1171 }
1172
smp_rescan_cpus(void)1173 int __ref smp_rescan_cpus(void)
1174 {
1175 struct sclp_core_info *info;
1176 int nr;
1177
1178 info = kzalloc(sizeof(*info), GFP_KERNEL);
1179 if (!info)
1180 return -ENOMEM;
1181 smp_get_core_info(info, 0);
1182 get_online_cpus();
1183 mutex_lock(&smp_cpu_state_mutex);
1184 nr = __smp_rescan_cpus(info, false);
1185 mutex_unlock(&smp_cpu_state_mutex);
1186 put_online_cpus();
1187 kfree(info);
1188 if (nr)
1189 topology_schedule_update();
1190 return 0;
1191 }
1192
rescan_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1193 static ssize_t __ref rescan_store(struct device *dev,
1194 struct device_attribute *attr,
1195 const char *buf,
1196 size_t count)
1197 {
1198 int rc;
1199
1200 rc = lock_device_hotplug_sysfs();
1201 if (rc)
1202 return rc;
1203 rc = smp_rescan_cpus();
1204 unlock_device_hotplug();
1205 return rc ? rc : count;
1206 }
1207 static DEVICE_ATTR_WO(rescan);
1208
s390_smp_init(void)1209 static int __init s390_smp_init(void)
1210 {
1211 int cpu, rc = 0;
1212
1213 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1214 if (rc)
1215 return rc;
1216 for_each_present_cpu(cpu) {
1217 rc = smp_add_present_cpu(cpu);
1218 if (rc)
1219 goto out;
1220 }
1221
1222 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1223 smp_cpu_online, smp_cpu_pre_down);
1224 rc = rc <= 0 ? rc : 0;
1225 out:
1226 return rc;
1227 }
1228 subsys_initcall(s390_smp_init);
1229