1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Cadence USBSS DRD Driver.
4 *
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2019 Texas Instruments
7 *
8 * Author: Pawel Laszczak <pawell@cadence.com>
9 * Roger Quadros <rogerq@ti.com>
10 *
11 *
12 */
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/delay.h>
16 #include <linux/iopoll.h>
17 #include <linux/usb/otg.h>
18 #include <linux/phy/phy.h>
19
20 #include "gadget.h"
21 #include "drd.h"
22 #include "core.h"
23
24 /**
25 * cdns3_set_mode - change mode of OTG Core
26 * @cdns: pointer to context structure
27 * @mode: selected mode from cdns_role
28 *
29 * Returns 0 on success otherwise negative errno
30 */
cdns3_set_mode(struct cdns3 * cdns,enum usb_dr_mode mode)31 int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode)
32 {
33 u32 reg;
34
35 switch (mode) {
36 case USB_DR_MODE_PERIPHERAL:
37 break;
38 case USB_DR_MODE_HOST:
39 break;
40 case USB_DR_MODE_OTG:
41 dev_dbg(cdns->dev, "Set controller to OTG mode\n");
42 if (cdns->version == CDNS3_CONTROLLER_V1) {
43 reg = readl(&cdns->otg_v1_regs->override);
44 reg |= OVERRIDE_IDPULLUP;
45 writel(reg, &cdns->otg_v1_regs->override);
46
47 /*
48 * Enable work around feature built into the
49 * controller to address issue with RX Sensitivity
50 * est (EL_17) for USB2 PHY. The issue only occures
51 * for 0x0002450D controller version.
52 */
53 if (cdns->phyrst_a_enable) {
54 reg = readl(&cdns->otg_v1_regs->phyrst_cfg);
55 reg |= PHYRST_CFG_PHYRST_A_ENABLE;
56 writel(reg, &cdns->otg_v1_regs->phyrst_cfg);
57 }
58 } else {
59 reg = readl(&cdns->otg_v0_regs->ctrl1);
60 reg |= OVERRIDE_IDPULLUP_V0;
61 writel(reg, &cdns->otg_v0_regs->ctrl1);
62 }
63
64 /*
65 * Hardware specification says: "ID_VALUE must be valid within
66 * 50ms after idpullup is set to '1" so driver must wait
67 * 50ms before reading this pin.
68 */
69 usleep_range(50000, 60000);
70 break;
71 default:
72 dev_err(cdns->dev, "Unsupported mode of operation %d\n", mode);
73 return -EINVAL;
74 }
75
76 return 0;
77 }
78
cdns3_get_id(struct cdns3 * cdns)79 int cdns3_get_id(struct cdns3 *cdns)
80 {
81 int id;
82
83 id = readl(&cdns->otg_regs->sts) & OTGSTS_ID_VALUE;
84 dev_dbg(cdns->dev, "OTG ID: %d", id);
85
86 return id;
87 }
88
cdns3_get_vbus(struct cdns3 * cdns)89 int cdns3_get_vbus(struct cdns3 *cdns)
90 {
91 int vbus;
92
93 vbus = !!(readl(&cdns->otg_regs->sts) & OTGSTS_VBUS_VALID);
94 dev_dbg(cdns->dev, "OTG VBUS: %d", vbus);
95
96 return vbus;
97 }
98
cdns3_is_host(struct cdns3 * cdns)99 bool cdns3_is_host(struct cdns3 *cdns)
100 {
101 if (cdns->dr_mode == USB_DR_MODE_HOST)
102 return true;
103 else if (cdns3_get_id(cdns) == CDNS3_ID_HOST)
104 return true;
105
106 return false;
107 }
108
cdns3_is_device(struct cdns3 * cdns)109 bool cdns3_is_device(struct cdns3 *cdns)
110 {
111 if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
112 return true;
113 else if (cdns->dr_mode == USB_DR_MODE_OTG)
114 if (cdns3_get_id(cdns) == CDNS3_ID_PERIPHERAL)
115 return true;
116
117 return false;
118 }
119
120 /**
121 * cdns3_otg_disable_irq - Disable all OTG interrupts
122 * @cdns: Pointer to controller context structure
123 */
cdns3_otg_disable_irq(struct cdns3 * cdns)124 static void cdns3_otg_disable_irq(struct cdns3 *cdns)
125 {
126 writel(0, &cdns->otg_regs->ien);
127 }
128
129 /**
130 * cdns3_otg_enable_irq - enable id and sess_valid interrupts
131 * @cdns: Pointer to controller context structure
132 */
cdns3_otg_enable_irq(struct cdns3 * cdns)133 static void cdns3_otg_enable_irq(struct cdns3 *cdns)
134 {
135 writel(OTGIEN_ID_CHANGE_INT | OTGIEN_VBUSVALID_RISE_INT |
136 OTGIEN_VBUSVALID_FALL_INT, &cdns->otg_regs->ien);
137 }
138
139 /**
140 * cdns3_drd_host_on - start host.
141 * @cdns: Pointer to controller context structure.
142 *
143 * Returns 0 on success otherwise negative errno.
144 */
cdns3_drd_host_on(struct cdns3 * cdns)145 int cdns3_drd_host_on(struct cdns3 *cdns)
146 {
147 u32 val;
148 int ret;
149
150 /* Enable host mode. */
151 writel(OTGCMD_HOST_BUS_REQ | OTGCMD_OTG_DIS,
152 &cdns->otg_regs->cmd);
153
154 dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n");
155 ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
156 val & OTGSTS_XHCI_READY, 1, 100000);
157
158 if (ret)
159 dev_err(cdns->dev, "timeout waiting for xhci_ready\n");
160
161 phy_set_mode(cdns->usb3_phy, PHY_MODE_USB_HOST);
162 return ret;
163 }
164
165 /**
166 * cdns3_drd_host_off - stop host.
167 * @cdns: Pointer to controller context structure.
168 */
cdns3_drd_host_off(struct cdns3 * cdns)169 void cdns3_drd_host_off(struct cdns3 *cdns)
170 {
171 u32 val;
172
173 writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
174 OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
175 &cdns->otg_regs->cmd);
176
177 /* Waiting till H_IDLE state.*/
178 readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
179 !(val & OTGSTATE_HOST_STATE_MASK),
180 1, 2000000);
181 phy_set_mode(cdns->usb3_phy, PHY_MODE_INVALID);
182 }
183
184 /**
185 * cdns3_drd_gadget_on - start gadget.
186 * @cdns: Pointer to controller context structure.
187 *
188 * Returns 0 on success otherwise negative errno
189 */
cdns3_drd_gadget_on(struct cdns3 * cdns)190 int cdns3_drd_gadget_on(struct cdns3 *cdns)
191 {
192 int ret, val;
193 u32 reg = OTGCMD_OTG_DIS;
194
195 /* switch OTG core */
196 writel(OTGCMD_DEV_BUS_REQ | reg, &cdns->otg_regs->cmd);
197
198 dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n");
199
200 ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
201 val & OTGSTS_DEV_READY,
202 1, 100000);
203 if (ret) {
204 dev_err(cdns->dev, "timeout waiting for dev_ready\n");
205 return ret;
206 }
207
208 phy_set_mode(cdns->usb3_phy, PHY_MODE_USB_DEVICE);
209 return 0;
210 }
211
212 /**
213 * cdns3_drd_gadget_off - stop gadget.
214 * @cdns: Pointer to controller context structure.
215 */
cdns3_drd_gadget_off(struct cdns3 * cdns)216 void cdns3_drd_gadget_off(struct cdns3 *cdns)
217 {
218 u32 val;
219
220 /*
221 * Driver should wait at least 10us after disabling Device
222 * before turning-off Device (DEV_BUS_DROP).
223 */
224 usleep_range(20, 30);
225 writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
226 OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
227 &cdns->otg_regs->cmd);
228 /* Waiting till DEV_IDLE state.*/
229 readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
230 !(val & OTGSTATE_DEV_STATE_MASK),
231 1, 2000000);
232 phy_set_mode(cdns->usb3_phy, PHY_MODE_INVALID);
233 }
234
235 /**
236 * cdns3_init_otg_mode - initialize drd controller
237 * @cdns: Pointer to controller context structure
238 *
239 * Returns 0 on success otherwise negative errno
240 */
cdns3_init_otg_mode(struct cdns3 * cdns)241 static int cdns3_init_otg_mode(struct cdns3 *cdns)
242 {
243 int ret;
244
245 cdns3_otg_disable_irq(cdns);
246 /* clear all interrupts */
247 writel(~0, &cdns->otg_regs->ivect);
248
249 ret = cdns3_set_mode(cdns, USB_DR_MODE_OTG);
250 if (ret)
251 return ret;
252
253 cdns3_otg_enable_irq(cdns);
254
255 return 0;
256 }
257
258 /**
259 * cdns3_drd_update_mode - initialize mode of operation
260 * @cdns: Pointer to controller context structure
261 *
262 * Returns 0 on success otherwise negative errno
263 */
cdns3_drd_update_mode(struct cdns3 * cdns)264 int cdns3_drd_update_mode(struct cdns3 *cdns)
265 {
266 int ret;
267
268 switch (cdns->dr_mode) {
269 case USB_DR_MODE_PERIPHERAL:
270 ret = cdns3_set_mode(cdns, USB_DR_MODE_PERIPHERAL);
271 break;
272 case USB_DR_MODE_HOST:
273 ret = cdns3_set_mode(cdns, USB_DR_MODE_HOST);
274 break;
275 case USB_DR_MODE_OTG:
276 ret = cdns3_init_otg_mode(cdns);
277 break;
278 default:
279 dev_err(cdns->dev, "Unsupported mode of operation %d\n",
280 cdns->dr_mode);
281 return -EINVAL;
282 }
283
284 return ret;
285 }
286
cdns3_drd_thread_irq(int irq,void * data)287 static irqreturn_t cdns3_drd_thread_irq(int irq, void *data)
288 {
289 struct cdns3 *cdns = data;
290
291 cdns3_hw_role_switch(cdns);
292
293 return IRQ_HANDLED;
294 }
295
296 /**
297 * cdns3_drd_irq - interrupt handler for OTG events
298 *
299 * @irq: irq number for cdns3 core device
300 * @data: structure of cdns3
301 *
302 * Returns IRQ_HANDLED or IRQ_NONE
303 */
cdns3_drd_irq(int irq,void * data)304 static irqreturn_t cdns3_drd_irq(int irq, void *data)
305 {
306 irqreturn_t ret = IRQ_NONE;
307 struct cdns3 *cdns = data;
308 u32 reg;
309
310 if (cdns->dr_mode != USB_DR_MODE_OTG)
311 return IRQ_NONE;
312
313 if (cdns->in_lpm)
314 return ret;
315
316 reg = readl(&cdns->otg_regs->ivect);
317
318 if (!reg)
319 return IRQ_NONE;
320
321 if (reg & OTGIEN_ID_CHANGE_INT) {
322 dev_dbg(cdns->dev, "OTG IRQ: new ID: %d\n",
323 cdns3_get_id(cdns));
324
325 ret = IRQ_WAKE_THREAD;
326 }
327
328 if (reg & (OTGIEN_VBUSVALID_RISE_INT | OTGIEN_VBUSVALID_FALL_INT)) {
329 dev_dbg(cdns->dev, "OTG IRQ: new VBUS: %d\n",
330 cdns3_get_vbus(cdns));
331
332 ret = IRQ_WAKE_THREAD;
333 }
334
335 writel(~0, &cdns->otg_regs->ivect);
336 return ret;
337 }
338
cdns3_drd_init(struct cdns3 * cdns)339 int cdns3_drd_init(struct cdns3 *cdns)
340 {
341 void __iomem *regs;
342 u32 state;
343 int ret;
344
345 regs = devm_ioremap_resource(cdns->dev, &cdns->otg_res);
346 if (IS_ERR(regs))
347 return PTR_ERR(regs);
348
349 /* Detection of DRD version. Controller has been released
350 * in two versions. Both are similar, but they have same changes
351 * in register maps.
352 * The first register in old version is command register and it's read
353 * only, so driver should read 0 from it. On the other hand, in v1
354 * the first register contains device ID number which is not set to 0.
355 * Driver uses this fact to detect the proper version of
356 * controller.
357 */
358 cdns->otg_v0_regs = regs;
359 if (!readl(&cdns->otg_v0_regs->cmd)) {
360 cdns->version = CDNS3_CONTROLLER_V0;
361 cdns->otg_v1_regs = NULL;
362 cdns->otg_regs = regs;
363 writel(1, &cdns->otg_v0_regs->simulate);
364 dev_dbg(cdns->dev, "DRD version v0 (%08x)\n",
365 readl(&cdns->otg_v0_regs->version));
366 } else {
367 cdns->otg_v0_regs = NULL;
368 cdns->otg_v1_regs = regs;
369 cdns->otg_regs = (void *)&cdns->otg_v1_regs->cmd;
370 cdns->version = CDNS3_CONTROLLER_V1;
371 writel(1, &cdns->otg_v1_regs->simulate);
372 dev_dbg(cdns->dev, "DRD version v1 (ID: %08x, rev: %08x)\n",
373 readl(&cdns->otg_v1_regs->did),
374 readl(&cdns->otg_v1_regs->rid));
375 }
376
377 state = OTGSTS_STRAP(readl(&cdns->otg_regs->sts));
378
379 /* Update dr_mode according to STRAP configuration. */
380 cdns->dr_mode = USB_DR_MODE_OTG;
381 if (state == OTGSTS_STRAP_HOST) {
382 dev_dbg(cdns->dev, "Controller strapped to HOST\n");
383 cdns->dr_mode = USB_DR_MODE_HOST;
384 } else if (state == OTGSTS_STRAP_GADGET) {
385 dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n");
386 cdns->dr_mode = USB_DR_MODE_PERIPHERAL;
387 }
388
389 ret = devm_request_threaded_irq(cdns->dev, cdns->otg_irq,
390 cdns3_drd_irq,
391 cdns3_drd_thread_irq,
392 IRQF_SHARED,
393 dev_name(cdns->dev), cdns);
394 if (ret) {
395 dev_err(cdns->dev, "couldn't get otg_irq\n");
396 return ret;
397 }
398
399 state = readl(&cdns->otg_regs->sts);
400 if (OTGSTS_OTG_NRDY(state)) {
401 dev_err(cdns->dev, "Cadence USB3 OTG device not ready\n");
402 return -ENODEV;
403 }
404
405 return 0;
406 }
407
cdns3_drd_exit(struct cdns3 * cdns)408 int cdns3_drd_exit(struct cdns3 *cdns)
409 {
410 cdns3_otg_disable_irq(cdns);
411 return 0;
412 }
413