1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "zpci"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/compat.h>
13 #include <linux/kernel.h>
14 #include <linux/miscdevice.h>
15 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/pci.h>
19 #include <linux/uaccess.h>
20 #include <asm/pci_debug.h>
21 #include <asm/pci_clp.h>
22 #include <asm/clp.h>
23 #include <uapi/asm/clp.h>
24
25 bool zpci_unique_uid;
26
update_uid_checking(bool new)27 void update_uid_checking(bool new)
28 {
29 if (zpci_unique_uid != new)
30 zpci_dbg(1, "uid checking:%d\n", new);
31
32 zpci_unique_uid = new;
33 }
34
zpci_err_clp(unsigned int rsp,int rc)35 static inline void zpci_err_clp(unsigned int rsp, int rc)
36 {
37 struct {
38 unsigned int rsp;
39 int rc;
40 } __packed data = {rsp, rc};
41
42 zpci_err_hex(&data, sizeof(data));
43 }
44
45 /*
46 * Call Logical Processor with c=1, lps=0 and command 1
47 * to get the bit mask of installed logical processors
48 */
clp_get_ilp(unsigned long * ilp)49 static inline int clp_get_ilp(unsigned long *ilp)
50 {
51 unsigned long mask;
52 int cc = 3;
53
54 asm volatile (
55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
56 "0: ipm %[cc]\n"
57 " srl %[cc],28\n"
58 "1:\n"
59 EX_TABLE(0b, 1b)
60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
61 : "cc");
62 *ilp = mask;
63 return cc;
64 }
65
66 /*
67 * Call Logical Processor with c=0, the give constant lps and an lpcb request.
68 */
clp_req(void * data,unsigned int lps)69 static __always_inline int clp_req(void *data, unsigned int lps)
70 {
71 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
72 u64 ignored;
73 int cc = 3;
74
75 asm volatile (
76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
77 "0: ipm %[cc]\n"
78 " srl %[cc],28\n"
79 "1:\n"
80 EX_TABLE(0b, 1b)
81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
82 : [req] "a" (req), [lps] "i" (lps)
83 : "cc");
84 return cc;
85 }
86
clp_alloc_block(gfp_t gfp_mask)87 static void *clp_alloc_block(gfp_t gfp_mask)
88 {
89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
90 }
91
clp_free_block(void * ptr)92 static void clp_free_block(void *ptr)
93 {
94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
95 }
96
clp_store_query_pci_fngrp(struct zpci_dev * zdev,struct clp_rsp_query_pci_grp * response)97 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
98 struct clp_rsp_query_pci_grp *response)
99 {
100 zdev->tlb_refresh = response->refresh;
101 zdev->dma_mask = response->dasm;
102 zdev->msi_addr = response->msia;
103 zdev->max_msi = response->noi;
104 zdev->fmb_update = response->mui;
105 zdev->version = response->version;
106
107 switch (response->version) {
108 case 1:
109 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
110 break;
111 default:
112 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
113 break;
114 }
115 }
116
clp_query_pci_fngrp(struct zpci_dev * zdev,u8 pfgid)117 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
118 {
119 struct clp_req_rsp_query_pci_grp *rrb;
120 int rc;
121
122 rrb = clp_alloc_block(GFP_KERNEL);
123 if (!rrb)
124 return -ENOMEM;
125
126 memset(rrb, 0, sizeof(*rrb));
127 rrb->request.hdr.len = sizeof(rrb->request);
128 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
129 rrb->response.hdr.len = sizeof(rrb->response);
130 rrb->request.pfgid = pfgid;
131
132 rc = clp_req(rrb, CLP_LPS_PCI);
133 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
134 clp_store_query_pci_fngrp(zdev, &rrb->response);
135 else {
136 zpci_err("Q PCI FGRP:\n");
137 zpci_err_clp(rrb->response.hdr.rsp, rc);
138 rc = -EIO;
139 }
140 clp_free_block(rrb);
141 return rc;
142 }
143
clp_store_query_pci_fn(struct zpci_dev * zdev,struct clp_rsp_query_pci * response)144 static int clp_store_query_pci_fn(struct zpci_dev *zdev,
145 struct clp_rsp_query_pci *response)
146 {
147 int i;
148
149 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
150 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
151 zdev->bars[i].size = response->bar_size[i];
152 }
153 zdev->start_dma = response->sdma;
154 zdev->end_dma = response->edma;
155 zdev->pchid = response->pchid;
156 zdev->pfgid = response->pfgid;
157 zdev->pft = response->pft;
158 zdev->vfn = response->vfn;
159 zdev->port = response->port;
160 zdev->uid = response->uid;
161 zdev->fmb_length = sizeof(u32) * response->fmb_len;
162 zdev->rid_available = response->rid_avail;
163 zdev->is_physfn = response->is_physfn;
164 if (!s390_pci_no_rid && zdev->rid_available)
165 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
166
167 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
168 if (response->util_str_avail) {
169 memcpy(zdev->util_str, response->util_str,
170 sizeof(zdev->util_str));
171 zdev->util_str_avail = 1;
172 }
173 zdev->mio_capable = response->mio_addr_avail;
174 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
175 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
176 continue;
177
178 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
179 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
180 }
181 return 0;
182 }
183
clp_query_pci_fn(struct zpci_dev * zdev)184 int clp_query_pci_fn(struct zpci_dev *zdev)
185 {
186 struct clp_req_rsp_query_pci *rrb;
187 int rc;
188
189 rrb = clp_alloc_block(GFP_KERNEL);
190 if (!rrb)
191 return -ENOMEM;
192
193 memset(rrb, 0, sizeof(*rrb));
194 rrb->request.hdr.len = sizeof(rrb->request);
195 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
196 rrb->response.hdr.len = sizeof(rrb->response);
197 rrb->request.fh = zdev->fh;
198
199 rc = clp_req(rrb, CLP_LPS_PCI);
200 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
201 rc = clp_store_query_pci_fn(zdev, &rrb->response);
202 if (rc)
203 goto out;
204 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
205 } else {
206 zpci_err("Q PCI FN:\n");
207 zpci_err_clp(rrb->response.hdr.rsp, rc);
208 rc = -EIO;
209 }
210 out:
211 clp_free_block(rrb);
212 return rc;
213 }
214
215 static int clp_refresh_fh(u32 fid);
216 /**
217 * clp_set_pci_fn() - Execute a command on a PCI function
218 * @zdev: Function that will be affected
219 * @nr_dma_as: DMA address space number
220 * @command: The command code to execute
221 *
222 * Returns: 0 on success, < 0 for Linux errors (e.g. -ENOMEM), and
223 * > 0 for non-success platform responses
224 */
clp_set_pci_fn(struct zpci_dev * zdev,u8 nr_dma_as,u8 command)225 static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command)
226 {
227 struct clp_req_rsp_set_pci *rrb;
228 int rc, retries = 100;
229
230 rrb = clp_alloc_block(GFP_KERNEL);
231 if (!rrb)
232 return -ENOMEM;
233
234 do {
235 memset(rrb, 0, sizeof(*rrb));
236 rrb->request.hdr.len = sizeof(rrb->request);
237 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
238 rrb->response.hdr.len = sizeof(rrb->response);
239 rrb->request.fh = zdev->fh;
240 rrb->request.oc = command;
241 rrb->request.ndas = nr_dma_as;
242
243 rc = clp_req(rrb, CLP_LPS_PCI);
244 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
245 retries--;
246 if (retries < 0)
247 break;
248 msleep(20);
249 }
250 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
251
252 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
253 zdev->fh = rrb->response.fh;
254 } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY) {
255 /* Function is already in desired state - update handle */
256 rc = clp_refresh_fh(zdev->fid);
257 } else {
258 zpci_err("Set PCI FN:\n");
259 zpci_err_clp(rrb->response.hdr.rsp, rc);
260 if (!rc)
261 rc = rrb->response.hdr.rsp;
262 }
263 clp_free_block(rrb);
264 return rc;
265 }
266
clp_setup_writeback_mio(void)267 int clp_setup_writeback_mio(void)
268 {
269 struct clp_req_rsp_slpc_pci *rrb;
270 u8 wb_bit_pos;
271 int rc;
272
273 rrb = clp_alloc_block(GFP_KERNEL);
274 if (!rrb)
275 return -ENOMEM;
276
277 memset(rrb, 0, sizeof(*rrb));
278 rrb->request.hdr.len = sizeof(rrb->request);
279 rrb->request.hdr.cmd = CLP_SLPC;
280 rrb->response.hdr.len = sizeof(rrb->response);
281
282 rc = clp_req(rrb, CLP_LPS_PCI);
283 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
284 if (rrb->response.vwb) {
285 wb_bit_pos = rrb->response.mio_wb;
286 set_bit_inv(wb_bit_pos, &mio_wb_bit_mask);
287 zpci_dbg(3, "wb bit: %d\n", wb_bit_pos);
288 } else {
289 zpci_dbg(3, "wb bit: n.a.\n");
290 }
291
292 } else {
293 zpci_err("SLPC PCI:\n");
294 zpci_err_clp(rrb->response.hdr.rsp, rc);
295 rc = -EIO;
296 }
297 clp_free_block(rrb);
298 return rc;
299 }
300
clp_enable_fh(struct zpci_dev * zdev,u8 nr_dma_as)301 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
302 {
303 int rc;
304
305 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
306 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
307 if (!rc && zpci_use_mio(zdev)) {
308 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_MIO);
309 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n",
310 zdev->fid, zdev->fh, rc);
311 if (rc)
312 clp_disable_fh(zdev);
313 }
314 return rc;
315 }
316
clp_disable_fh(struct zpci_dev * zdev)317 int clp_disable_fh(struct zpci_dev *zdev)
318 {
319 int rc;
320
321 if (!zdev_enabled(zdev))
322 return 0;
323
324 rc = clp_set_pci_fn(zdev, 0, CLP_SET_DISABLE_PCI_FN);
325 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
326 return rc;
327 }
328
clp_list_pci(struct clp_req_rsp_list_pci * rrb,void * data,void (* cb)(struct clp_fh_list_entry *,void *))329 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
330 void (*cb)(struct clp_fh_list_entry *, void *))
331 {
332 u64 resume_token = 0;
333 int entries, i, rc;
334
335 do {
336 memset(rrb, 0, sizeof(*rrb));
337 rrb->request.hdr.len = sizeof(rrb->request);
338 rrb->request.hdr.cmd = CLP_LIST_PCI;
339 /* store as many entries as possible */
340 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
341 rrb->request.resume_token = resume_token;
342
343 /* Get PCI function handle list */
344 rc = clp_req(rrb, CLP_LPS_PCI);
345 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
346 zpci_err("List PCI FN:\n");
347 zpci_err_clp(rrb->response.hdr.rsp, rc);
348 rc = -EIO;
349 goto out;
350 }
351
352 update_uid_checking(rrb->response.uid_checking);
353 WARN_ON_ONCE(rrb->response.entry_size !=
354 sizeof(struct clp_fh_list_entry));
355
356 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
357 rrb->response.entry_size;
358
359 resume_token = rrb->response.resume_token;
360 for (i = 0; i < entries; i++)
361 cb(&rrb->response.fh_list[i], data);
362 } while (resume_token);
363 out:
364 return rc;
365 }
366
__clp_add(struct clp_fh_list_entry * entry,void * data)367 static void __clp_add(struct clp_fh_list_entry *entry, void *data)
368 {
369 struct zpci_dev *zdev;
370
371 if (!entry->vendor_id)
372 return;
373
374 zdev = get_zdev_by_fid(entry->fid);
375 if (!zdev)
376 zpci_create_device(entry->fid, entry->fh, entry->config_state);
377 }
378
clp_scan_pci_devices(void)379 int clp_scan_pci_devices(void)
380 {
381 struct clp_req_rsp_list_pci *rrb;
382 int rc;
383
384 rrb = clp_alloc_block(GFP_KERNEL);
385 if (!rrb)
386 return -ENOMEM;
387
388 rc = clp_list_pci(rrb, NULL, __clp_add);
389
390 clp_free_block(rrb);
391 return rc;
392 }
393
__clp_refresh_fh(struct clp_fh_list_entry * entry,void * data)394 static void __clp_refresh_fh(struct clp_fh_list_entry *entry, void *data)
395 {
396 struct zpci_dev *zdev;
397 u32 fid = *((u32 *)data);
398
399 if (!entry->vendor_id || fid != entry->fid)
400 return;
401
402 zdev = get_zdev_by_fid(fid);
403 if (!zdev)
404 return;
405
406 zdev->fh = entry->fh;
407 }
408
409 /*
410 * Refresh the function handle of the function matching @fid
411 */
clp_refresh_fh(u32 fid)412 static int clp_refresh_fh(u32 fid)
413 {
414 struct clp_req_rsp_list_pci *rrb;
415 int rc;
416
417 rrb = clp_alloc_block(GFP_NOWAIT);
418 if (!rrb)
419 return -ENOMEM;
420
421 rc = clp_list_pci(rrb, &fid, __clp_refresh_fh);
422
423 clp_free_block(rrb);
424 return rc;
425 }
426
427 struct clp_state_data {
428 u32 fid;
429 enum zpci_state state;
430 };
431
__clp_get_state(struct clp_fh_list_entry * entry,void * data)432 static void __clp_get_state(struct clp_fh_list_entry *entry, void *data)
433 {
434 struct clp_state_data *sd = data;
435
436 if (entry->fid != sd->fid)
437 return;
438
439 sd->state = entry->config_state;
440 }
441
clp_get_state(u32 fid,enum zpci_state * state)442 int clp_get_state(u32 fid, enum zpci_state *state)
443 {
444 struct clp_req_rsp_list_pci *rrb;
445 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED};
446 int rc;
447
448 rrb = clp_alloc_block(GFP_ATOMIC);
449 if (!rrb)
450 return -ENOMEM;
451
452 rc = clp_list_pci(rrb, &sd, __clp_get_state);
453 if (!rc)
454 *state = sd.state;
455
456 clp_free_block(rrb);
457 return rc;
458 }
459
clp_base_slpc(struct clp_req * req,struct clp_req_rsp_slpc * lpcb)460 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
461 {
462 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
463
464 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
465 lpcb->response.hdr.len > limit)
466 return -EINVAL;
467 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
468 }
469
clp_base_command(struct clp_req * req,struct clp_req_hdr * lpcb)470 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
471 {
472 switch (lpcb->cmd) {
473 case 0x0001: /* store logical-processor characteristics */
474 return clp_base_slpc(req, (void *) lpcb);
475 default:
476 return -EINVAL;
477 }
478 }
479
clp_pci_slpc(struct clp_req * req,struct clp_req_rsp_slpc_pci * lpcb)480 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc_pci *lpcb)
481 {
482 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
483
484 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
485 lpcb->response.hdr.len > limit)
486 return -EINVAL;
487 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
488 }
489
clp_pci_list(struct clp_req * req,struct clp_req_rsp_list_pci * lpcb)490 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
491 {
492 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
493
494 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
495 lpcb->response.hdr.len > limit)
496 return -EINVAL;
497 if (lpcb->request.reserved2 != 0)
498 return -EINVAL;
499 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
500 }
501
clp_pci_query(struct clp_req * req,struct clp_req_rsp_query_pci * lpcb)502 static int clp_pci_query(struct clp_req *req,
503 struct clp_req_rsp_query_pci *lpcb)
504 {
505 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
506
507 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
508 lpcb->response.hdr.len > limit)
509 return -EINVAL;
510 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
511 return -EINVAL;
512 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
513 }
514
clp_pci_query_grp(struct clp_req * req,struct clp_req_rsp_query_pci_grp * lpcb)515 static int clp_pci_query_grp(struct clp_req *req,
516 struct clp_req_rsp_query_pci_grp *lpcb)
517 {
518 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
519
520 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
521 lpcb->response.hdr.len > limit)
522 return -EINVAL;
523 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
524 lpcb->request.reserved4 != 0)
525 return -EINVAL;
526 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
527 }
528
clp_pci_command(struct clp_req * req,struct clp_req_hdr * lpcb)529 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
530 {
531 switch (lpcb->cmd) {
532 case 0x0001: /* store logical-processor characteristics */
533 return clp_pci_slpc(req, (void *) lpcb);
534 case 0x0002: /* list PCI functions */
535 return clp_pci_list(req, (void *) lpcb);
536 case 0x0003: /* query PCI function */
537 return clp_pci_query(req, (void *) lpcb);
538 case 0x0004: /* query PCI function group */
539 return clp_pci_query_grp(req, (void *) lpcb);
540 default:
541 return -EINVAL;
542 }
543 }
544
clp_normal_command(struct clp_req * req)545 static int clp_normal_command(struct clp_req *req)
546 {
547 struct clp_req_hdr *lpcb;
548 void __user *uptr;
549 int rc;
550
551 rc = -EINVAL;
552 if (req->lps != 0 && req->lps != 2)
553 goto out;
554
555 rc = -ENOMEM;
556 lpcb = clp_alloc_block(GFP_KERNEL);
557 if (!lpcb)
558 goto out;
559
560 rc = -EFAULT;
561 uptr = (void __force __user *)(unsigned long) req->data_p;
562 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
563 goto out_free;
564
565 rc = -EINVAL;
566 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
567 goto out_free;
568
569 switch (req->lps) {
570 case 0:
571 rc = clp_base_command(req, lpcb);
572 break;
573 case 2:
574 rc = clp_pci_command(req, lpcb);
575 break;
576 }
577 if (rc)
578 goto out_free;
579
580 rc = -EFAULT;
581 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
582 goto out_free;
583
584 rc = 0;
585
586 out_free:
587 clp_free_block(lpcb);
588 out:
589 return rc;
590 }
591
clp_immediate_command(struct clp_req * req)592 static int clp_immediate_command(struct clp_req *req)
593 {
594 void __user *uptr;
595 unsigned long ilp;
596 int exists;
597
598 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
599 return -EINVAL;
600
601 uptr = (void __force __user *)(unsigned long) req->data_p;
602 if (req->cmd == 0) {
603 /* Command code 0: test for a specific processor */
604 exists = test_bit_inv(req->lps, &ilp);
605 return put_user(exists, (int __user *) uptr);
606 }
607 /* Command code 1: return bit mask of installed processors */
608 return put_user(ilp, (unsigned long __user *) uptr);
609 }
610
clp_misc_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)611 static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
612 unsigned long arg)
613 {
614 struct clp_req req;
615 void __user *argp;
616
617 if (cmd != CLP_SYNC)
618 return -EINVAL;
619
620 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
621 if (copy_from_user(&req, argp, sizeof(req)))
622 return -EFAULT;
623 if (req.r != 0)
624 return -EINVAL;
625 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
626 }
627
clp_misc_release(struct inode * inode,struct file * filp)628 static int clp_misc_release(struct inode *inode, struct file *filp)
629 {
630 return 0;
631 }
632
633 static const struct file_operations clp_misc_fops = {
634 .owner = THIS_MODULE,
635 .open = nonseekable_open,
636 .release = clp_misc_release,
637 .unlocked_ioctl = clp_misc_ioctl,
638 .compat_ioctl = clp_misc_ioctl,
639 .llseek = no_llseek,
640 };
641
642 static struct miscdevice clp_misc_device = {
643 .minor = MISC_DYNAMIC_MINOR,
644 .name = "clp",
645 .fops = &clp_misc_fops,
646 };
647
clp_misc_init(void)648 static int __init clp_misc_init(void)
649 {
650 return misc_register(&clp_misc_device);
651 }
652
653 device_initcall(clp_misc_init);
654