1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Huawei HiNIC PCI Express Linux driver 4 * Copyright(c) 2017 Huawei Technologies Co., Ltd 5 */ 6 7 #ifndef HINIC_HW_QP_H 8 #define HINIC_HW_QP_H 9 10 #include <linux/kernel.h> 11 #include <linux/types.h> 12 #include <linux/sizes.h> 13 #include <linux/pci.h> 14 #include <linux/skbuff.h> 15 16 #include "hinic_common.h" 17 #include "hinic_hw_if.h" 18 #include "hinic_hw_wqe.h" 19 #include "hinic_hw_wq.h" 20 #include "hinic_hw_qp_ctxt.h" 21 22 #define HINIC_SQ_DB_INFO_PI_HI_SHIFT 0 23 #define HINIC_SQ_DB_INFO_QID_SHIFT 8 24 #define HINIC_SQ_DB_INFO_PATH_SHIFT 23 25 #define HINIC_SQ_DB_INFO_COS_SHIFT 24 26 #define HINIC_SQ_DB_INFO_TYPE_SHIFT 27 27 28 #define HINIC_SQ_DB_INFO_PI_HI_MASK 0xFF 29 #define HINIC_SQ_DB_INFO_QID_MASK 0x3FF 30 #define HINIC_SQ_DB_INFO_PATH_MASK 0x1 31 #define HINIC_SQ_DB_INFO_COS_MASK 0x7 32 #define HINIC_SQ_DB_INFO_TYPE_MASK 0x1F 33 34 #define HINIC_SQ_DB_INFO_SET(val, member) \ 35 (((u32)(val) & HINIC_SQ_DB_INFO_##member##_MASK) \ 36 << HINIC_SQ_DB_INFO_##member##_SHIFT) 37 38 #define HINIC_SQ_WQEBB_SIZE 64 39 #define HINIC_RQ_WQEBB_SIZE 32 40 41 #define HINIC_SQ_PAGE_SIZE SZ_256K 42 #define HINIC_RQ_PAGE_SIZE SZ_256K 43 44 #define HINIC_SQ_DEPTH SZ_4K 45 #define HINIC_RQ_DEPTH SZ_4K 46 47 #define HINIC_MAX_QUEUE_DEPTH SZ_4K 48 #define HINIC_MIN_QUEUE_DEPTH 128 49 50 /* In any change to HINIC_RX_BUF_SZ, HINIC_RX_BUF_SZ_IDX must be changed */ 51 #define HINIC_RX_BUF_SZ 2048 52 #define HINIC_RX_BUF_SZ_IDX HINIC_RX_BUF_SZ_2048_IDX 53 54 #define HINIC_MIN_TX_WQE_SIZE(wq) \ 55 ALIGN(HINIC_SQ_WQE_SIZE(1), (wq)->wqebb_size) 56 57 #define HINIC_MIN_TX_NUM_WQEBBS(sq) \ 58 (HINIC_MIN_TX_WQE_SIZE((sq)->wq) / (sq)->wq->wqebb_size) 59 60 enum hinic_rx_buf_sz_idx { 61 HINIC_RX_BUF_SZ_32_IDX, 62 HINIC_RX_BUF_SZ_64_IDX, 63 HINIC_RX_BUF_SZ_96_IDX, 64 HINIC_RX_BUF_SZ_128_IDX, 65 HINIC_RX_BUF_SZ_192_IDX, 66 HINIC_RX_BUF_SZ_256_IDX, 67 HINIC_RX_BUF_SZ_384_IDX, 68 HINIC_RX_BUF_SZ_512_IDX, 69 HINIC_RX_BUF_SZ_768_IDX, 70 HINIC_RX_BUF_SZ_1024_IDX, 71 HINIC_RX_BUF_SZ_1536_IDX, 72 HINIC_RX_BUF_SZ_2048_IDX, 73 HINIC_RX_BUF_SZ_3072_IDX, 74 HINIC_RX_BUF_SZ_4096_IDX, 75 HINIC_RX_BUF_SZ_8192_IDX, 76 HINIC_RX_BUF_SZ_16384_IDX, 77 }; 78 79 struct hinic_sq { 80 struct hinic_hwif *hwif; 81 82 struct hinic_wq *wq; 83 84 u16 qid; 85 86 u32 irq; 87 u16 msix_entry; 88 89 void *hw_ci_addr; 90 dma_addr_t hw_ci_dma_addr; 91 92 void __iomem *db_base; 93 94 struct sk_buff **saved_skb; 95 struct hinic_debug_priv *dbg; 96 }; 97 98 struct hinic_rq { 99 struct hinic_hwif *hwif; 100 101 struct hinic_wq *wq; 102 103 u16 qid; 104 105 struct cpumask affinity_mask; 106 u32 irq; 107 u16 msix_entry; 108 109 size_t buf_sz; 110 111 struct sk_buff **saved_skb; 112 113 struct hinic_rq_cqe **cqe; 114 dma_addr_t *cqe_dma; 115 116 u16 *pi_virt_addr; 117 dma_addr_t pi_dma_addr; 118 struct hinic_debug_priv *dbg; 119 }; 120 121 struct hinic_qp { 122 struct hinic_sq sq; 123 struct hinic_rq rq; 124 125 u16 q_id; 126 }; 127 128 void hinic_qp_prepare_header(struct hinic_qp_ctxt_header *qp_ctxt_hdr, 129 enum hinic_qp_ctxt_type ctxt_type, 130 u16 num_queues, u16 max_queues); 131 132 void hinic_sq_prepare_ctxt(struct hinic_sq_ctxt *sq_ctxt, 133 struct hinic_sq *sq, u16 global_qid); 134 135 void hinic_rq_prepare_ctxt(struct hinic_rq_ctxt *rq_ctxt, 136 struct hinic_rq *rq, u16 global_qid); 137 138 int hinic_init_sq(struct hinic_sq *sq, struct hinic_hwif *hwif, 139 struct hinic_wq *wq, struct msix_entry *entry, void *ci_addr, 140 dma_addr_t ci_dma_addr, void __iomem *db_base); 141 142 void hinic_clean_sq(struct hinic_sq *sq); 143 144 int hinic_init_rq(struct hinic_rq *rq, struct hinic_hwif *hwif, 145 struct hinic_wq *wq, struct msix_entry *entry); 146 147 void hinic_clean_rq(struct hinic_rq *rq); 148 149 int hinic_get_sq_free_wqebbs(struct hinic_sq *sq); 150 151 int hinic_get_rq_free_wqebbs(struct hinic_rq *rq); 152 153 void hinic_task_set_l2hdr(struct hinic_sq_task *task, u32 len); 154 155 void hinic_task_set_outter_l3(struct hinic_sq_task *task, 156 enum hinic_l3_offload_type l3_type, 157 u32 network_len); 158 159 void hinic_task_set_inner_l3(struct hinic_sq_task *task, 160 enum hinic_l3_offload_type l3_type, 161 u32 network_len); 162 163 void hinic_task_set_tunnel_l4(struct hinic_sq_task *task, 164 enum hinic_l4_tunnel_type l4_type, 165 u32 tunnel_len); 166 167 void hinic_set_cs_inner_l4(struct hinic_sq_task *task, 168 u32 *queue_info, 169 enum hinic_l4_offload_type l4_offload, 170 u32 l4_len, u32 offset); 171 172 void hinic_set_tso_inner_l4(struct hinic_sq_task *task, 173 u32 *queue_info, 174 enum hinic_l4_offload_type l4_offload, 175 u32 l4_len, 176 u32 offset, u32 ip_ident, u32 mss); 177 178 void hinic_sq_prepare_wqe(struct hinic_sq *sq, u16 prod_idx, 179 struct hinic_sq_wqe *wqe, struct hinic_sge *sges, 180 int nr_sges); 181 182 void hinic_sq_write_db(struct hinic_sq *sq, u16 prod_idx, unsigned int wqe_size, 183 unsigned int cos); 184 185 struct hinic_sq_wqe *hinic_sq_get_wqe(struct hinic_sq *sq, 186 unsigned int wqe_size, u16 *prod_idx); 187 188 void hinic_sq_return_wqe(struct hinic_sq *sq, unsigned int wqe_size); 189 190 void hinic_sq_write_wqe(struct hinic_sq *sq, u16 prod_idx, 191 struct hinic_sq_wqe *wqe, struct sk_buff *skb, 192 unsigned int wqe_size); 193 194 struct hinic_sq_wqe *hinic_sq_read_wqe(struct hinic_sq *sq, 195 struct sk_buff **skb, 196 unsigned int wqe_size, u16 *cons_idx); 197 198 struct hinic_sq_wqe *hinic_sq_read_wqebb(struct hinic_sq *sq, 199 struct sk_buff **skb, 200 unsigned int *wqe_size, u16 *cons_idx); 201 202 void hinic_sq_put_wqe(struct hinic_sq *sq, unsigned int wqe_size); 203 204 void hinic_sq_get_sges(struct hinic_sq_wqe *wqe, struct hinic_sge *sges, 205 int nr_sges); 206 207 struct hinic_rq_wqe *hinic_rq_get_wqe(struct hinic_rq *rq, 208 unsigned int wqe_size, u16 *prod_idx); 209 210 void hinic_rq_write_wqe(struct hinic_rq *rq, u16 prod_idx, 211 struct hinic_rq_wqe *wqe, struct sk_buff *skb); 212 213 struct hinic_rq_wqe *hinic_rq_read_wqe(struct hinic_rq *rq, 214 unsigned int wqe_size, 215 struct sk_buff **skb, u16 *cons_idx); 216 217 struct hinic_rq_wqe *hinic_rq_read_next_wqe(struct hinic_rq *rq, 218 unsigned int wqe_size, 219 struct sk_buff **skb, 220 u16 *cons_idx); 221 222 void hinic_rq_put_wqe(struct hinic_rq *rq, u16 cons_idx, 223 unsigned int wqe_size); 224 225 void hinic_rq_get_sge(struct hinic_rq *rq, struct hinic_rq_wqe *wqe, 226 u16 cons_idx, struct hinic_sge *sge); 227 228 void hinic_rq_prepare_wqe(struct hinic_rq *rq, u16 prod_idx, 229 struct hinic_rq_wqe *wqe, struct hinic_sge *sge); 230 231 void hinic_rq_update(struct hinic_rq *rq, u16 prod_idx); 232 233 #endif 234