1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
5 */
6
7 #include <linux/types.h>
8 #include <linux/io.h>
9 #include <linux/delay.h>
10
11 #include "ipa.h"
12 #include "ipa_clock.h"
13 #include "ipa_uc.h"
14
15 /**
16 * DOC: The IPA embedded microcontroller
17 *
18 * The IPA incorporates a microcontroller that is able to do some additional
19 * handling/offloading of network activity. The current code makes
20 * essentially no use of the microcontroller, but it still requires some
21 * initialization. It needs to be notified in the event the AP crashes.
22 *
23 * The microcontroller can generate two interrupts to the AP. One interrupt
24 * is used to indicate that a response to a request from the AP is available.
25 * The other is used to notify the AP of the occurrence of an event. In
26 * addition, the AP can interrupt the microcontroller by writing a register.
27 *
28 * A 128 byte block of structured memory within the IPA SRAM is used together
29 * with these interrupts to implement the communication interface between the
30 * AP and the IPA microcontroller. Each side writes data to the shared area
31 * before interrupting its peer, which will read the written data in response
32 * to the interrupt. Some information found in the shared area is currently
33 * unused. All remaining space in the shared area is reserved, and must not
34 * be read or written by the AP.
35 */
36 /* Supports hardware interface version 0x2000 */
37
38 /* Delay to allow a the microcontroller to save state when crashing */
39 #define IPA_SEND_DELAY 100 /* microseconds */
40
41 /**
42 * struct ipa_uc_mem_area - AP/microcontroller shared memory area
43 * @command: command code (AP->microcontroller)
44 * @reserved0: reserved bytes; avoid reading or writing
45 * @command_param: low 32 bits of command parameter (AP->microcontroller)
46 * @command_param_hi: high 32 bits of command parameter (AP->microcontroller)
47 *
48 * @response: response code (microcontroller->AP)
49 * @reserved1: reserved bytes; avoid reading or writing
50 * @response_param: response parameter (microcontroller->AP)
51 *
52 * @event: event code (microcontroller->AP)
53 * @reserved2: reserved bytes; avoid reading or writing
54 * @event_param: event parameter (microcontroller->AP)
55 *
56 * @first_error_address: address of first error-source on SNOC
57 * @hw_state: state of hardware (including error type information)
58 * @warning_counter: counter of non-fatal hardware errors
59 * @reserved3: reserved bytes; avoid reading or writing
60 * @interface_version: hardware-reported interface version
61 * @reserved4: reserved bytes; avoid reading or writing
62 *
63 * A shared memory area at the base of IPA resident memory is used for
64 * communication with the microcontroller. The region is 128 bytes in
65 * size, but only the first 40 bytes (structured this way) are used.
66 */
67 struct ipa_uc_mem_area {
68 u8 command; /* enum ipa_uc_command */
69 u8 reserved0[3];
70 __le32 command_param;
71 __le32 command_param_hi;
72 u8 response; /* enum ipa_uc_response */
73 u8 reserved1[3];
74 __le32 response_param;
75 u8 event; /* enum ipa_uc_event */
76 u8 reserved2[3];
77
78 __le32 event_param;
79 __le32 first_error_address;
80 u8 hw_state;
81 u8 warning_counter;
82 __le16 reserved3;
83 __le16 interface_version;
84 __le16 reserved4;
85 };
86
87 /** enum ipa_uc_command - commands from the AP to the microcontroller */
88 enum ipa_uc_command {
89 IPA_UC_COMMAND_NO_OP = 0,
90 IPA_UC_COMMAND_UPDATE_FLAGS = 1,
91 IPA_UC_COMMAND_DEBUG_RUN_TEST = 2,
92 IPA_UC_COMMAND_DEBUG_GET_INFO = 3,
93 IPA_UC_COMMAND_ERR_FATAL = 4,
94 IPA_UC_COMMAND_CLK_GATE = 5,
95 IPA_UC_COMMAND_CLK_UNGATE = 6,
96 IPA_UC_COMMAND_MEMCPY = 7,
97 IPA_UC_COMMAND_RESET_PIPE = 8,
98 IPA_UC_COMMAND_REG_WRITE = 9,
99 IPA_UC_COMMAND_GSI_CH_EMPTY = 10,
100 };
101
102 /** enum ipa_uc_response - microcontroller response codes */
103 enum ipa_uc_response {
104 IPA_UC_RESPONSE_NO_OP = 0,
105 IPA_UC_RESPONSE_INIT_COMPLETED = 1,
106 IPA_UC_RESPONSE_CMD_COMPLETED = 2,
107 IPA_UC_RESPONSE_DEBUG_GET_INFO = 3,
108 };
109
110 /** enum ipa_uc_event - common cpu events reported by the microcontroller */
111 enum ipa_uc_event {
112 IPA_UC_EVENT_NO_OP = 0,
113 IPA_UC_EVENT_ERROR = 1,
114 IPA_UC_EVENT_LOG_INFO = 2,
115 };
116
ipa_uc_shared(struct ipa * ipa)117 static struct ipa_uc_mem_area *ipa_uc_shared(struct ipa *ipa)
118 {
119 u32 offset = ipa->mem_offset + ipa->mem[IPA_MEM_UC_SHARED].offset;
120
121 return ipa->mem_virt + offset;
122 }
123
124 /* Microcontroller event IPA interrupt handler */
ipa_uc_event_handler(struct ipa * ipa,enum ipa_irq_id irq_id)125 static void ipa_uc_event_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
126 {
127 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
128 struct device *dev = &ipa->pdev->dev;
129
130 if (shared->event == IPA_UC_EVENT_ERROR)
131 dev_err(dev, "microcontroller error event\n");
132 else
133 dev_err(dev, "unsupported microcontroller event %hhu\n",
134 shared->event);
135 }
136
137 /* Microcontroller response IPA interrupt handler */
ipa_uc_response_hdlr(struct ipa * ipa,enum ipa_irq_id irq_id)138 static void ipa_uc_response_hdlr(struct ipa *ipa, enum ipa_irq_id irq_id)
139 {
140 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
141
142 /* An INIT_COMPLETED response message is sent to the AP by the
143 * microcontroller when it is operational. Other than this, the AP
144 * should only receive responses from the microcontroller when it has
145 * sent it a request message.
146 *
147 * We can drop the clock reference taken in ipa_uc_setup() once we
148 * know the microcontroller has finished its initialization.
149 */
150 switch (shared->response) {
151 case IPA_UC_RESPONSE_INIT_COMPLETED:
152 ipa->uc_loaded = true;
153 ipa_clock_put(ipa);
154 break;
155 default:
156 dev_warn(&ipa->pdev->dev,
157 "unsupported microcontroller response %hhu\n",
158 shared->response);
159 break;
160 }
161 }
162
163 /* ipa_uc_setup() - Set up the microcontroller */
ipa_uc_setup(struct ipa * ipa)164 void ipa_uc_setup(struct ipa *ipa)
165 {
166 /* The microcontroller needs the IPA clock running until it has
167 * completed its initialization. It signals this by sending an
168 * INIT_COMPLETED response message to the AP. This could occur after
169 * we have finished doing the rest of the IPA initialization, so we
170 * need to take an extra "proxy" reference, and hold it until we've
171 * received that signal. (This reference is dropped in
172 * ipa_uc_response_hdlr(), above.)
173 */
174 ipa_clock_get(ipa);
175
176 ipa->uc_loaded = false;
177 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_0, ipa_uc_event_handler);
178 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_1, ipa_uc_response_hdlr);
179 }
180
181 /* Inverse of ipa_uc_setup() */
ipa_uc_teardown(struct ipa * ipa)182 void ipa_uc_teardown(struct ipa *ipa)
183 {
184 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_1);
185 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_0);
186 if (!ipa->uc_loaded)
187 ipa_clock_put(ipa);
188 }
189
190 /* Send a command to the microcontroller */
send_uc_command(struct ipa * ipa,u32 command,u32 command_param)191 static void send_uc_command(struct ipa *ipa, u32 command, u32 command_param)
192 {
193 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
194
195 shared->command = command;
196 shared->command_param = cpu_to_le32(command_param);
197 shared->command_param_hi = 0;
198 shared->response = 0;
199 shared->response_param = 0;
200
201 iowrite32(1, ipa->reg_virt + IPA_REG_IRQ_UC_OFFSET);
202 }
203
204 /* Tell the microcontroller the AP is shutting down */
ipa_uc_panic_notifier(struct ipa * ipa)205 void ipa_uc_panic_notifier(struct ipa *ipa)
206 {
207 if (!ipa->uc_loaded)
208 return;
209
210 send_uc_command(ipa, IPA_UC_COMMAND_ERR_FATAL, 0);
211
212 /* give uc enough time to save state */
213 udelay(IPA_SEND_DELAY);
214 }
215