1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
4 *
5 * PXA2xx pin mux configuration support
6 *
7 * The GPIOs on PXA2xx can be configured as one of many alternate
8 * functions, this is by concept samilar to the MFP configuration
9 * on PXA3xx, what's more important, the low power pin state and
10 * wakeup detection are also supported by the same framework.
11 */
12 #include <linux/gpio.h>
13 #include <linux/gpio-pxa.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/io.h>
18 #include <linux/syscore_ops.h>
19
20 #include <mach/pxa2xx-regs.h>
21 #include "mfp-pxa2xx.h"
22
23 #include "generic.h"
24
25 #define PGSR(x) __REG2(0x40F00020, (x) << 2)
26 #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
27 #define GAFR_L(x) __GAFR(0, x)
28 #define GAFR_U(x) __GAFR(1, x)
29
30 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
31 #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
32 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
33 #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
34 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
35
36 #define PWER_WE35 (1 << 24)
37
38 struct gpio_desc {
39 unsigned valid : 1;
40 unsigned can_wakeup : 1;
41 unsigned keypad_gpio : 1;
42 unsigned dir_inverted : 1;
43 unsigned int mask; /* bit mask in PWER or PKWR */
44 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
45 unsigned long config;
46 };
47
48 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
49
50 static unsigned long gpdr_lpm[4];
51
__mfp_config_gpio(unsigned gpio,unsigned long c)52 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
53 {
54 unsigned long gafr, mask = GPIO_bit(gpio);
55 int bank = gpio_to_bank(gpio);
56 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
57 int shft = (gpio & 0xf) << 1;
58 int fn = MFP_AF(c);
59 int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
60
61 if (fn > 3)
62 return -EINVAL;
63
64 /* alternate function and direction at run-time */
65 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
66 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
67
68 if (uorl == 0)
69 GAFR_L(bank) = gafr;
70 else
71 GAFR_U(bank) = gafr;
72
73 if (is_out ^ gpio_desc[gpio].dir_inverted)
74 GPDR(gpio) |= mask;
75 else
76 GPDR(gpio) &= ~mask;
77
78 /* alternate function and direction at low power mode */
79 switch (c & MFP_LPM_STATE_MASK) {
80 case MFP_LPM_DRIVE_HIGH:
81 PGSR(bank) |= mask;
82 is_out = 1;
83 break;
84 case MFP_LPM_DRIVE_LOW:
85 PGSR(bank) &= ~mask;
86 is_out = 1;
87 break;
88 case MFP_LPM_INPUT:
89 case MFP_LPM_DEFAULT:
90 break;
91 default:
92 /* warning and fall through, treat as MFP_LPM_DEFAULT */
93 pr_warn("%s: GPIO%d: unsupported low power mode\n",
94 __func__, gpio);
95 break;
96 }
97
98 if (is_out ^ gpio_desc[gpio].dir_inverted)
99 gpdr_lpm[bank] |= mask;
100 else
101 gpdr_lpm[bank] &= ~mask;
102
103 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
104 * configurations of those pins not able to wakeup
105 */
106 if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
107 pr_warn("%s: GPIO%d unable to wakeup\n", __func__, gpio);
108 return -EINVAL;
109 }
110
111 if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
112 pr_warn("%s: output GPIO%d unable to wakeup\n", __func__, gpio);
113 return -EINVAL;
114 }
115
116 return 0;
117 }
118
__mfp_validate(int mfp)119 static inline int __mfp_validate(int mfp)
120 {
121 int gpio = mfp_to_gpio(mfp);
122
123 if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
124 pr_warn("%s: GPIO%d is invalid pin\n", __func__, gpio);
125 return -1;
126 }
127
128 return gpio;
129 }
130
pxa2xx_mfp_config(unsigned long * mfp_cfgs,int num)131 void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
132 {
133 unsigned long flags;
134 unsigned long *c;
135 int i, gpio;
136
137 for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
138
139 gpio = __mfp_validate(MFP_PIN(*c));
140 if (gpio < 0)
141 continue;
142
143 local_irq_save(flags);
144
145 gpio_desc[gpio].config = *c;
146 __mfp_config_gpio(gpio, *c);
147
148 local_irq_restore(flags);
149 }
150 }
151
pxa2xx_mfp_set_lpm(int mfp,unsigned long lpm)152 void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
153 {
154 unsigned long flags, c;
155 int gpio;
156
157 gpio = __mfp_validate(mfp);
158 if (gpio < 0)
159 return;
160
161 local_irq_save(flags);
162
163 c = gpio_desc[gpio].config;
164 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
165 __mfp_config_gpio(gpio, c);
166
167 local_irq_restore(flags);
168 }
169
gpio_set_wake(unsigned int gpio,unsigned int on)170 int gpio_set_wake(unsigned int gpio, unsigned int on)
171 {
172 struct gpio_desc *d;
173 unsigned long c, mux_taken;
174
175 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
176 return -EINVAL;
177
178 d = &gpio_desc[gpio];
179 c = d->config;
180
181 if (!d->valid)
182 return -EINVAL;
183
184 /* Allow keypad GPIOs to wakeup system when
185 * configured as generic GPIOs.
186 */
187 if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
188 (d->config & MFP_LPM_CAN_WAKEUP)) {
189 if (on)
190 PKWR |= d->mask;
191 else
192 PKWR &= ~d->mask;
193 return 0;
194 }
195
196 mux_taken = (PWER & d->mux_mask) & (~d->mask);
197 if (on && mux_taken)
198 return -EBUSY;
199
200 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
201 if (on) {
202 PWER = (PWER & ~d->mux_mask) | d->mask;
203
204 if (c & MFP_LPM_EDGE_RISE)
205 PRER |= d->mask;
206 else
207 PRER &= ~d->mask;
208
209 if (c & MFP_LPM_EDGE_FALL)
210 PFER |= d->mask;
211 else
212 PFER &= ~d->mask;
213 } else {
214 PWER &= ~d->mask;
215 PRER &= ~d->mask;
216 PFER &= ~d->mask;
217 }
218 }
219 return 0;
220 }
221
222 #ifdef CONFIG_PXA25x
pxa25x_mfp_init(void)223 static void __init pxa25x_mfp_init(void)
224 {
225 int i;
226
227 /* running before pxa_gpio_probe() */
228 #ifdef CONFIG_CPU_PXA26x
229 pxa_last_gpio = 89;
230 #else
231 pxa_last_gpio = 84;
232 #endif
233 for (i = 0; i <= pxa_last_gpio; i++)
234 gpio_desc[i].valid = 1;
235
236 for (i = 0; i <= 15; i++) {
237 gpio_desc[i].can_wakeup = 1;
238 gpio_desc[i].mask = GPIO_bit(i);
239 }
240
241 /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
242 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
243 */
244 for (i = 86; i <= pxa_last_gpio; i++)
245 gpio_desc[i].dir_inverted = 1;
246 }
247 #else
pxa25x_mfp_init(void)248 static inline void pxa25x_mfp_init(void) {}
249 #endif /* CONFIG_PXA25x */
250
251 #ifdef CONFIG_PXA27x
252 static int pxa27x_pkwr_gpio[] = {
253 13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
254 95, 96, 97, 98, 99, 100, 101, 102
255 };
256
keypad_set_wake(unsigned int on)257 int keypad_set_wake(unsigned int on)
258 {
259 unsigned int i, gpio, mask = 0;
260 struct gpio_desc *d;
261
262 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
263
264 gpio = pxa27x_pkwr_gpio[i];
265 d = &gpio_desc[gpio];
266
267 /* skip if configured as generic GPIO */
268 if (MFP_AF(d->config) == 0)
269 continue;
270
271 if (d->config & MFP_LPM_CAN_WAKEUP)
272 mask |= gpio_desc[gpio].mask;
273 }
274
275 if (on)
276 PKWR |= mask;
277 else
278 PKWR &= ~mask;
279 return 0;
280 }
281
282 #define PWER_WEMUX2_GPIO38 (1 << 16)
283 #define PWER_WEMUX2_GPIO53 (2 << 16)
284 #define PWER_WEMUX2_GPIO40 (3 << 16)
285 #define PWER_WEMUX2_GPIO36 (4 << 16)
286 #define PWER_WEMUX2_MASK (7 << 16)
287 #define PWER_WEMUX3_GPIO31 (1 << 19)
288 #define PWER_WEMUX3_GPIO113 (2 << 19)
289 #define PWER_WEMUX3_MASK (3 << 19)
290
291 #define INIT_GPIO_DESC_MUXED(mux, gpio) \
292 do { \
293 gpio_desc[(gpio)].can_wakeup = 1; \
294 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
295 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
296 } while (0)
297
pxa27x_mfp_init(void)298 static void __init pxa27x_mfp_init(void)
299 {
300 int i, gpio;
301
302 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
303 for (i = 0; i <= pxa_last_gpio; i++) {
304 /* skip GPIO2, 5, 6, 7, 8, they are not
305 * valid pins allow configuration
306 */
307 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
308 continue;
309
310 gpio_desc[i].valid = 1;
311 }
312
313 /* Keypad GPIOs */
314 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
315 gpio = pxa27x_pkwr_gpio[i];
316 gpio_desc[gpio].can_wakeup = 1;
317 gpio_desc[gpio].keypad_gpio = 1;
318 gpio_desc[gpio].mask = 1 << i;
319 }
320
321 /* Overwrite GPIO13 as a PWER wakeup source */
322 for (i = 0; i <= 15; i++) {
323 /* skip GPIO2, 5, 6, 7, 8 */
324 if (GPIO_bit(i) & 0x1e4)
325 continue;
326
327 gpio_desc[i].can_wakeup = 1;
328 gpio_desc[i].mask = GPIO_bit(i);
329 }
330
331 gpio_desc[35].can_wakeup = 1;
332 gpio_desc[35].mask = PWER_WE35;
333
334 INIT_GPIO_DESC_MUXED(WEMUX3, 31);
335 INIT_GPIO_DESC_MUXED(WEMUX3, 113);
336 INIT_GPIO_DESC_MUXED(WEMUX2, 38);
337 INIT_GPIO_DESC_MUXED(WEMUX2, 53);
338 INIT_GPIO_DESC_MUXED(WEMUX2, 40);
339 INIT_GPIO_DESC_MUXED(WEMUX2, 36);
340 }
341 #else
pxa27x_mfp_init(void)342 static inline void pxa27x_mfp_init(void) {}
343 #endif /* CONFIG_PXA27x */
344
345 #ifdef CONFIG_PM
346 static unsigned long saved_gafr[2][4];
347 static unsigned long saved_gpdr[4];
348 static unsigned long saved_gplr[4];
349 static unsigned long saved_pgsr[4];
350
pxa2xx_mfp_suspend(void)351 static int pxa2xx_mfp_suspend(void)
352 {
353 int i;
354
355 /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
356 for (i = 0; i < pxa_last_gpio; i++) {
357 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
358 (GPDR(i) & GPIO_bit(i))) {
359 if (GPLR(i) & GPIO_bit(i))
360 PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
361 else
362 PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
363 }
364 }
365
366 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
367 saved_gafr[0][i] = GAFR_L(i);
368 saved_gafr[1][i] = GAFR_U(i);
369 saved_gpdr[i] = GPDR(i * 32);
370 saved_gplr[i] = GPLR(i * 32);
371 saved_pgsr[i] = PGSR(i);
372
373 GPSR(i * 32) = PGSR(i);
374 GPCR(i * 32) = ~PGSR(i);
375 }
376
377 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
378 for (i = 0; i < pxa_last_gpio; i++) {
379 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
380 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
381 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
382 GPDR(i) |= GPIO_bit(i);
383 else
384 GPDR(i) &= ~GPIO_bit(i);
385 }
386
387 return 0;
388 }
389
pxa2xx_mfp_resume(void)390 static void pxa2xx_mfp_resume(void)
391 {
392 int i;
393
394 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
395 GAFR_L(i) = saved_gafr[0][i];
396 GAFR_U(i) = saved_gafr[1][i];
397 GPSR(i * 32) = saved_gplr[i];
398 GPCR(i * 32) = ~saved_gplr[i];
399 GPDR(i * 32) = saved_gpdr[i];
400 PGSR(i) = saved_pgsr[i];
401 }
402 PSSR = PSSR_RDH | PSSR_PH;
403 }
404 #else
405 #define pxa2xx_mfp_suspend NULL
406 #define pxa2xx_mfp_resume NULL
407 #endif
408
409 struct syscore_ops pxa2xx_mfp_syscore_ops = {
410 .suspend = pxa2xx_mfp_suspend,
411 .resume = pxa2xx_mfp_resume,
412 };
413
pxa2xx_mfp_init(void)414 static int __init pxa2xx_mfp_init(void)
415 {
416 int i;
417
418 if (!cpu_is_pxa2xx())
419 return 0;
420
421 if (cpu_is_pxa25x())
422 pxa25x_mfp_init();
423
424 if (cpu_is_pxa27x())
425 pxa27x_mfp_init();
426
427 /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
428 PSSR = PSSR_RDH;
429
430 /* initialize gafr_run[], pgsr_lpm[] from existing values */
431 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
432 gpdr_lpm[i] = GPDR(i * 32);
433
434 return 0;
435 }
436 postcore_initcall(pxa2xx_mfp_init);
437