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Searched defs:reg1 (Results 1 – 15 of 15) sorted by relevance

/third_party/ffmpeg/libavutil/mips/
Dmmiutils.h101 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
105 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
192 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
195 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
/third_party/openssl/crypto/aria/
Daria.c474 register uint32_t reg0, reg1, reg2, reg3; in aria_encrypt() local
541 register uint32_t reg0, reg1, reg2, reg3; in aria_set_encrypt_key() local
676 register uint32_t reg0, reg1, reg2, reg3; in aria_set_decrypt_key() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp149 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity()
/third_party/mesa3d/src/util/
Dregister_allocate.c134 struct ra_reg *reg1 = &regs->regs[r1]; in ra_add_conflict_list() local
180 unsigned int base_reg, unsigned int reg0, unsigned int reg1) in ra_add_transitive_reg_pair_conflict()
/third_party/ffmpeg/libavcodec/mips/
Dvp9_idct_msa.c67 #define VP9_DOTP_CONST_PAIR(reg0, reg1, cnst0, cnst1, out0, out1) \ argument
968 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vp9_idct16_1d_columns_addblk_msa() local
1071 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vp9_idct16_1d_columns_msa() local
1634 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in vp9_idct8x32_column_even_process_store() local
1718 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in vp9_idct8x32_column_odd_process_store() local
Dh264pred_msa.c217 v4i32 reg0, reg1, reg2, reg3; in intra_predict_plane_16x16_msa() local
/third_party/pcre2/pcre2/src/sljit/
DsljitNativeARM_T2_32.c70 #define IS_2_LO_REGS(reg1, reg2) \ argument
72 #define IS_3_LO_REGS(reg1, reg2, reg3) \ argument
/third_party/mesa3d/src/intel/compiler/
Dbrw_fs_bank_conflicts.cpp416 for (unsigned reg1 = reg + 1; reg1 <= max_reg; reg1++) { in require_contiguous() local
/third_party/mesa3d/src/freedreno/decode/
Dcrashdec.c595 uint32_t reg1 : 18; in dump_mem_pool_chunk() member
/third_party/mesa3d/src/panfrost/bifrost/
Dbifrost.h221 unsigned reg1 : 6; member
/third_party/pixman/pixman/
Dpixman-region.c749 region_type_t * reg1, /* First region in operation */ in pixman_op()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerX8664.cpp2168 void AssemblerX8664::arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1) { in arith_int()
2230 void AssemblerX8664::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) { in cmp()
2247 void AssemblerX8664::test(Type Ty, GPRRegister reg1, GPRRegister reg2) { in test()
3130 void AssemblerX8664::xchg(Type Ty, GPRRegister reg0, GPRRegister reg1) { in xchg()
DIceAssemblerX8632.cpp2050 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1) { in arith_int()
2108 void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) { in cmp()
2125 void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) { in test()
2972 void AssemblerX8632::xchg(Type Ty, GPRRegister reg0, GPRRegister reg1) { in xchg()
/third_party/ltp/tools/sparse/sparse-src/
Dexample.c925 struct hardreg *reg1, *reg2; in generate_commutative_binop() local
Dcompile-i386.c1233 struct storage *reg1, *reg2; in emit_compare() local