1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
5 */
6
7 #include <drm/drm_atomic.h>
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_crtc.h>
10 #include <drm/drm_crtc_helper.h>
11 #include <drm/drm_fourcc.h>
12 #include <drm/drm_fb_cma_helper.h>
13
14 #include "tidss_crtc.h"
15 #include "tidss_dispc.h"
16 #include "tidss_drv.h"
17 #include "tidss_plane.h"
18
19 /* drm_plane_helper_funcs */
20
tidss_plane_atomic_check(struct drm_plane * plane,struct drm_plane_state * state)21 static int tidss_plane_atomic_check(struct drm_plane *plane,
22 struct drm_plane_state *state)
23 {
24 struct drm_device *ddev = plane->dev;
25 struct tidss_device *tidss = to_tidss(ddev);
26 struct tidss_plane *tplane = to_tidss_plane(plane);
27 const struct drm_format_info *finfo;
28 struct drm_crtc_state *crtc_state;
29 u32 hw_plane = tplane->hw_plane_id;
30 u32 hw_videoport;
31 int ret;
32
33 dev_dbg(ddev->dev, "%s\n", __func__);
34
35 if (!state->crtc) {
36 /*
37 * The visible field is not reset by the DRM core but only
38 * updated by drm_plane_helper_check_state(), set it manually.
39 */
40 state->visible = false;
41 return 0;
42 }
43
44 crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);
45 if (IS_ERR(crtc_state))
46 return PTR_ERR(crtc_state);
47
48 ret = drm_atomic_helper_check_plane_state(state, crtc_state, 0,
49 INT_MAX, true, true);
50 if (ret < 0)
51 return ret;
52
53 /*
54 * The HW is only able to start drawing at subpixel boundary
55 * (the two first checks bellow). At the end of a row the HW
56 * can only jump integer number of subpixels forward to the
57 * beginning of the next row. So we can only show picture with
58 * integer subpixel width (the third check). However, after
59 * reaching the end of the drawn picture the drawing starts
60 * again at the absolute memory address where top left corner
61 * position of the drawn picture is (so there is no need to
62 * check for odd height).
63 */
64
65 finfo = drm_format_info(state->fb->format->format);
66
67 if ((state->src_x >> 16) % finfo->hsub != 0) {
68 dev_dbg(ddev->dev,
69 "%s: x-position %u not divisible subpixel size %u\n",
70 __func__, (state->src_x >> 16), finfo->hsub);
71 return -EINVAL;
72 }
73
74 if ((state->src_y >> 16) % finfo->vsub != 0) {
75 dev_dbg(ddev->dev,
76 "%s: y-position %u not divisible subpixel size %u\n",
77 __func__, (state->src_y >> 16), finfo->vsub);
78 return -EINVAL;
79 }
80
81 if ((state->src_w >> 16) % finfo->hsub != 0) {
82 dev_dbg(ddev->dev,
83 "%s: src width %u not divisible by subpixel size %u\n",
84 __func__, (state->src_w >> 16), finfo->hsub);
85 return -EINVAL;
86 }
87
88 if (!state->visible)
89 return 0;
90
91 hw_videoport = to_tidss_crtc(state->crtc)->hw_videoport;
92
93 ret = dispc_plane_check(tidss->dispc, hw_plane, state, hw_videoport);
94 if (ret)
95 return ret;
96
97 return 0;
98 }
99
tidss_plane_atomic_update(struct drm_plane * plane,struct drm_plane_state * old_state)100 static void tidss_plane_atomic_update(struct drm_plane *plane,
101 struct drm_plane_state *old_state)
102 {
103 struct drm_device *ddev = plane->dev;
104 struct tidss_device *tidss = to_tidss(ddev);
105 struct tidss_plane *tplane = to_tidss_plane(plane);
106 struct drm_plane_state *state = plane->state;
107 u32 hw_videoport;
108 int ret;
109
110 dev_dbg(ddev->dev, "%s\n", __func__);
111
112 if (!state->visible) {
113 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
114 return;
115 }
116
117 hw_videoport = to_tidss_crtc(state->crtc)->hw_videoport;
118
119 ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
120 state, hw_videoport);
121
122 if (ret) {
123 dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
124 __func__, tplane->hw_plane_id);
125 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
126 return;
127 }
128
129 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
130 }
131
tidss_plane_atomic_disable(struct drm_plane * plane,struct drm_plane_state * old_state)132 static void tidss_plane_atomic_disable(struct drm_plane *plane,
133 struct drm_plane_state *old_state)
134 {
135 struct drm_device *ddev = plane->dev;
136 struct tidss_device *tidss = to_tidss(ddev);
137 struct tidss_plane *tplane = to_tidss_plane(plane);
138
139 dev_dbg(ddev->dev, "%s\n", __func__);
140
141 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
142 }
143
drm_plane_destroy(struct drm_plane * plane)144 static void drm_plane_destroy(struct drm_plane *plane)
145 {
146 struct tidss_plane *tplane = to_tidss_plane(plane);
147
148 drm_plane_cleanup(plane);
149 kfree(tplane);
150 }
151
152 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
153 .atomic_check = tidss_plane_atomic_check,
154 .atomic_update = tidss_plane_atomic_update,
155 .atomic_disable = tidss_plane_atomic_disable,
156 };
157
158 static const struct drm_plane_funcs tidss_plane_funcs = {
159 .update_plane = drm_atomic_helper_update_plane,
160 .disable_plane = drm_atomic_helper_disable_plane,
161 .reset = drm_atomic_helper_plane_reset,
162 .destroy = drm_plane_destroy,
163 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
164 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
165 };
166
tidss_plane_create(struct tidss_device * tidss,u32 hw_plane_id,u32 plane_type,u32 crtc_mask,const u32 * formats,u32 num_formats)167 struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
168 u32 hw_plane_id, u32 plane_type,
169 u32 crtc_mask, const u32 *formats,
170 u32 num_formats)
171 {
172 struct tidss_plane *tplane;
173 enum drm_plane_type type;
174 u32 possible_crtcs;
175 u32 num_planes = tidss->feat->num_planes;
176 u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
177 BIT(DRM_COLOR_YCBCR_BT709));
178 u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
179 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
180 u32 default_encoding = DRM_COLOR_YCBCR_BT601;
181 u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
182 u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
183 BIT(DRM_MODE_BLEND_COVERAGE));
184 int ret;
185
186 tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
187 if (!tplane)
188 return ERR_PTR(-ENOMEM);
189
190 tplane->hw_plane_id = hw_plane_id;
191
192 possible_crtcs = crtc_mask;
193 type = plane_type;
194
195 ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
196 possible_crtcs,
197 &tidss_plane_funcs,
198 formats, num_formats,
199 NULL, type, NULL);
200 if (ret < 0)
201 goto err;
202
203 drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
204
205 drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
206 num_planes - 1);
207
208 ret = drm_plane_create_color_properties(&tplane->plane,
209 color_encodings,
210 color_ranges,
211 default_encoding,
212 default_range);
213 if (ret)
214 goto err;
215
216 ret = drm_plane_create_alpha_property(&tplane->plane);
217 if (ret)
218 goto err;
219
220 ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
221 if (ret)
222 goto err;
223
224 return tplane;
225
226 err:
227 kfree(tplane);
228 return ERR_PTR(ret);
229 }
230