1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Kernel-based Virtual Machine driver for Linux
4 *
5 * This header defines architecture specific interfaces, x86 version
6 */
7
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
10
11 #include <linux/types.h>
12 #include <linux/mm.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18
19 #include <linux/kvm.h>
20 #include <linux/kvm_para.h>
21 #include <linux/kvm_types.h>
22 #include <linux/perf_event.h>
23 #include <linux/pvclock_gtod.h>
24 #include <linux/clocksource.h>
25 #include <linux/irqbypass.h>
26 #include <linux/hyperv.h>
27
28 #include <asm/apic.h>
29 #include <asm/pvclock-abi.h>
30 #include <asm/desc.h>
31 #include <asm/mtrr.h>
32 #include <asm/msr-index.h>
33 #include <asm/asm.h>
34 #include <asm/kvm_page_track.h>
35 #include <asm/kvm_vcpu_regs.h>
36 #include <asm/hyperv-tlfs.h>
37
38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
39
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
47
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
49
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
51
52 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
53 KVM_DIRTY_LOG_INITIALLY_SET)
54
55 /* x86-specific vcpu->requests bit members */
56 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
57 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
58 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
59 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
60 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
61 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
62 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
63 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
64 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
65 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
66 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
67 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
68 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
69 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
70 #define KVM_REQ_MCLOCK_INPROGRESS \
71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
72 #define KVM_REQ_SCAN_IOAPIC \
73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
75 #define KVM_REQ_APIC_PAGE_RELOAD \
76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
77 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
78 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
79 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
80 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
81 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
82 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
83 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
84 #define KVM_REQ_APICV_UPDATE \
85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
86 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
87 #define KVM_REQ_TLB_FLUSH_GUEST \
88 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
89 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
90 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
91
92 #define CR0_RESERVED_BITS \
93 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
94 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
95 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
96
97 #define CR4_RESERVED_BITS \
98 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
99 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
100 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
101 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
102 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
103 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
104
105 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
106
107
108
109 #define INVALID_PAGE (~(hpa_t)0)
110 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
111
112 #define UNMAPPED_GVA (~(gpa_t)0)
113
114 /* KVM Hugepage definitions for x86 */
115 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
116 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
117 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
118 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
119 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
120 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
121 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
122
gfn_to_index(gfn_t gfn,gfn_t base_gfn,int level)123 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
124 {
125 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */
126 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
127 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
128 }
129
130 #define KVM_PERMILLE_MMU_PAGES 20
131 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
132 #define KVM_MMU_HASH_SHIFT 12
133 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
134 #define KVM_MIN_FREE_MMU_PAGES 5
135 #define KVM_REFILL_PAGES 25
136 #define KVM_MAX_CPUID_ENTRIES 256
137 #define KVM_NR_FIXED_MTRR_REGION 88
138 #define KVM_NR_VAR_MTRR 8
139
140 #define ASYNC_PF_PER_VCPU 64
141
142 enum kvm_reg {
143 VCPU_REGS_RAX = __VCPU_REGS_RAX,
144 VCPU_REGS_RCX = __VCPU_REGS_RCX,
145 VCPU_REGS_RDX = __VCPU_REGS_RDX,
146 VCPU_REGS_RBX = __VCPU_REGS_RBX,
147 VCPU_REGS_RSP = __VCPU_REGS_RSP,
148 VCPU_REGS_RBP = __VCPU_REGS_RBP,
149 VCPU_REGS_RSI = __VCPU_REGS_RSI,
150 VCPU_REGS_RDI = __VCPU_REGS_RDI,
151 #ifdef CONFIG_X86_64
152 VCPU_REGS_R8 = __VCPU_REGS_R8,
153 VCPU_REGS_R9 = __VCPU_REGS_R9,
154 VCPU_REGS_R10 = __VCPU_REGS_R10,
155 VCPU_REGS_R11 = __VCPU_REGS_R11,
156 VCPU_REGS_R12 = __VCPU_REGS_R12,
157 VCPU_REGS_R13 = __VCPU_REGS_R13,
158 VCPU_REGS_R14 = __VCPU_REGS_R14,
159 VCPU_REGS_R15 = __VCPU_REGS_R15,
160 #endif
161 VCPU_REGS_RIP,
162 NR_VCPU_REGS,
163
164 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
165 VCPU_EXREG_CR0,
166 VCPU_EXREG_CR3,
167 VCPU_EXREG_CR4,
168 VCPU_EXREG_RFLAGS,
169 VCPU_EXREG_SEGMENTS,
170 VCPU_EXREG_EXIT_INFO_1,
171 VCPU_EXREG_EXIT_INFO_2,
172 };
173
174 enum {
175 VCPU_SREG_ES,
176 VCPU_SREG_CS,
177 VCPU_SREG_SS,
178 VCPU_SREG_DS,
179 VCPU_SREG_FS,
180 VCPU_SREG_GS,
181 VCPU_SREG_TR,
182 VCPU_SREG_LDTR,
183 };
184
185 enum exit_fastpath_completion {
186 EXIT_FASTPATH_NONE,
187 EXIT_FASTPATH_REENTER_GUEST,
188 EXIT_FASTPATH_EXIT_HANDLED,
189 };
190 typedef enum exit_fastpath_completion fastpath_t;
191
192 struct x86_emulate_ctxt;
193 struct x86_exception;
194 enum x86_intercept;
195 enum x86_intercept_stage;
196
197 #define KVM_NR_DB_REGS 4
198
199 #define DR6_BD (1 << 13)
200 #define DR6_BS (1 << 14)
201 #define DR6_BT (1 << 15)
202 #define DR6_RTM (1 << 16)
203 #define DR6_FIXED_1 0xfffe0ff0
204 #define DR6_INIT 0xffff0ff0
205 #define DR6_VOLATILE 0x0001e00f
206
207 #define DR7_BP_EN_MASK 0x000000ff
208 #define DR7_GE (1 << 9)
209 #define DR7_GD (1 << 13)
210 #define DR7_FIXED_1 0x00000400
211 #define DR7_VOLATILE 0xffff2bff
212
213 #define PFERR_PRESENT_BIT 0
214 #define PFERR_WRITE_BIT 1
215 #define PFERR_USER_BIT 2
216 #define PFERR_RSVD_BIT 3
217 #define PFERR_FETCH_BIT 4
218 #define PFERR_PK_BIT 5
219 #define PFERR_GUEST_FINAL_BIT 32
220 #define PFERR_GUEST_PAGE_BIT 33
221
222 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
223 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
224 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
225 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
226 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
227 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
228 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
229 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
230
231 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
232 PFERR_WRITE_MASK | \
233 PFERR_PRESENT_MASK)
234
235 /* apic attention bits */
236 #define KVM_APIC_CHECK_VAPIC 0
237 /*
238 * The following bit is set with PV-EOI, unset on EOI.
239 * We detect PV-EOI changes by guest by comparing
240 * this bit with PV-EOI in guest memory.
241 * See the implementation in apic_update_pv_eoi.
242 */
243 #define KVM_APIC_PV_EOI_PENDING 1
244
245 struct kvm_kernel_irq_routing_entry;
246
247 /*
248 * the pages used as guest page table on soft mmu are tracked by
249 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
250 * by indirect shadow page can not be more than 15 bits.
251 *
252 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access,
253 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
254 */
255 union kvm_mmu_page_role {
256 u32 word;
257 struct {
258 unsigned level:4;
259 unsigned gpte_is_8_bytes:1;
260 unsigned quadrant:2;
261 unsigned direct:1;
262 unsigned access:3;
263 unsigned invalid:1;
264 unsigned nxe:1;
265 unsigned cr0_wp:1;
266 unsigned smep_andnot_wp:1;
267 unsigned smap_andnot_wp:1;
268 unsigned ad_disabled:1;
269 unsigned guest_mode:1;
270 unsigned :6;
271
272 /*
273 * This is left at the top of the word so that
274 * kvm_memslots_for_spte_role can extract it with a
275 * simple shift. While there is room, give it a whole
276 * byte so it is also faster to load it from memory.
277 */
278 unsigned smm:8;
279 };
280 };
281
282 union kvm_mmu_extended_role {
283 /*
284 * This structure complements kvm_mmu_page_role caching everything needed for
285 * MMU configuration. If nothing in both these structures changed, MMU
286 * re-configuration can be skipped. @valid bit is set on first usage so we don't
287 * treat all-zero structure as valid data.
288 */
289 u32 word;
290 struct {
291 unsigned int valid:1;
292 unsigned int execonly:1;
293 unsigned int cr0_pg:1;
294 unsigned int cr4_pae:1;
295 unsigned int cr4_pse:1;
296 unsigned int cr4_pke:1;
297 unsigned int cr4_smap:1;
298 unsigned int cr4_smep:1;
299 unsigned int cr4_la57:1;
300 unsigned int maxphyaddr:6;
301 };
302 };
303
304 union kvm_mmu_role {
305 u64 as_u64;
306 struct {
307 union kvm_mmu_page_role base;
308 union kvm_mmu_extended_role ext;
309 };
310 };
311
312 struct kvm_rmap_head {
313 unsigned long val;
314 };
315
316 struct kvm_pio_request {
317 unsigned long linear_rip;
318 unsigned long count;
319 int in;
320 int port;
321 int size;
322 };
323
324 #define PT64_ROOT_MAX_LEVEL 5
325
326 struct rsvd_bits_validate {
327 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
328 u64 bad_mt_xwr;
329 };
330
331 struct kvm_mmu_root_info {
332 gpa_t pgd;
333 hpa_t hpa;
334 };
335
336 #define KVM_MMU_ROOT_INFO_INVALID \
337 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
338
339 #define KVM_MMU_NUM_PREV_ROOTS 3
340
341 struct kvm_mmu_page;
342
343 /*
344 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
345 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
346 * current mmu mode.
347 */
348 struct kvm_mmu {
349 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
350 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
351 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err,
352 bool prefault);
353 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
354 struct x86_exception *fault);
355 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
356 u32 access, struct x86_exception *exception);
357 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
358 struct x86_exception *exception);
359 int (*sync_page)(struct kvm_vcpu *vcpu,
360 struct kvm_mmu_page *sp);
361 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
362 hpa_t root_hpa;
363 gpa_t root_pgd;
364 union kvm_mmu_role mmu_role;
365 u8 root_level;
366 u8 shadow_root_level;
367 u8 ept_ad;
368 bool direct_map;
369 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
370
371 /*
372 * Bitmap; bit set = permission fault
373 * Byte index: page fault error code [4:1]
374 * Bit index: pte permissions in ACC_* format
375 */
376 u8 permissions[16];
377
378 /*
379 * The pkru_mask indicates if protection key checks are needed. It
380 * consists of 16 domains indexed by page fault error code bits [4:1],
381 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
382 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
383 */
384 u32 pkru_mask;
385
386 u64 *pae_root;
387 u64 *lm_root;
388
389 /*
390 * check zero bits on shadow page table entries, these
391 * bits include not only hardware reserved bits but also
392 * the bits spte never used.
393 */
394 struct rsvd_bits_validate shadow_zero_check;
395
396 struct rsvd_bits_validate guest_rsvd_check;
397
398 /* Can have large pages at levels 2..last_nonleaf_level-1. */
399 u8 last_nonleaf_level;
400
401 bool nx;
402
403 u64 pdptrs[4]; /* pae */
404 };
405
406 struct kvm_tlb_range {
407 u64 start_gfn;
408 u64 pages;
409 };
410
411 enum pmc_type {
412 KVM_PMC_GP = 0,
413 KVM_PMC_FIXED,
414 };
415
416 struct kvm_pmc {
417 enum pmc_type type;
418 u8 idx;
419 u64 counter;
420 u64 eventsel;
421 struct perf_event *perf_event;
422 struct kvm_vcpu *vcpu;
423 /*
424 * eventsel value for general purpose counters,
425 * ctrl value for fixed counters.
426 */
427 u64 current_config;
428 };
429
430 struct kvm_pmu {
431 unsigned nr_arch_gp_counters;
432 unsigned nr_arch_fixed_counters;
433 unsigned available_event_types;
434 u64 fixed_ctr_ctrl;
435 u64 global_ctrl;
436 u64 global_status;
437 u64 global_ovf_ctrl;
438 u64 counter_bitmask[2];
439 u64 global_ctrl_mask;
440 u64 global_ovf_ctrl_mask;
441 u64 reserved_bits;
442 u8 version;
443 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
444 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
445 struct irq_work irq_work;
446 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
447 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
448 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
449
450 /*
451 * The gate to release perf_events not marked in
452 * pmc_in_use only once in a vcpu time slice.
453 */
454 bool need_cleanup;
455
456 /*
457 * The total number of programmed perf_events and it helps to avoid
458 * redundant check before cleanup if guest don't use vPMU at all.
459 */
460 u8 event_count;
461 };
462
463 struct kvm_pmu_ops;
464
465 enum {
466 KVM_DEBUGREG_BP_ENABLED = 1,
467 KVM_DEBUGREG_WONT_EXIT = 2,
468 KVM_DEBUGREG_RELOAD = 4,
469 };
470
471 struct kvm_mtrr_range {
472 u64 base;
473 u64 mask;
474 struct list_head node;
475 };
476
477 struct kvm_mtrr {
478 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
479 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
480 u64 deftype;
481
482 struct list_head head;
483 };
484
485 /* Hyper-V SynIC timer */
486 struct kvm_vcpu_hv_stimer {
487 struct hrtimer timer;
488 int index;
489 union hv_stimer_config config;
490 u64 count;
491 u64 exp_time;
492 struct hv_message msg;
493 bool msg_pending;
494 };
495
496 /* Hyper-V synthetic interrupt controller (SynIC)*/
497 struct kvm_vcpu_hv_synic {
498 u64 version;
499 u64 control;
500 u64 msg_page;
501 u64 evt_page;
502 atomic64_t sint[HV_SYNIC_SINT_COUNT];
503 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
504 DECLARE_BITMAP(auto_eoi_bitmap, 256);
505 DECLARE_BITMAP(vec_bitmap, 256);
506 bool active;
507 bool dont_zero_synic_pages;
508 };
509
510 /* Hyper-V per vcpu emulation context */
511 struct kvm_vcpu_hv {
512 u32 vp_index;
513 u64 hv_vapic;
514 s64 runtime_offset;
515 struct kvm_vcpu_hv_synic synic;
516 struct kvm_hyperv_exit exit;
517 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
518 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
519 cpumask_t tlb_flush;
520 };
521
522 struct kvm_vcpu_arch {
523 /*
524 * rip and regs accesses must go through
525 * kvm_{register,rip}_{read,write} functions.
526 */
527 unsigned long regs[NR_VCPU_REGS];
528 u32 regs_avail;
529 u32 regs_dirty;
530
531 unsigned long cr0;
532 unsigned long cr0_guest_owned_bits;
533 unsigned long cr2;
534 unsigned long cr3;
535 unsigned long cr4;
536 unsigned long cr4_guest_owned_bits;
537 unsigned long cr4_guest_rsvd_bits;
538 unsigned long cr8;
539 u32 host_pkru;
540 u32 pkru;
541 u32 hflags;
542 u64 efer;
543 u64 apic_base;
544 struct kvm_lapic *apic; /* kernel irqchip context */
545 bool apicv_active;
546 bool load_eoi_exitmap_pending;
547 DECLARE_BITMAP(ioapic_handled_vectors, 256);
548 unsigned long apic_attention;
549 int32_t apic_arb_prio;
550 int mp_state;
551 u64 ia32_misc_enable_msr;
552 u64 smbase;
553 u64 smi_count;
554 bool at_instruction_boundary;
555 bool tpr_access_reporting;
556 bool xsaves_enabled;
557 u64 ia32_xss;
558 u64 microcode_version;
559 u64 arch_capabilities;
560 u64 perf_capabilities;
561
562 /*
563 * Paging state of the vcpu
564 *
565 * If the vcpu runs in guest mode with two level paging this still saves
566 * the paging mode of the l1 guest. This context is always used to
567 * handle faults.
568 */
569 struct kvm_mmu *mmu;
570
571 /* Non-nested MMU for L1 */
572 struct kvm_mmu root_mmu;
573
574 /* L1 MMU when running nested */
575 struct kvm_mmu guest_mmu;
576
577 /*
578 * Paging state of an L2 guest (used for nested npt)
579 *
580 * This context will save all necessary information to walk page tables
581 * of an L2 guest. This context is only initialized for page table
582 * walking and not for faulting since we never handle l2 page faults on
583 * the host.
584 */
585 struct kvm_mmu nested_mmu;
586
587 /*
588 * Pointer to the mmu context currently used for
589 * gva_to_gpa translations.
590 */
591 struct kvm_mmu *walk_mmu;
592
593 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
594 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
595 struct kvm_mmu_memory_cache mmu_gfn_array_cache;
596 struct kvm_mmu_memory_cache mmu_page_header_cache;
597
598 /*
599 * QEMU userspace and the guest each have their own FPU state.
600 * In vcpu_run, we switch between the user and guest FPU contexts.
601 * While running a VCPU, the VCPU thread will have the guest FPU
602 * context.
603 *
604 * Note that while the PKRU state lives inside the fpu registers,
605 * it is switched out separately at VMENTER and VMEXIT time. The
606 * "guest_fpu" state here contains the guest FPU context, with the
607 * host PRKU bits.
608 */
609 struct fpu *user_fpu;
610 struct fpu *guest_fpu;
611
612 u64 xcr0;
613 u64 guest_supported_xcr0;
614
615 struct kvm_pio_request pio;
616 void *pio_data;
617
618 u8 event_exit_inst_len;
619
620 struct kvm_queued_exception {
621 bool pending;
622 bool injected;
623 bool has_error_code;
624 u8 nr;
625 u32 error_code;
626 unsigned long payload;
627 bool has_payload;
628 u8 nested_apf;
629 } exception;
630
631 struct kvm_queued_interrupt {
632 bool injected;
633 bool soft;
634 u8 nr;
635 } interrupt;
636
637 int halt_request; /* real mode on Intel only */
638
639 int cpuid_nent;
640 struct kvm_cpuid_entry2 *cpuid_entries;
641
642 unsigned long cr3_lm_rsvd_bits;
643 int maxphyaddr;
644 int max_tdp_level;
645
646 /* emulate context */
647
648 struct x86_emulate_ctxt *emulate_ctxt;
649 bool emulate_regs_need_sync_to_vcpu;
650 bool emulate_regs_need_sync_from_vcpu;
651 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
652
653 gpa_t time;
654 struct pvclock_vcpu_time_info hv_clock;
655 unsigned int hw_tsc_khz;
656 struct gfn_to_hva_cache pv_time;
657 bool pv_time_enabled;
658 /* set guest stopped flag in pvclock flags field */
659 bool pvclock_set_guest_stopped_request;
660
661 struct {
662 u8 preempted;
663 u64 msr_val;
664 u64 last_steal;
665 struct gfn_to_pfn_cache cache;
666 } st;
667
668 u64 l1_tsc_offset;
669 u64 tsc_offset;
670 u64 last_guest_tsc;
671 u64 last_host_tsc;
672 u64 tsc_offset_adjustment;
673 u64 this_tsc_nsec;
674 u64 this_tsc_write;
675 u64 this_tsc_generation;
676 bool tsc_catchup;
677 bool tsc_always_catchup;
678 s8 virtual_tsc_shift;
679 u32 virtual_tsc_mult;
680 u32 virtual_tsc_khz;
681 s64 ia32_tsc_adjust_msr;
682 u64 msr_ia32_power_ctl;
683 u64 tsc_scaling_ratio;
684
685 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
686 unsigned nmi_pending; /* NMI queued after currently running handler */
687 bool nmi_injected; /* Trying to inject an NMI this entry */
688 bool smi_pending; /* SMI queued after currently running handler */
689
690 struct kvm_mtrr mtrr_state;
691 u64 pat;
692
693 unsigned switch_db_regs;
694 unsigned long db[KVM_NR_DB_REGS];
695 unsigned long dr6;
696 unsigned long dr7;
697 unsigned long eff_db[KVM_NR_DB_REGS];
698 unsigned long guest_debug_dr7;
699 u64 msr_platform_info;
700 u64 msr_misc_features_enables;
701
702 u64 mcg_cap;
703 u64 mcg_status;
704 u64 mcg_ctl;
705 u64 mcg_ext_ctl;
706 u64 *mce_banks;
707
708 /* Cache MMIO info */
709 u64 mmio_gva;
710 unsigned mmio_access;
711 gfn_t mmio_gfn;
712 u64 mmio_gen;
713
714 struct kvm_pmu pmu;
715
716 /* used for guest single stepping over the given code position */
717 unsigned long singlestep_rip;
718
719 struct kvm_vcpu_hv hyperv;
720
721 cpumask_var_t wbinvd_dirty_mask;
722
723 unsigned long last_retry_eip;
724 unsigned long last_retry_addr;
725
726 struct {
727 bool halted;
728 gfn_t gfns[ASYNC_PF_PER_VCPU];
729 struct gfn_to_hva_cache data;
730 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
731 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
732 u16 vec;
733 u32 id;
734 bool send_user_only;
735 u32 host_apf_flags;
736 unsigned long nested_apf_token;
737 bool delivery_as_pf_vmexit;
738 bool pageready_pending;
739 } apf;
740
741 /* OSVW MSRs (AMD only) */
742 struct {
743 u64 length;
744 u64 status;
745 } osvw;
746
747 struct {
748 u64 msr_val;
749 struct gfn_to_hva_cache data;
750 } pv_eoi;
751
752 u64 msr_kvm_poll_control;
753
754 /*
755 * Indicates the guest is trying to write a gfn that contains one or
756 * more of the PTEs used to translate the write itself, i.e. the access
757 * is changing its own translation in the guest page tables. KVM exits
758 * to userspace if emulation of the faulting instruction fails and this
759 * flag is set, as KVM cannot make forward progress.
760 *
761 * If emulation fails for a write to guest page tables, KVM unprotects
762 * (zaps) the shadow page for the target gfn and resumes the guest to
763 * retry the non-emulatable instruction (on hardware). Unprotecting the
764 * gfn doesn't allow forward progress for a self-changing access because
765 * doing so also zaps the translation for the gfn, i.e. retrying the
766 * instruction will hit a !PRESENT fault, which results in a new shadow
767 * page and sends KVM back to square one.
768 */
769 bool write_fault_to_shadow_pgtable;
770
771 /* set at EPT violation at this point */
772 unsigned long exit_qualification;
773
774 /* pv related host specific info */
775 struct {
776 bool pv_unhalted;
777 } pv;
778
779 int pending_ioapic_eoi;
780 int pending_external_vector;
781
782 /* be preempted when it's in kernel-mode(cpl=0) */
783 bool preempted_in_kernel;
784
785 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
786 bool l1tf_flush_l1d;
787
788 /* Host CPU on which VM-entry was most recently attempted */
789 unsigned int last_vmentry_cpu;
790
791 /* AMD MSRC001_0015 Hardware Configuration */
792 u64 msr_hwcr;
793
794 /* pv related cpuid info */
795 struct {
796 /*
797 * value of the eax register in the KVM_CPUID_FEATURES CPUID
798 * leaf.
799 */
800 u32 features;
801
802 /*
803 * indicates whether pv emulation should be disabled if features
804 * are not present in the guest's cpuid
805 */
806 bool enforce;
807 } pv_cpuid;
808 };
809
810 struct kvm_lpage_info {
811 int disallow_lpage;
812 };
813
814 struct kvm_arch_memory_slot {
815 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
816 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
817 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
818 };
819
820 /*
821 * We use as the mode the number of bits allocated in the LDR for the
822 * logical processor ID. It happens that these are all powers of two.
823 * This makes it is very easy to detect cases where the APICs are
824 * configured for multiple modes; in that case, we cannot use the map and
825 * hence cannot use kvm_irq_delivery_to_apic_fast either.
826 */
827 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
828 #define KVM_APIC_MODE_XAPIC_FLAT 8
829 #define KVM_APIC_MODE_X2APIC 16
830
831 struct kvm_apic_map {
832 struct rcu_head rcu;
833 u8 mode;
834 u32 max_apic_id;
835 union {
836 struct kvm_lapic *xapic_flat_map[8];
837 struct kvm_lapic *xapic_cluster_map[16][4];
838 };
839 struct kvm_lapic *phys_map[];
840 };
841
842 /* Hyper-V synthetic debugger (SynDbg)*/
843 struct kvm_hv_syndbg {
844 struct {
845 u64 control;
846 u64 status;
847 u64 send_page;
848 u64 recv_page;
849 u64 pending_page;
850 } control;
851 u64 options;
852 };
853
854 /* Hyper-V emulation context */
855 struct kvm_hv {
856 struct mutex hv_lock;
857 u64 hv_guest_os_id;
858 u64 hv_hypercall;
859 u64 hv_tsc_page;
860
861 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
862 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
863 u64 hv_crash_ctl;
864
865 struct ms_hyperv_tsc_page tsc_ref;
866
867 struct idr conn_to_evt;
868
869 u64 hv_reenlightenment_control;
870 u64 hv_tsc_emulation_control;
871 u64 hv_tsc_emulation_status;
872
873 /* How many vCPUs have VP index != vCPU index */
874 atomic_t num_mismatched_vp_indexes;
875
876 struct hv_partition_assist_pg *hv_pa_pg;
877 struct kvm_hv_syndbg hv_syndbg;
878 };
879
880 struct msr_bitmap_range {
881 u32 flags;
882 u32 nmsrs;
883 u32 base;
884 unsigned long *bitmap;
885 };
886
887 enum kvm_irqchip_mode {
888 KVM_IRQCHIP_NONE,
889 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
890 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
891 };
892
893 struct kvm_x86_msr_filter {
894 u8 count;
895 bool default_allow:1;
896 struct msr_bitmap_range ranges[16];
897 };
898
899 #define APICV_INHIBIT_REASON_DISABLE 0
900 #define APICV_INHIBIT_REASON_HYPERV 1
901 #define APICV_INHIBIT_REASON_NESTED 2
902 #define APICV_INHIBIT_REASON_IRQWIN 3
903 #define APICV_INHIBIT_REASON_PIT_REINJ 4
904 #define APICV_INHIBIT_REASON_X2APIC 5
905
906 struct kvm_arch {
907 unsigned long n_used_mmu_pages;
908 unsigned long n_requested_mmu_pages;
909 unsigned long n_max_mmu_pages;
910 unsigned int indirect_shadow_pages;
911 u8 mmu_valid_gen;
912 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
913 /*
914 * Hash table of struct kvm_mmu_page.
915 */
916 struct list_head active_mmu_pages;
917 struct list_head zapped_obsolete_pages;
918 struct list_head lpage_disallowed_mmu_pages;
919 struct kvm_page_track_notifier_node mmu_sp_tracker;
920 struct kvm_page_track_notifier_head track_notifier_head;
921
922 struct list_head assigned_dev_head;
923 struct iommu_domain *iommu_domain;
924 bool iommu_noncoherent;
925 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
926 atomic_t noncoherent_dma_count;
927 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
928 atomic_t assigned_device_count;
929 struct kvm_pic *vpic;
930 struct kvm_ioapic *vioapic;
931 struct kvm_pit *vpit;
932 atomic_t vapics_in_nmi_mode;
933 struct mutex apic_map_lock;
934 struct kvm_apic_map *apic_map;
935 atomic_t apic_map_dirty;
936
937 bool apic_access_page_done;
938 unsigned long apicv_inhibit_reasons;
939
940 gpa_t wall_clock;
941
942 bool mwait_in_guest;
943 bool hlt_in_guest;
944 bool pause_in_guest;
945 bool cstate_in_guest;
946
947 unsigned long irq_sources_bitmap;
948 s64 kvmclock_offset;
949 raw_spinlock_t tsc_write_lock;
950 u64 last_tsc_nsec;
951 u64 last_tsc_write;
952 u32 last_tsc_khz;
953 u64 cur_tsc_nsec;
954 u64 cur_tsc_write;
955 u64 cur_tsc_offset;
956 u64 cur_tsc_generation;
957 int nr_vcpus_matched_tsc;
958
959 spinlock_t pvclock_gtod_sync_lock;
960 bool use_master_clock;
961 u64 master_kernel_ns;
962 u64 master_cycle_now;
963 struct delayed_work kvmclock_update_work;
964 struct delayed_work kvmclock_sync_work;
965
966 struct kvm_xen_hvm_config xen_hvm_config;
967
968 /* reads protected by irq_srcu, writes by irq_lock */
969 struct hlist_head mask_notifier_list;
970
971 struct kvm_hv hyperv;
972
973 #ifdef CONFIG_KVM_MMU_AUDIT
974 int audit_point;
975 #endif
976
977 bool backwards_tsc_observed;
978 bool boot_vcpu_runs_old_kvmclock;
979 u32 bsp_vcpu_id;
980
981 u64 disabled_quirks;
982
983 enum kvm_irqchip_mode irqchip_mode;
984 u8 nr_reserved_ioapic_pins;
985
986 bool disabled_lapic_found;
987
988 bool x2apic_format;
989 bool x2apic_broadcast_quirk_disabled;
990
991 bool guest_can_read_msr_platform_info;
992 bool exception_payload_enabled;
993
994 bool bus_lock_detection_enabled;
995
996 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
997 u32 user_space_msr_mask;
998
999 struct kvm_x86_msr_filter __rcu *msr_filter;
1000
1001 struct kvm_pmu_event_filter *pmu_event_filter;
1002 struct task_struct *nx_lpage_recovery_thread;
1003
1004 /*
1005 * Whether the TDP MMU is enabled for this VM. This contains a
1006 * snapshot of the TDP MMU module parameter from when the VM was
1007 * created and remains unchanged for the life of the VM. If this is
1008 * true, TDP MMU handler functions will run for various MMU
1009 * operations.
1010 */
1011 bool tdp_mmu_enabled;
1012
1013 /* List of struct tdp_mmu_pages being used as roots */
1014 struct list_head tdp_mmu_roots;
1015 /* List of struct tdp_mmu_pages not being used as roots */
1016 struct list_head tdp_mmu_pages;
1017 };
1018
1019 struct kvm_vm_stat {
1020 ulong mmu_shadow_zapped;
1021 ulong mmu_pte_write;
1022 ulong mmu_pde_zapped;
1023 ulong mmu_flooded;
1024 ulong mmu_recycled;
1025 ulong mmu_cache_miss;
1026 ulong mmu_unsync;
1027 ulong remote_tlb_flush;
1028 ulong lpages;
1029 ulong nx_lpage_splits;
1030 ulong max_mmu_page_hash_collisions;
1031 };
1032
1033 struct kvm_vcpu_stat {
1034 u64 pf_fixed;
1035 u64 pf_guest;
1036 u64 tlb_flush;
1037 u64 invlpg;
1038
1039 u64 exits;
1040 u64 io_exits;
1041 u64 mmio_exits;
1042 u64 signal_exits;
1043 u64 irq_window_exits;
1044 u64 nmi_window_exits;
1045 u64 l1d_flush;
1046 u64 halt_exits;
1047 u64 halt_successful_poll;
1048 u64 halt_attempted_poll;
1049 u64 halt_poll_invalid;
1050 u64 halt_wakeup;
1051 u64 request_irq_exits;
1052 u64 irq_exits;
1053 u64 host_state_reload;
1054 u64 fpu_reload;
1055 u64 insn_emulation;
1056 u64 insn_emulation_fail;
1057 u64 hypercalls;
1058 u64 irq_injections;
1059 u64 nmi_injections;
1060 u64 req_event;
1061 u64 halt_poll_success_ns;
1062 u64 halt_poll_fail_ns;
1063 u64 preemption_reported;
1064 u64 preemption_other;
1065 };
1066
1067 struct x86_instruction_info;
1068
1069 struct msr_data {
1070 bool host_initiated;
1071 u32 index;
1072 u64 data;
1073 };
1074
1075 struct kvm_lapic_irq {
1076 u32 vector;
1077 u16 delivery_mode;
1078 u16 dest_mode;
1079 bool level;
1080 u16 trig_mode;
1081 u32 shorthand;
1082 u32 dest_id;
1083 bool msi_redir_hint;
1084 };
1085
kvm_lapic_irq_dest_mode(bool dest_mode_logical)1086 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1087 {
1088 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1089 }
1090
1091 struct kvm_x86_ops {
1092 int (*hardware_enable)(void);
1093 void (*hardware_disable)(void);
1094 void (*hardware_unsetup)(void);
1095 bool (*cpu_has_accelerated_tpr)(void);
1096 bool (*has_emulated_msr)(u32 index);
1097 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1098
1099 unsigned int vm_size;
1100 int (*vm_init)(struct kvm *kvm);
1101 void (*vm_destroy)(struct kvm *kvm);
1102
1103 /* Create, but do not attach this VCPU */
1104 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1105 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1106 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1107
1108 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1109 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1110 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1111
1112 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1113 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1114 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1115 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1116 void (*get_segment)(struct kvm_vcpu *vcpu,
1117 struct kvm_segment *var, int seg);
1118 int (*get_cpl)(struct kvm_vcpu *vcpu);
1119 void (*set_segment)(struct kvm_vcpu *vcpu,
1120 struct kvm_segment *var, int seg);
1121 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1122 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1123 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1124 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1125 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1126 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1127 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1128 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1129 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1130 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1131 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1132 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1133 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1134
1135 void (*tlb_flush_all)(struct kvm_vcpu *vcpu);
1136 void (*tlb_flush_current)(struct kvm_vcpu *vcpu);
1137 int (*tlb_remote_flush)(struct kvm *kvm);
1138 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1139 struct kvm_tlb_range *range);
1140
1141 /*
1142 * Flush any TLB entries associated with the given GVA.
1143 * Does not need to flush GPA->HPA mappings.
1144 * Can potentially get non-canonical addresses through INVLPGs, which
1145 * the implementation may choose to ignore if appropriate.
1146 */
1147 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1148
1149 /*
1150 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1151 * does not need to flush GPA->HPA mappings.
1152 */
1153 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu);
1154
1155 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu);
1156 int (*handle_exit)(struct kvm_vcpu *vcpu,
1157 enum exit_fastpath_completion exit_fastpath);
1158 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1159 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1160 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1161 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1162 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1163 unsigned char *hypercall_addr);
1164 void (*set_irq)(struct kvm_vcpu *vcpu);
1165 void (*set_nmi)(struct kvm_vcpu *vcpu);
1166 void (*queue_exception)(struct kvm_vcpu *vcpu);
1167 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1168 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1169 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1170 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1171 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1172 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1173 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1174 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1175 bool (*check_apicv_inhibit_reasons)(ulong bit);
1176 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate);
1177 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1178 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1179 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1180 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1181 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1182 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1183 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1184 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1185 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1186 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1187 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1188 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1189
1190 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd,
1191 int pgd_level);
1192
1193 bool (*has_wbinvd_exit)(void);
1194
1195 /* Returns actual tsc_offset set in active VMCS */
1196 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1197
1198 /*
1199 * Retrieve somewhat arbitrary exit information. Intended to be used
1200 * only from within tracepoints to avoid VMREADs when tracing is off.
1201 */
1202 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2,
1203 u32 *exit_int_info, u32 *exit_int_info_err_code);
1204
1205 int (*check_intercept)(struct kvm_vcpu *vcpu,
1206 struct x86_instruction_info *info,
1207 enum x86_intercept_stage stage,
1208 struct x86_exception *exception);
1209 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1210
1211 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1212
1213 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1214
1215 /*
1216 * Arch-specific dirty logging hooks. These hooks are only supposed to
1217 * be valid if the specific arch has hardware-accelerated dirty logging
1218 * mechanism. Currently only for PML on VMX.
1219 *
1220 * - slot_enable_log_dirty:
1221 * called when enabling log dirty mode for the slot.
1222 * - slot_disable_log_dirty:
1223 * called when disabling log dirty mode for the slot.
1224 * also called when slot is created with log dirty disabled.
1225 * - flush_log_dirty:
1226 * called before reporting dirty_bitmap to userspace.
1227 * - enable_log_dirty_pt_masked:
1228 * called when reenabling log dirty for the GFNs in the mask after
1229 * corresponding bits are cleared in slot->dirty_bitmap.
1230 */
1231 void (*slot_enable_log_dirty)(struct kvm *kvm,
1232 struct kvm_memory_slot *slot);
1233 void (*slot_disable_log_dirty)(struct kvm *kvm,
1234 struct kvm_memory_slot *slot);
1235 void (*flush_log_dirty)(struct kvm *kvm);
1236 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1237 struct kvm_memory_slot *slot,
1238 gfn_t offset, unsigned long mask);
1239
1240 /* pmu operations of sub-arch */
1241 const struct kvm_pmu_ops *pmu_ops;
1242 const struct kvm_x86_nested_ops *nested_ops;
1243
1244 /*
1245 * Architecture specific hooks for vCPU blocking due to
1246 * HLT instruction.
1247 * Returns for .pre_block():
1248 * - 0 means continue to block the vCPU.
1249 * - 1 means we cannot block the vCPU since some event
1250 * happens during this period, such as, 'ON' bit in
1251 * posted-interrupts descriptor is set.
1252 */
1253 int (*pre_block)(struct kvm_vcpu *vcpu);
1254 void (*post_block)(struct kvm_vcpu *vcpu);
1255
1256 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1257 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1258
1259 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1260 uint32_t guest_irq, bool set);
1261 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1262 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1263
1264 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1265 bool *expired);
1266 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1267
1268 void (*setup_mce)(struct kvm_vcpu *vcpu);
1269
1270 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1271 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1272 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1273 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1274
1275 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1276 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1277 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1278
1279 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1280
1281 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len);
1282
1283 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1284 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1285
1286 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1287 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1288 };
1289
1290 struct kvm_x86_nested_ops {
1291 void (*leave_nested)(struct kvm_vcpu *vcpu);
1292 int (*check_events)(struct kvm_vcpu *vcpu);
1293 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);
1294 int (*get_state)(struct kvm_vcpu *vcpu,
1295 struct kvm_nested_state __user *user_kvm_nested_state,
1296 unsigned user_data_size);
1297 int (*set_state)(struct kvm_vcpu *vcpu,
1298 struct kvm_nested_state __user *user_kvm_nested_state,
1299 struct kvm_nested_state *kvm_state);
1300 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1301 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1302
1303 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1304 uint16_t *vmcs_version);
1305 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1306 };
1307
1308 struct kvm_x86_init_ops {
1309 int (*cpu_has_kvm_support)(void);
1310 int (*disabled_by_bios)(void);
1311 int (*check_processor_compatibility)(void);
1312 int (*hardware_setup)(void);
1313 bool (*intel_pt_intr_in_guest)(void);
1314
1315 struct kvm_x86_ops *runtime_ops;
1316 };
1317
1318 struct kvm_arch_async_pf {
1319 u32 token;
1320 gfn_t gfn;
1321 unsigned long cr3;
1322 bool direct_map;
1323 };
1324
1325 extern u64 __read_mostly host_efer;
1326 extern bool __read_mostly allow_smaller_maxphyaddr;
1327 extern struct kvm_x86_ops kvm_x86_ops;
1328
1329 #define __KVM_HAVE_ARCH_VM_ALLOC
kvm_arch_alloc_vm(void)1330 static inline struct kvm *kvm_arch_alloc_vm(void)
1331 {
1332 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1333 }
1334 void kvm_arch_free_vm(struct kvm *kvm);
1335
1336 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
kvm_arch_flush_remote_tlb(struct kvm * kvm)1337 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1338 {
1339 if (kvm_x86_ops.tlb_remote_flush &&
1340 !kvm_x86_ops.tlb_remote_flush(kvm))
1341 return 0;
1342 else
1343 return -ENOTSUPP;
1344 }
1345
1346 int kvm_mmu_module_init(void);
1347 void kvm_mmu_module_exit(void);
1348
1349 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1350 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1351 void kvm_mmu_init_vm(struct kvm *kvm);
1352 void kvm_mmu_uninit_vm(struct kvm *kvm);
1353 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1354 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1355 u64 acc_track_mask, u64 me_mask);
1356
1357 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1358 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1359 struct kvm_memory_slot *memslot,
1360 int start_level);
1361 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1362 const struct kvm_memory_slot *memslot);
1363 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1364 struct kvm_memory_slot *memslot);
1365 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1366 struct kvm_memory_slot *memslot);
1367 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1368 struct kvm_memory_slot *memslot);
1369 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1370 struct kvm_memory_slot *slot,
1371 gfn_t gfn_offset, unsigned long mask);
1372 void kvm_mmu_zap_all(struct kvm *kvm);
1373 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1374 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1375 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1376
1377 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1378 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1379
1380 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1381 const void *val, int bytes);
1382
1383 struct kvm_irq_mask_notifier {
1384 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1385 int irq;
1386 struct hlist_node link;
1387 };
1388
1389 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1390 struct kvm_irq_mask_notifier *kimn);
1391 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1392 struct kvm_irq_mask_notifier *kimn);
1393 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1394 bool mask);
1395
1396 extern bool tdp_enabled;
1397
1398 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1399
1400 /* control of guest tsc rate supported? */
1401 extern bool kvm_has_tsc_control;
1402 /* maximum supported tsc_khz for guests */
1403 extern u32 kvm_max_guest_tsc_khz;
1404 /* number of bits of the fractional part of the TSC scaling ratio */
1405 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1406 /* maximum allowed value of TSC scaling ratio */
1407 extern u64 kvm_max_tsc_scaling_ratio;
1408 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1409 extern u64 kvm_default_tsc_scaling_ratio;
1410
1411 extern u64 kvm_mce_cap_supported;
1412
1413 /*
1414 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1415 * userspace I/O) to indicate that the emulation context
1416 * should be resued as is, i.e. skip initialization of
1417 * emulation context, instruction fetch and decode.
1418 *
1419 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1420 * Indicates that only select instructions (tagged with
1421 * EmulateOnUD) should be emulated (to minimize the emulator
1422 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1423 *
1424 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1425 * decode the instruction length. For use *only* by
1426 * kvm_x86_ops.skip_emulated_instruction() implementations.
1427 *
1428 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1429 * retry native execution under certain conditions,
1430 * Can only be set in conjunction with EMULTYPE_PF.
1431 *
1432 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1433 * triggered by KVM's magic "force emulation" prefix,
1434 * which is opt in via module param (off by default).
1435 * Bypasses EmulateOnUD restriction despite emulating
1436 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1437 * Used to test the full emulator from userspace.
1438 *
1439 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1440 * backdoor emulation, which is opt in via module param.
1441 * VMware backoor emulation handles select instructions
1442 * and reinjects the #GP for all other cases.
1443 *
1444 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1445 * case the CR2/GPA value pass on the stack is valid.
1446 */
1447 #define EMULTYPE_NO_DECODE (1 << 0)
1448 #define EMULTYPE_TRAP_UD (1 << 1)
1449 #define EMULTYPE_SKIP (1 << 2)
1450 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1451 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1452 #define EMULTYPE_VMWARE_GP (1 << 5)
1453 #define EMULTYPE_PF (1 << 6)
1454
1455 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1456 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1457 void *insn, int insn_len);
1458
1459 void kvm_enable_efer_bits(u64);
1460 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1461 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1462 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1463 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1464 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1465 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1466
1467 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1468 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1469 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1470 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1471 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1472
1473 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1474 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1475 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1476
1477 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1478 int reason, bool has_error_code, u32 error_code);
1479
1480 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1481 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1482 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1483 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1484 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1485 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1486 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1487 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1488 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1489 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1490
1491 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1492 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1493
1494 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1495 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1496 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1497
1498 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1499 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1500 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1501 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1502 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1503 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1504 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1505 struct x86_exception *fault);
1506 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1507 gfn_t gfn, void *data, int offset, int len,
1508 u32 access);
1509 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1510 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1511
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)1512 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1513 int irq_source_id, int level)
1514 {
1515 /* Logical OR for level trig interrupt */
1516 if (level)
1517 __set_bit(irq_source_id, irq_state);
1518 else
1519 __clear_bit(irq_source_id, irq_state);
1520
1521 return !!(*irq_state);
1522 }
1523
1524 #define KVM_MMU_ROOT_CURRENT BIT(0)
1525 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1526 #define KVM_MMU_ROOTS_ALL (~0UL)
1527
1528 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1529 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1530
1531 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1532
1533 void kvm_update_dr7(struct kvm_vcpu *vcpu);
1534
1535 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1536 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1537 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1538 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1539 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1540 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1541 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1542 ulong roots_to_free);
1543 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1544 struct x86_exception *exception);
1545 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1546 struct x86_exception *exception);
1547 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1548 struct x86_exception *exception);
1549 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1550 struct x86_exception *exception);
1551 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1552 struct x86_exception *exception);
1553
1554 bool kvm_apicv_activated(struct kvm *kvm);
1555 void kvm_apicv_init(struct kvm *kvm, bool enable);
1556 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1557 void kvm_request_apicv_update(struct kvm *kvm, bool activate,
1558 unsigned long bit);
1559
1560 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1561
1562 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1563 void *insn, int insn_len);
1564 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1565 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1566 gva_t gva, hpa_t root_hpa);
1567 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1568 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush,
1569 bool skip_mmu_sync);
1570
1571 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level,
1572 int tdp_huge_page_level);
1573
kvm_read_ldt(void)1574 static inline u16 kvm_read_ldt(void)
1575 {
1576 u16 ldt;
1577 asm("sldt %0" : "=g"(ldt));
1578 return ldt;
1579 }
1580
kvm_load_ldt(u16 sel)1581 static inline void kvm_load_ldt(u16 sel)
1582 {
1583 asm("lldt %0" : : "rm"(sel));
1584 }
1585
1586 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)1587 static inline unsigned long read_msr(unsigned long msr)
1588 {
1589 u64 value;
1590
1591 rdmsrl(msr, value);
1592 return value;
1593 }
1594 #endif
1595
get_rdx_init_val(void)1596 static inline u32 get_rdx_init_val(void)
1597 {
1598 return 0x600; /* P6 family */
1599 }
1600
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)1601 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1602 {
1603 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1604 }
1605
1606 #define TSS_IOPB_BASE_OFFSET 0x66
1607 #define TSS_BASE_SIZE 0x68
1608 #define TSS_IOPB_SIZE (65536 / 8)
1609 #define TSS_REDIRECTION_SIZE (256 / 8)
1610 #define RMODE_TSS_SIZE \
1611 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1612
1613 enum {
1614 TASK_SWITCH_CALL = 0,
1615 TASK_SWITCH_IRET = 1,
1616 TASK_SWITCH_JMP = 2,
1617 TASK_SWITCH_GATE = 3,
1618 };
1619
1620 #define HF_GIF_MASK (1 << 0)
1621 #define HF_NMI_MASK (1 << 3)
1622 #define HF_IRET_MASK (1 << 4)
1623 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1624 #define HF_SMM_MASK (1 << 6)
1625 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1626
1627 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1628 #define KVM_ADDRESS_SPACE_NUM 2
1629
1630 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1631 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1632
1633 asmlinkage void kvm_spurious_fault(void);
1634
1635 /*
1636 * Hardware virtualization extension instructions may fault if a
1637 * reboot turns off virtualization while processes are running.
1638 * Usually after catching the fault we just panic; during reboot
1639 * instead the instruction is ignored.
1640 */
1641 #define __kvm_handle_fault_on_reboot(insn) \
1642 "666: \n\t" \
1643 insn "\n\t" \
1644 "jmp 668f \n\t" \
1645 "667: \n\t" \
1646 "1: \n\t" \
1647 ".pushsection .discard.instr_begin \n\t" \
1648 ".long 1b - . \n\t" \
1649 ".popsection \n\t" \
1650 "call kvm_spurious_fault \n\t" \
1651 "1: \n\t" \
1652 ".pushsection .discard.instr_end \n\t" \
1653 ".long 1b - . \n\t" \
1654 ".popsection \n\t" \
1655 "668: \n\t" \
1656 _ASM_EXTABLE(666b, 667b)
1657
1658 #define KVM_ARCH_WANT_MMU_NOTIFIER
1659 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
1660 unsigned flags);
1661 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1662 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1663 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1664 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1665 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1666 int kvm_cpu_has_extint(struct kvm_vcpu *v);
1667 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1668 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1669 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1670 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1671
1672 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1673 unsigned long ipi_bitmap_high, u32 min,
1674 unsigned long icr, int op_64_bit);
1675
1676 void kvm_define_user_return_msr(unsigned index, u32 msr);
1677 int kvm_probe_user_return_msr(u32 msr);
1678 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
1679
1680 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1681 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1682
1683 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1684 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1685
1686 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1687 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1688 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
1689 unsigned long *vcpu_bitmap);
1690
1691 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1692 struct kvm_async_pf *work);
1693 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1694 struct kvm_async_pf *work);
1695 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1696 struct kvm_async_pf *work);
1697 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
1698 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
1699 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1700
1701 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1703 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1704
1705 int kvm_is_in_guest(void);
1706
1707 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1708 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1709 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1710
1711 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1712 struct kvm_vcpu **dest_vcpu);
1713
1714 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1715 struct kvm_lapic_irq *irq);
1716
kvm_irq_is_postable(struct kvm_lapic_irq * irq)1717 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1718 {
1719 /* We can only post Fixed and LowPrio IRQs */
1720 return (irq->delivery_mode == APIC_DM_FIXED ||
1721 irq->delivery_mode == APIC_DM_LOWEST);
1722 }
1723
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)1724 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1725 {
1726 if (kvm_x86_ops.vcpu_blocking)
1727 kvm_x86_ops.vcpu_blocking(vcpu);
1728 }
1729
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)1730 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1731 {
1732 if (kvm_x86_ops.vcpu_unblocking)
1733 kvm_x86_ops.vcpu_unblocking(vcpu);
1734 }
1735
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)1736 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1737
kvm_cpu_get_apicid(int mps_cpu)1738 static inline int kvm_cpu_get_apicid(int mps_cpu)
1739 {
1740 #ifdef CONFIG_X86_LOCAL_APIC
1741 return default_cpu_present_to_apicid(mps_cpu);
1742 #else
1743 WARN_ON_ONCE(1);
1744 return BAD_APICID;
1745 #endif
1746 }
1747
1748 #define put_smstate(type, buf, offset, val) \
1749 *(type *)((buf) + (offset) - 0x7e00) = val
1750
1751 #define GET_SMSTATE(type, buf, offset) \
1752 (*(type *)((buf) + (offset) - 0x7e00))
1753
1754 #endif /* _ASM_X86_KVM_HOST_H */
1755