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1 #include "zink_compiler.h"
2 #include "zink_context.h"
3 #include "zink_program.h"
4 #include "zink_query.h"
5 #include "zink_resource.h"
6 #include "zink_screen.h"
7 #include "zink_state.h"
8 #include "zink_surface.h"
9 #include "zink_inlines.h"
10 
11 #include "tgsi/tgsi_from_mesa.h"
12 #include "util/hash_table.h"
13 #include "util/u_debug.h"
14 #include "util/u_helpers.h"
15 #include "util/u_inlines.h"
16 #include "util/u_prim.h"
17 #include "util/u_prim_restart.h"
18 
19 
20 static void
zink_emit_xfb_counter_barrier(struct zink_context * ctx)21 zink_emit_xfb_counter_barrier(struct zink_context *ctx)
22 {
23    /* Between the pause and resume there needs to be a memory barrier for the counter buffers
24     * with a source access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT
25     * at pipeline stage VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT
26     * to a destination access of VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT
27     * at pipeline stage VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT.
28     *
29     * - from VK_EXT_transform_feedback spec
30     */
31    for (unsigned i = 0; i < ctx->num_so_targets; i++) {
32       struct zink_so_target *t = zink_so_target(ctx->so_targets[i]);
33       if (!t)
34          continue;
35       struct zink_resource *res = zink_resource(t->counter_buffer);
36       if (t->counter_buffer_valid)
37           zink_resource_buffer_barrier(ctx, res, VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT,
38                                        VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT);
39       else
40           zink_resource_buffer_barrier(ctx, res, VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT,
41                                        VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT);
42    }
43    ctx->xfb_barrier = false;
44 }
45 
46 static void
zink_emit_xfb_vertex_input_barrier(struct zink_context * ctx,struct zink_resource * res)47 zink_emit_xfb_vertex_input_barrier(struct zink_context *ctx, struct zink_resource *res)
48 {
49    /* A pipeline barrier is required between using the buffers as
50     * transform feedback buffers and vertex buffers to
51     * ensure all writes to the transform feedback buffers are visible
52     * when the data is read as vertex attributes.
53     * The source access is VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT
54     * and the destination access is VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT
55     * for the pipeline stages VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT
56     * and VK_PIPELINE_STAGE_VERTEX_INPUT_BIT respectively.
57     *
58     * - 20.3.1. Drawing Transform Feedback
59     */
60    zink_resource_buffer_barrier(ctx, res, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
61                                 VK_PIPELINE_STAGE_VERTEX_INPUT_BIT);
62 }
63 
64 static void
zink_emit_stream_output_targets(struct pipe_context * pctx)65 zink_emit_stream_output_targets(struct pipe_context *pctx)
66 {
67    struct zink_context *ctx = zink_context(pctx);
68    struct zink_batch *batch = &ctx->batch;
69    VkBuffer buffers[PIPE_MAX_SO_OUTPUTS] = {0};
70    VkDeviceSize buffer_offsets[PIPE_MAX_SO_OUTPUTS] = {0};
71    VkDeviceSize buffer_sizes[PIPE_MAX_SO_OUTPUTS] = {0};
72 
73    for (unsigned i = 0; i < ctx->num_so_targets; i++) {
74       struct zink_so_target *t = (struct zink_so_target *)ctx->so_targets[i];
75       if (!t) {
76          /* no need to reference this or anything */
77          buffers[i] = zink_resource(ctx->dummy_xfb_buffer)->obj->buffer;
78          buffer_offsets[i] = 0;
79          buffer_sizes[i] = sizeof(uint8_t);
80          continue;
81       }
82       struct zink_resource *res = zink_resource(t->base.buffer);
83       if (!res->so_valid)
84          /* resource has been rebound */
85          t->counter_buffer_valid = false;
86       buffers[i] = res->obj->buffer;
87       zink_batch_reference_resource_rw(batch, res, true);
88       buffer_offsets[i] = t->base.buffer_offset;
89       buffer_sizes[i] = t->base.buffer_size;
90       res->so_valid = true;
91       util_range_add(t->base.buffer, &res->valid_buffer_range, t->base.buffer_offset,
92                      t->base.buffer_offset + t->base.buffer_size);
93    }
94 
95    VKCTX(CmdBindTransformFeedbackBuffersEXT)(batch->state->cmdbuf, 0, ctx->num_so_targets,
96                                                  buffers, buffer_offsets,
97                                                  buffer_sizes);
98    ctx->dirty_so_targets = false;
99 }
100 
101 ALWAYS_INLINE static void
check_buffer_barrier(struct zink_context * ctx,struct pipe_resource * pres,VkAccessFlags flags,VkPipelineStageFlags pipeline)102 check_buffer_barrier(struct zink_context *ctx, struct pipe_resource *pres, VkAccessFlags flags, VkPipelineStageFlags pipeline)
103 {
104    struct zink_resource *res = zink_resource(pres);
105    zink_resource_buffer_barrier(ctx, res, flags, pipeline);
106 }
107 
108 ALWAYS_INLINE static void
barrier_draw_buffers(struct zink_context * ctx,const struct pipe_draw_info * dinfo,const struct pipe_draw_indirect_info * dindirect,struct pipe_resource * index_buffer)109 barrier_draw_buffers(struct zink_context *ctx, const struct pipe_draw_info *dinfo,
110                      const struct pipe_draw_indirect_info *dindirect, struct pipe_resource *index_buffer)
111 {
112    if (index_buffer)
113       check_buffer_barrier(ctx, index_buffer, VK_ACCESS_INDEX_READ_BIT, VK_PIPELINE_STAGE_VERTEX_INPUT_BIT);
114    if (dindirect && dindirect->buffer) {
115       check_buffer_barrier(ctx, dindirect->buffer,
116                            VK_ACCESS_INDIRECT_COMMAND_READ_BIT, VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT);
117       if (dindirect->indirect_draw_count)
118          check_buffer_barrier(ctx, dindirect->indirect_draw_count,
119                               VK_ACCESS_INDIRECT_COMMAND_READ_BIT, VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT);
120    }
121 }
122 
123 template <zink_dynamic_state HAS_DYNAMIC_STATE, zink_dynamic_vertex_input HAS_VERTEX_INPUT>
124 static void
zink_bind_vertex_buffers(struct zink_batch * batch,struct zink_context * ctx)125 zink_bind_vertex_buffers(struct zink_batch *batch, struct zink_context *ctx)
126 {
127    VkBuffer buffers[PIPE_MAX_ATTRIBS];
128    VkDeviceSize buffer_offsets[PIPE_MAX_ATTRIBS];
129    VkDeviceSize buffer_strides[PIPE_MAX_ATTRIBS];
130    struct zink_vertex_elements_state *elems = ctx->element_state;
131    struct zink_screen *screen = zink_screen(ctx->base.screen);
132 
133    if (!elems->hw_state.num_bindings)
134       return;
135 
136    for (unsigned i = 0; i < elems->hw_state.num_bindings; i++) {
137       const unsigned buffer_id = ctx->element_state->binding_map[i];
138       struct pipe_vertex_buffer *vb = ctx->vertex_buffers + buffer_id;
139       assert(vb);
140       if (vb->buffer.resource) {
141          buffers[i] = ctx->vbufs[buffer_id];
142          assert(buffers[i]);
143          if (HAS_VERTEX_INPUT)
144             elems->hw_state.dynbindings[i].stride = vb->stride;
145          buffer_offsets[i] = ctx->vbuf_offsets[buffer_id];
146          buffer_strides[i] = vb->stride;
147          zink_batch_resource_usage_set(&ctx->batch, zink_resource(vb->buffer.resource), false);
148       } else {
149          buffers[i] = zink_resource(ctx->dummy_vertex_buffer)->obj->buffer;
150          buffer_offsets[i] = 0;
151          buffer_strides[i] = 0;
152          if (HAS_VERTEX_INPUT)
153             elems->hw_state.dynbindings[i].stride = 0;
154       }
155    }
156 
157    if (HAS_DYNAMIC_STATE && !HAS_VERTEX_INPUT)
158       VKCTX(CmdBindVertexBuffers2EXT)(batch->state->cmdbuf, 0,
159                                           elems->hw_state.num_bindings,
160                                           buffers, buffer_offsets, NULL, buffer_strides);
161    else
162       VKSCR(CmdBindVertexBuffers)(batch->state->cmdbuf, 0,
163                              elems->hw_state.num_bindings,
164                              buffers, buffer_offsets);
165 
166    if (HAS_VERTEX_INPUT)
167       VKCTX(CmdSetVertexInputEXT)(batch->state->cmdbuf,
168                                       elems->hw_state.num_bindings, elems->hw_state.dynbindings,
169                                       elems->hw_state.num_attribs, elems->hw_state.dynattribs);
170 
171    ctx->vertex_buffers_dirty = false;
172 }
173 
174 static void
update_gfx_program(struct zink_context * ctx)175 update_gfx_program(struct zink_context *ctx)
176 {
177    if (ctx->last_vertex_stage_dirty) {
178       enum pipe_shader_type pstage = pipe_shader_type_from_mesa(ctx->last_vertex_stage->nir->info.stage);
179       ctx->dirty_shader_stages |= BITFIELD_BIT(pstage);
180       memcpy(&ctx->gfx_pipeline_state.shader_keys.key[pstage].key.vs_base,
181              &ctx->gfx_pipeline_state.shader_keys.last_vertex.key.vs_base,
182              sizeof(struct zink_vs_key_base));
183       ctx->last_vertex_stage_dirty = false;
184    }
185    unsigned bits = BITFIELD_MASK(PIPE_SHADER_COMPUTE);
186    if (ctx->gfx_dirty) {
187       struct zink_gfx_program *prog = NULL;
188 
189       struct hash_table *ht = &ctx->program_cache[ctx->shader_stages >> 2];
190       const uint32_t hash = ctx->gfx_hash;
191       struct hash_entry *entry = _mesa_hash_table_search_pre_hashed(ht, hash, ctx->gfx_stages);
192       if (entry) {
193          prog = (struct zink_gfx_program*)entry->data;
194          u_foreach_bit(stage, prog->stages_present & ~ctx->dirty_shader_stages)
195             ctx->gfx_pipeline_state.modules[stage] = prog->modules[stage]->shader;
196       } else {
197          ctx->dirty_shader_stages |= bits;
198          prog = zink_create_gfx_program(ctx, ctx->gfx_stages, ctx->gfx_pipeline_state.vertices_per_patch + 1);
199          _mesa_hash_table_insert_pre_hashed(ht, hash, prog->shaders, prog);
200       }
201       zink_update_gfx_program(ctx, prog);
202       if (prog && prog != ctx->curr_program)
203          zink_batch_reference_program(&ctx->batch, &prog->base);
204       if (ctx->curr_program)
205          ctx->gfx_pipeline_state.final_hash ^= ctx->curr_program->last_variant_hash;
206       ctx->curr_program = prog;
207       ctx->gfx_pipeline_state.final_hash ^= ctx->curr_program->last_variant_hash;
208       ctx->gfx_dirty = false;
209    } else if (ctx->dirty_shader_stages & bits) {
210       /* remove old hash */
211       ctx->gfx_pipeline_state.final_hash ^= ctx->curr_program->last_variant_hash;
212       zink_update_gfx_program(ctx, ctx->curr_program);
213       /* apply new hash */
214       ctx->gfx_pipeline_state.final_hash ^= ctx->curr_program->last_variant_hash;
215    }
216    ctx->dirty_shader_stages &= ~bits;
217 }
218 
219 static bool
line_width_needed(enum pipe_prim_type reduced_prim,unsigned polygon_mode)220 line_width_needed(enum pipe_prim_type reduced_prim,
221                   unsigned polygon_mode)
222 {
223    switch (reduced_prim) {
224    case PIPE_PRIM_POINTS:
225       return false;
226 
227    case PIPE_PRIM_LINES:
228       return true;
229 
230    case PIPE_PRIM_TRIANGLES:
231       return polygon_mode == VK_POLYGON_MODE_LINE;
232 
233    default:
234       unreachable("unexpected reduced prim");
235    }
236 }
237 
238 ALWAYS_INLINE static void
update_drawid(struct zink_context * ctx,unsigned draw_id)239 update_drawid(struct zink_context *ctx, unsigned draw_id)
240 {
241    VKCTX(CmdPushConstants)(ctx->batch.state->cmdbuf, ctx->curr_program->base.layout, VK_SHADER_STAGE_VERTEX_BIT,
242                       offsetof(struct zink_gfx_push_constant, draw_id), sizeof(unsigned),
243                       &draw_id);
244 }
245 
246 ALWAYS_INLINE static void
draw_indexed_need_index_buffer_unref(struct zink_context * ctx,const struct pipe_draw_info * dinfo,const struct pipe_draw_start_count_bias * draws,unsigned num_draws,unsigned draw_id,bool needs_drawid)247 draw_indexed_need_index_buffer_unref(struct zink_context *ctx,
248              const struct pipe_draw_info *dinfo,
249              const struct pipe_draw_start_count_bias *draws,
250              unsigned num_draws,
251              unsigned draw_id,
252              bool needs_drawid)
253 {
254    VkCommandBuffer cmdbuf = ctx->batch.state->cmdbuf;
255    if (dinfo->increment_draw_id && needs_drawid) {
256       for (unsigned i = 0; i < num_draws; i++) {
257          update_drawid(ctx, draw_id);
258          VKCTX(CmdDrawIndexed)(cmdbuf,
259             draws[i].count, dinfo->instance_count,
260             0, draws[i].index_bias, dinfo->start_instance);
261          draw_id++;
262       }
263    } else {
264       if (needs_drawid)
265          update_drawid(ctx, draw_id);
266       for (unsigned i = 0; i < num_draws; i++)
267          VKCTX(CmdDrawIndexed)(cmdbuf,
268             draws[i].count, dinfo->instance_count,
269             0, draws[i].index_bias, dinfo->start_instance);
270 
271    }
272 }
273 
274 template <zink_multidraw HAS_MULTIDRAW>
275 ALWAYS_INLINE static void
draw_indexed(struct zink_context * ctx,const struct pipe_draw_info * dinfo,const struct pipe_draw_start_count_bias * draws,unsigned num_draws,unsigned draw_id,bool needs_drawid)276 draw_indexed(struct zink_context *ctx,
277              const struct pipe_draw_info *dinfo,
278              const struct pipe_draw_start_count_bias *draws,
279              unsigned num_draws,
280              unsigned draw_id,
281              bool needs_drawid)
282 {
283    VkCommandBuffer cmdbuf = ctx->batch.state->cmdbuf;
284    if (dinfo->increment_draw_id && needs_drawid) {
285       for (unsigned i = 0; i < num_draws; i++) {
286          update_drawid(ctx, draw_id);
287          VKCTX(CmdDrawIndexed)(cmdbuf,
288             draws[i].count, dinfo->instance_count,
289             draws[i].start, draws[i].index_bias, dinfo->start_instance);
290          draw_id++;
291       }
292    } else {
293       if (needs_drawid)
294          update_drawid(ctx, draw_id);
295       if (HAS_MULTIDRAW) {
296          VKCTX(CmdDrawMultiIndexedEXT)(cmdbuf, num_draws, (const VkMultiDrawIndexedInfoEXT*)draws,
297                                        dinfo->instance_count,
298                                        dinfo->start_instance, sizeof(struct pipe_draw_start_count_bias),
299                                        dinfo->index_bias_varies ? NULL : &draws[0].index_bias);
300       } else {
301          for (unsigned i = 0; i < num_draws; i++)
302             VKCTX(CmdDrawIndexed)(cmdbuf,
303                draws[i].count, dinfo->instance_count,
304                draws[i].start, draws[i].index_bias, dinfo->start_instance);
305       }
306    }
307 }
308 
309 template <zink_multidraw HAS_MULTIDRAW>
310 ALWAYS_INLINE static void
draw(struct zink_context * ctx,const struct pipe_draw_info * dinfo,const struct pipe_draw_start_count_bias * draws,unsigned num_draws,unsigned draw_id,bool needs_drawid)311 draw(struct zink_context *ctx,
312      const struct pipe_draw_info *dinfo,
313      const struct pipe_draw_start_count_bias *draws,
314      unsigned num_draws,
315      unsigned draw_id,
316      bool needs_drawid)
317 {
318    VkCommandBuffer cmdbuf = ctx->batch.state->cmdbuf;
319    if (dinfo->increment_draw_id && needs_drawid) {
320       for (unsigned i = 0; i < num_draws; i++) {
321          update_drawid(ctx, draw_id);
322          VKCTX(CmdDraw)(cmdbuf, draws[i].count, dinfo->instance_count, draws[i].start, dinfo->start_instance);
323          draw_id++;
324       }
325    } else {
326       if (needs_drawid)
327          update_drawid(ctx, draw_id);
328       if (HAS_MULTIDRAW)
329          VKCTX(CmdDrawMultiEXT)(cmdbuf, num_draws, (const VkMultiDrawInfoEXT*)draws,
330                                 dinfo->instance_count, dinfo->start_instance,
331                                 sizeof(struct pipe_draw_start_count_bias));
332       else {
333          for (unsigned i = 0; i < num_draws; i++)
334             VKCTX(CmdDraw)(cmdbuf, draws[i].count, dinfo->instance_count, draws[i].start, dinfo->start_instance);
335 
336       }
337    }
338 }
339 
340 ALWAYS_INLINE static VkPipelineStageFlags
find_pipeline_bits(uint32_t * mask)341 find_pipeline_bits(uint32_t *mask)
342 {
343    for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++) {
344       if (mask[i]) {
345          return zink_pipeline_flags_from_pipe_stage((enum pipe_shader_type)i);
346       }
347    }
348    return 0;
349 }
350 
351 static void
update_barriers(struct zink_context * ctx,bool is_compute)352 update_barriers(struct zink_context *ctx, bool is_compute)
353 {
354    if (!ctx->need_barriers[is_compute]->entries)
355       return;
356    struct set *need_barriers = ctx->need_barriers[is_compute];
357    ctx->barrier_set_idx[is_compute] = !ctx->barrier_set_idx[is_compute];
358    ctx->need_barriers[is_compute] = &ctx->update_barriers[is_compute][ctx->barrier_set_idx[is_compute]];
359    set_foreach(need_barriers, he) {
360       struct zink_resource *res = (struct zink_resource *)he->key;
361       VkPipelineStageFlags pipeline = 0;
362       VkAccessFlags access = 0;
363       if (res->bind_count[is_compute]) {
364          if (res->write_bind_count[is_compute])
365             access |= VK_ACCESS_SHADER_WRITE_BIT;
366          if (res->write_bind_count[is_compute] != res->bind_count[is_compute]) {
367             unsigned bind_count = res->bind_count[is_compute] - res->write_bind_count[is_compute];
368             if (res->obj->is_buffer) {
369                if (res->ubo_bind_count[is_compute]) {
370                   access |= VK_ACCESS_UNIFORM_READ_BIT;
371                   bind_count -= res->ubo_bind_count[is_compute];
372                }
373                if (!is_compute && res->vbo_bind_mask) {
374                   access |= VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT;
375                   pipeline |= VK_PIPELINE_STAGE_VERTEX_INPUT_BIT;
376                   bind_count -= util_bitcount(res->vbo_bind_mask);
377                }
378                bind_count -= res->so_bind_count;
379             }
380             if (bind_count)
381                access |= VK_ACCESS_SHADER_READ_BIT;
382          }
383          if (is_compute)
384             pipeline = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT;
385          else if (!pipeline) {
386             if (res->ubo_bind_count[0])
387                pipeline |= find_pipeline_bits(res->ubo_bind_mask);
388             if (!pipeline)
389                pipeline |= find_pipeline_bits(res->ssbo_bind_mask);
390             if (!pipeline)
391                pipeline |= find_pipeline_bits(res->sampler_binds);
392             if (!pipeline) //must be a shader image
393                pipeline = VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT;
394          }
395          if (res->base.b.target == PIPE_BUFFER)
396             zink_resource_buffer_barrier(ctx, res, access, pipeline);
397          else {
398             VkImageLayout layout = zink_descriptor_util_image_layout_eval(res, is_compute);
399             if (layout != res->layout)
400                zink_resource_image_barrier(ctx, res, layout, access, pipeline);
401          }
402          /* always barrier on draw if this resource has either multiple image write binds or
403           * image write binds and image read binds
404           */
405          if (res->write_bind_count[is_compute] && res->bind_count[is_compute] > 1)
406             _mesa_set_add_pre_hashed(ctx->need_barriers[is_compute], he->hash, res);
407       }
408       _mesa_set_remove(need_barriers, he);
409       if (!need_barriers->entries)
410          break;
411    }
412 }
413 
414 template <bool BATCH_CHANGED>
415 static bool
update_gfx_pipeline(struct zink_context * ctx,struct zink_batch_state * bs,enum pipe_prim_type mode)416 update_gfx_pipeline(struct zink_context *ctx, struct zink_batch_state *bs, enum pipe_prim_type mode)
417 {
418    VkPipeline prev_pipeline = ctx->gfx_pipeline_state.pipeline;
419    update_gfx_program(ctx);
420    VkPipeline pipeline = zink_get_gfx_pipeline(ctx, ctx->curr_program, &ctx->gfx_pipeline_state, mode);
421    bool pipeline_changed = prev_pipeline != pipeline;
422    if (BATCH_CHANGED || pipeline_changed)
423       VKCTX(CmdBindPipeline)(bs->cmdbuf, VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
424    return pipeline_changed;
425 }
426 
427 static bool
hack_conditional_render(struct pipe_context * pctx,const struct pipe_draw_info * dinfo,unsigned drawid_offset,const struct pipe_draw_indirect_info * dindirect,const struct pipe_draw_start_count_bias * draws,unsigned num_draws)428 hack_conditional_render(struct pipe_context *pctx,
429                         const struct pipe_draw_info *dinfo,
430                         unsigned drawid_offset,
431                         const struct pipe_draw_indirect_info *dindirect,
432                         const struct pipe_draw_start_count_bias *draws,
433                         unsigned num_draws)
434 {
435    struct zink_context *ctx = zink_context(pctx);
436    struct zink_batch_state *bs = ctx->batch.state;
437    static bool warned;
438    if (!warned) {
439       fprintf(stderr, "ZINK: warning, this is cpu-based conditional rendering, say bye-bye to fps\n");
440       warned = true;
441    }
442    if (!zink_check_conditional_render(ctx))
443       return false;
444    if (bs != ctx->batch.state) {
445       bool prev = ctx->render_condition_active;
446       ctx->render_condition_active = false;
447       zink_select_draw_vbo(ctx);
448       pctx->draw_vbo(pctx, dinfo, drawid_offset, dindirect, draws, num_draws);
449       ctx->render_condition_active = prev;
450       return false;
451    }
452    return true;
453 }
454 
455 template <zink_multidraw HAS_MULTIDRAW, zink_dynamic_state HAS_DYNAMIC_STATE, zink_dynamic_state2 HAS_DYNAMIC_STATE2,
456           zink_dynamic_vertex_input HAS_VERTEX_INPUT, bool BATCH_CHANGED>
457 void
zink_draw_vbo(struct pipe_context * pctx,const struct pipe_draw_info * dinfo,unsigned drawid_offset,const struct pipe_draw_indirect_info * dindirect,const struct pipe_draw_start_count_bias * draws,unsigned num_draws)458 zink_draw_vbo(struct pipe_context *pctx,
459               const struct pipe_draw_info *dinfo,
460               unsigned drawid_offset,
461               const struct pipe_draw_indirect_info *dindirect,
462               const struct pipe_draw_start_count_bias *draws,
463               unsigned num_draws)
464 {
465    struct zink_context *ctx = zink_context(pctx);
466    struct zink_screen *screen = zink_screen(pctx->screen);
467    struct zink_rasterizer_state *rast_state = ctx->rast_state;
468    struct zink_depth_stencil_alpha_state *dsa_state = ctx->dsa_state;
469    struct zink_batch *batch = &ctx->batch;
470    struct zink_so_target *so_target =
471       dindirect && dindirect->count_from_stream_output ?
472          zink_so_target(dindirect->count_from_stream_output) : NULL;
473    VkBuffer counter_buffers[PIPE_MAX_SO_OUTPUTS];
474    VkDeviceSize counter_buffer_offsets[PIPE_MAX_SO_OUTPUTS];
475    bool need_index_buffer_unref = false;
476    bool mode_changed = ctx->gfx_pipeline_state.gfx_prim_mode != dinfo->mode;
477    bool reads_drawid = ctx->shader_reads_drawid;
478    bool reads_basevertex = ctx->shader_reads_basevertex;
479    unsigned work_count = ctx->batch.work_count;
480    enum pipe_prim_type mode = (enum pipe_prim_type)dinfo->mode;
481 
482    if (unlikely(!screen->info.have_EXT_conditional_rendering)) {
483       if (!hack_conditional_render(pctx, dinfo, drawid_offset, dindirect, draws, num_draws))
484          return;
485    }
486 
487    if (ctx->memory_barrier)
488       zink_flush_memory_barrier(ctx, false);
489    update_barriers(ctx, false);
490 
491    if (unlikely(ctx->buffer_rebind_counter < screen->buffer_rebind_counter)) {
492       ctx->buffer_rebind_counter = screen->buffer_rebind_counter;
493       zink_rebind_all_buffers(ctx);
494    }
495 
496    unsigned index_offset = 0;
497    unsigned index_size = dinfo->index_size;
498    struct pipe_resource *index_buffer = NULL;
499    if (index_size > 0) {
500       if (dinfo->has_user_indices) {
501          if (!util_upload_index_buffer(pctx, dinfo, &draws[0], &index_buffer, &index_offset, 4)) {
502             debug_printf("util_upload_index_buffer() failed\n");
503             return;
504          }
505          zink_batch_reference_resource_move(batch, zink_resource(index_buffer));
506       } else {
507          index_buffer = dinfo->index.resource;
508          zink_batch_reference_resource_rw(batch, zink_resource(index_buffer), false);
509       }
510       assert(index_size <= 4 && index_size != 3);
511       assert(index_size != 1 || screen->info.have_EXT_index_type_uint8);
512    }
513 
514    bool have_streamout = !!ctx->num_so_targets;
515    if (have_streamout) {
516       if (ctx->xfb_barrier)
517          zink_emit_xfb_counter_barrier(ctx);
518       if (ctx->dirty_so_targets) {
519          /* have to loop here and below because barriers must be emitted out of renderpass,
520           * but xfb buffers can't be bound before the renderpass is active to avoid
521           * breaking from recursion
522           */
523          for (unsigned i = 0; i < ctx->num_so_targets; i++) {
524             struct zink_so_target *t = (struct zink_so_target *)ctx->so_targets[i];
525             if (t)
526                zink_resource_buffer_barrier(ctx, zink_resource(t->base.buffer),
527                                             VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT_EXT, VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT);
528          }
529       }
530    }
531 
532    if (so_target)
533       zink_emit_xfb_vertex_input_barrier(ctx, zink_resource(so_target->base.buffer));
534 
535    barrier_draw_buffers(ctx, dinfo, dindirect, index_buffer);
536 
537    if (BATCH_CHANGED)
538       zink_update_descriptor_refs(ctx, false);
539 
540    zink_batch_rp(ctx);
541 
542    /* these must be after renderpass start to avoid issues with recursion */
543    uint8_t vertices_per_patch = ctx->gfx_pipeline_state.patch_vertices ? ctx->gfx_pipeline_state.patch_vertices - 1 : 0;
544    if (ctx->gfx_pipeline_state.vertices_per_patch != vertices_per_patch)
545       ctx->gfx_pipeline_state.dirty = true;
546    bool drawid_broken = false;
547    if (reads_drawid && (!dindirect || !dindirect->buffer))
548       drawid_broken = (drawid_offset != 0 ||
549                       (!HAS_MULTIDRAW && num_draws > 1) ||
550                       (HAS_MULTIDRAW && num_draws > 1 && !dinfo->increment_draw_id));
551    if (drawid_broken != zink_get_last_vertex_key(ctx)->push_drawid)
552       zink_set_last_vertex_key(ctx)->push_drawid = drawid_broken;
553    ctx->gfx_pipeline_state.vertices_per_patch = vertices_per_patch;
554    if (mode_changed) {
555       bool points_changed = false;
556       if (mode == PIPE_PRIM_POINTS) {
557          ctx->gfx_pipeline_state.has_points++;
558          points_changed = true;
559       } else if (ctx->gfx_pipeline_state.gfx_prim_mode == PIPE_PRIM_POINTS) {
560          ctx->gfx_pipeline_state.has_points--;
561          points_changed = true;
562       }
563       if (points_changed && ctx->rast_state->base.point_quad_rasterization)
564          zink_set_fs_point_coord_key(ctx);
565    }
566    ctx->gfx_pipeline_state.gfx_prim_mode = mode;
567 
568    if (index_size) {
569       const VkIndexType index_type[3] = {
570          VK_INDEX_TYPE_UINT8_EXT,
571          VK_INDEX_TYPE_UINT16,
572          VK_INDEX_TYPE_UINT32,
573       };
574       struct zink_resource *res = zink_resource(index_buffer);
575       VKCTX(CmdBindIndexBuffer)(batch->state->cmdbuf, res->obj->buffer, index_offset, index_type[index_size >> 1]);
576    }
577    if (!HAS_DYNAMIC_STATE2) {
578       if (ctx->gfx_pipeline_state.primitive_restart != dinfo->primitive_restart)
579          ctx->gfx_pipeline_state.dirty = true;
580       ctx->gfx_pipeline_state.primitive_restart = dinfo->primitive_restart;
581    }
582 
583    if (have_streamout && ctx->dirty_so_targets)
584       zink_emit_stream_output_targets(pctx);
585 
586    bool pipeline_changed = false;
587    if (!HAS_DYNAMIC_STATE)
588       pipeline_changed = update_gfx_pipeline<BATCH_CHANGED>(ctx, batch->state, mode);
589 
590    if (BATCH_CHANGED || ctx->vp_state_changed || (!HAS_DYNAMIC_STATE && pipeline_changed)) {
591       VkViewport viewports[PIPE_MAX_VIEWPORTS];
592       for (unsigned i = 0; i < ctx->vp_state.num_viewports; i++) {
593          VkViewport viewport = {
594             ctx->vp_state.viewport_states[i].translate[0] - ctx->vp_state.viewport_states[i].scale[0],
595             ctx->vp_state.viewport_states[i].translate[1] - ctx->vp_state.viewport_states[i].scale[1],
596             ctx->vp_state.viewport_states[i].scale[0] * 2,
597             ctx->vp_state.viewport_states[i].scale[1] * 2,
598             ctx->rast_state->base.clip_halfz ?
599                ctx->vp_state.viewport_states[i].translate[2] :
600                ctx->vp_state.viewport_states[i].translate[2] - ctx->vp_state.viewport_states[i].scale[2],
601             ctx->vp_state.viewport_states[i].translate[2] + ctx->vp_state.viewport_states[i].scale[2]
602          };
603          viewports[i] = viewport;
604       }
605       if (HAS_DYNAMIC_STATE)
606          VKCTX(CmdSetViewportWithCountEXT)(batch->state->cmdbuf, ctx->vp_state.num_viewports, viewports);
607       else
608          VKCTX(CmdSetViewport)(batch->state->cmdbuf, 0, ctx->vp_state.num_viewports, viewports);
609    }
610    if (BATCH_CHANGED || ctx->scissor_changed || ctx->vp_state_changed || (!HAS_DYNAMIC_STATE && pipeline_changed)) {
611       VkRect2D scissors[PIPE_MAX_VIEWPORTS];
612       if (ctx->rast_state->base.scissor) {
613          for (unsigned i = 0; i < ctx->vp_state.num_viewports; i++) {
614             scissors[i].offset.x = ctx->vp_state.scissor_states[i].minx;
615             scissors[i].offset.y = ctx->vp_state.scissor_states[i].miny;
616             scissors[i].extent.width = ctx->vp_state.scissor_states[i].maxx - ctx->vp_state.scissor_states[i].minx;
617             scissors[i].extent.height = ctx->vp_state.scissor_states[i].maxy - ctx->vp_state.scissor_states[i].miny;
618          }
619       } else {
620          for (unsigned i = 0; i < ctx->vp_state.num_viewports; i++) {
621             scissors[i].offset.x = 0;
622             scissors[i].offset.y = 0;
623             scissors[i].extent.width = ctx->fb_state.width;
624             scissors[i].extent.height = ctx->fb_state.height;
625          }
626       }
627       if (HAS_DYNAMIC_STATE)
628          VKCTX(CmdSetScissorWithCountEXT)(batch->state->cmdbuf, ctx->vp_state.num_viewports, scissors);
629       else
630          VKCTX(CmdSetScissor)(batch->state->cmdbuf, 0, ctx->vp_state.num_viewports, scissors);
631    }
632    ctx->vp_state_changed = false;
633    ctx->scissor_changed = false;
634 
635    if (BATCH_CHANGED || ctx->stencil_ref_changed) {
636       VKCTX(CmdSetStencilReference)(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT,
637                                ctx->stencil_ref.ref_value[0]);
638       VKCTX(CmdSetStencilReference)(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT,
639                                ctx->stencil_ref.ref_value[1]);
640       ctx->stencil_ref_changed = false;
641    }
642 
643    if (HAS_DYNAMIC_STATE && (BATCH_CHANGED || ctx->dsa_state_changed)) {
644       VKCTX(CmdSetDepthBoundsTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_bounds_test);
645       if (dsa_state->hw_state.depth_bounds_test)
646          VKCTX(CmdSetDepthBounds)(batch->state->cmdbuf,
647                              dsa_state->hw_state.min_depth_bounds,
648                              dsa_state->hw_state.max_depth_bounds);
649       VKCTX(CmdSetDepthTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_test);
650       if (dsa_state->hw_state.depth_test)
651          VKCTX(CmdSetDepthCompareOpEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_compare_op);
652       VKCTX(CmdSetDepthWriteEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_write);
653       VKCTX(CmdSetStencilTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.stencil_test);
654       if (dsa_state->hw_state.stencil_test) {
655          VKCTX(CmdSetStencilOpEXT)(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT,
656                                        dsa_state->hw_state.stencil_front.failOp,
657                                        dsa_state->hw_state.stencil_front.passOp,
658                                        dsa_state->hw_state.stencil_front.depthFailOp,
659                                        dsa_state->hw_state.stencil_front.compareOp);
660          VKCTX(CmdSetStencilOpEXT)(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT,
661                                        dsa_state->hw_state.stencil_back.failOp,
662                                        dsa_state->hw_state.stencil_back.passOp,
663                                        dsa_state->hw_state.stencil_back.depthFailOp,
664                                        dsa_state->hw_state.stencil_back.compareOp);
665       }
666       if (dsa_state->base.stencil[0].enabled) {
667          if (dsa_state->base.stencil[1].enabled) {
668             VKCTX(CmdSetStencilWriteMask)(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, dsa_state->hw_state.stencil_front.writeMask);
669             VKCTX(CmdSetStencilWriteMask)(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, dsa_state->hw_state.stencil_back.writeMask);
670             VKCTX(CmdSetStencilCompareMask)(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_BIT, dsa_state->hw_state.stencil_front.compareMask);
671             VKCTX(CmdSetStencilCompareMask)(batch->state->cmdbuf, VK_STENCIL_FACE_BACK_BIT, dsa_state->hw_state.stencil_back.compareMask);
672          } else {
673             VKCTX(CmdSetStencilWriteMask)(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_AND_BACK, dsa_state->hw_state.stencil_front.writeMask);
674             VKCTX(CmdSetStencilCompareMask)(batch->state->cmdbuf, VK_STENCIL_FACE_FRONT_AND_BACK, dsa_state->hw_state.stencil_front.compareMask);
675          }
676       }
677    }
678    ctx->dsa_state_changed = false;
679 
680    bool rast_state_changed = ctx->rast_state_changed;
681    if (HAS_DYNAMIC_STATE && (BATCH_CHANGED || rast_state_changed))
682       VKCTX(CmdSetFrontFaceEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.dyn_state1.front_face);
683    if ((BATCH_CHANGED || rast_state_changed) &&
684        screen->info.have_EXT_line_rasterization && rast_state->base.line_stipple_enable)
685       VKCTX(CmdSetLineStippleEXT)(batch->state->cmdbuf, rast_state->base.line_stipple_factor, rast_state->base.line_stipple_pattern);
686 
687    if (BATCH_CHANGED || ctx->rast_state_changed || mode_changed) {
688       enum pipe_prim_type reduced_prim = ctx->last_vertex_stage->reduced_prim;
689       if (reduced_prim == PIPE_PRIM_MAX)
690          reduced_prim = u_reduced_prim(mode);
691 
692       bool depth_bias = false;
693       switch (reduced_prim) {
694       case PIPE_PRIM_POINTS:
695          depth_bias = rast_state->offset_point;
696          break;
697 
698       case PIPE_PRIM_LINES:
699          depth_bias = rast_state->offset_line;
700          break;
701 
702       case PIPE_PRIM_TRIANGLES:
703          depth_bias = rast_state->offset_tri;
704          break;
705 
706       default:
707          unreachable("unexpected reduced prim");
708       }
709 
710       if (line_width_needed(reduced_prim, rast_state->hw_state.polygon_mode)) {
711          if (screen->info.feats.features.wideLines || rast_state->line_width == 1.0f)
712             VKCTX(CmdSetLineWidth)(batch->state->cmdbuf, rast_state->line_width);
713          else
714             debug_printf("BUG: wide lines not supported, needs fallback!");
715       }
716       if (depth_bias)
717          VKCTX(CmdSetDepthBias)(batch->state->cmdbuf, rast_state->offset_units, rast_state->offset_clamp, rast_state->offset_scale);
718       else
719          VKCTX(CmdSetDepthBias)(batch->state->cmdbuf, 0.0f, 0.0f, 0.0f);
720    }
721    ctx->rast_state_changed = false;
722 
723    if (HAS_DYNAMIC_STATE) {
724       if (ctx->sample_locations_changed) {
725          VkSampleLocationsInfoEXT loc;
726          zink_init_vk_sample_locations(ctx, &loc);
727          VKCTX(CmdSetSampleLocationsEXT)(batch->state->cmdbuf, &loc);
728       }
729       ctx->sample_locations_changed = false;
730    }
731 
732    if ((BATCH_CHANGED || ctx->blend_state_changed) &&
733        ctx->gfx_pipeline_state.blend_state->need_blend_constants) {
734       VKCTX(CmdSetBlendConstants)(batch->state->cmdbuf, ctx->blend_constants);
735    }
736    ctx->blend_state_changed = false;
737 
738    if (BATCH_CHANGED || ctx->vertex_buffers_dirty)
739       zink_bind_vertex_buffers<HAS_DYNAMIC_STATE, HAS_VERTEX_INPUT>(batch, ctx);
740 
741    zink_query_update_gs_states(ctx);
742 
743    if (BATCH_CHANGED) {
744       ctx->pipeline_changed[0] = false;
745       zink_select_draw_vbo(ctx);
746    }
747 
748    if (HAS_DYNAMIC_STATE) {
749       update_gfx_pipeline<BATCH_CHANGED>(ctx, batch->state, mode);
750       if (BATCH_CHANGED || mode_changed)
751          VKCTX(CmdSetPrimitiveTopologyEXT)(batch->state->cmdbuf, zink_primitive_topology(mode));
752    }
753 
754    if (HAS_DYNAMIC_STATE2 && (BATCH_CHANGED || ctx->primitive_restart != dinfo->primitive_restart)) {
755       VKCTX(CmdSetPrimitiveRestartEnableEXT)(batch->state->cmdbuf, dinfo->primitive_restart);
756       ctx->primitive_restart = dinfo->primitive_restart;
757    }
758 
759    if (zink_program_has_descriptors(&ctx->curr_program->base))
760       screen->descriptors_update(ctx, false);
761 
762    if (ctx->di.any_bindless_dirty && ctx->curr_program->base.dd->bindless)
763       zink_descriptors_update_bindless(ctx);
764 
765    if (reads_basevertex) {
766       unsigned draw_mode_is_indexed = index_size > 0;
767       VKCTX(CmdPushConstants)(batch->state->cmdbuf, ctx->curr_program->base.layout, VK_SHADER_STAGE_VERTEX_BIT,
768                          offsetof(struct zink_gfx_push_constant, draw_mode_is_indexed), sizeof(unsigned),
769                          &draw_mode_is_indexed);
770    }
771    if (ctx->curr_program->shaders[PIPE_SHADER_TESS_CTRL] && ctx->curr_program->shaders[PIPE_SHADER_TESS_CTRL]->is_generated)
772       VKCTX(CmdPushConstants)(batch->state->cmdbuf, ctx->curr_program->base.layout, VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
773                          offsetof(struct zink_gfx_push_constant, default_inner_level), sizeof(float) * 6,
774                          &ctx->tess_levels[0]);
775 
776    if (have_streamout) {
777       for (unsigned i = 0; i < ctx->num_so_targets; i++) {
778          struct zink_so_target *t = zink_so_target(ctx->so_targets[i]);
779          counter_buffers[i] = VK_NULL_HANDLE;
780          if (t) {
781             struct zink_resource *res = zink_resource(t->counter_buffer);
782             t->stride = ctx->last_vertex_stage->streamout.so_info.stride[i] * sizeof(uint32_t);
783             zink_batch_reference_resource_rw(batch, res, true);
784             if (t->counter_buffer_valid) {
785                counter_buffers[i] = res->obj->buffer;
786                counter_buffer_offsets[i] = t->counter_buffer_offset;
787             }
788          }
789       }
790       VKCTX(CmdBeginTransformFeedbackEXT)(batch->state->cmdbuf, 0, ctx->num_so_targets, counter_buffers, counter_buffer_offsets);
791    }
792 
793    bool needs_drawid = reads_drawid && zink_get_last_vertex_key(ctx)->push_drawid;
794    work_count += num_draws;
795    if (index_size > 0) {
796       if (dindirect && dindirect->buffer) {
797          assert(num_draws == 1);
798          if (needs_drawid)
799             update_drawid(ctx, drawid_offset);
800          struct zink_resource *indirect = zink_resource(dindirect->buffer);
801          zink_batch_reference_resource_rw(batch, indirect, false);
802          if (dindirect->indirect_draw_count) {
803              struct zink_resource *indirect_draw_count = zink_resource(dindirect->indirect_draw_count);
804              zink_batch_reference_resource_rw(batch, indirect_draw_count, false);
805              VKCTX(CmdDrawIndexedIndirectCount)(batch->state->cmdbuf, indirect->obj->buffer, dindirect->offset,
806                                                 indirect_draw_count->obj->buffer, dindirect->indirect_draw_count_offset,
807                                                 dindirect->draw_count, dindirect->stride);
808          } else
809             VKCTX(CmdDrawIndexedIndirect)(batch->state->cmdbuf, indirect->obj->buffer, dindirect->offset, dindirect->draw_count, dindirect->stride);
810       } else {
811          if (need_index_buffer_unref)
812             draw_indexed_need_index_buffer_unref(ctx, dinfo, draws, num_draws, drawid_offset, needs_drawid);
813          else
814             draw_indexed<HAS_MULTIDRAW>(ctx, dinfo, draws, num_draws, drawid_offset, needs_drawid);
815       }
816    } else {
817       if (so_target && screen->info.tf_props.transformFeedbackDraw) {
818          if (needs_drawid)
819             update_drawid(ctx, drawid_offset);
820          zink_batch_reference_resource_rw(batch, zink_resource(so_target->base.buffer), false);
821          zink_batch_reference_resource_rw(batch, zink_resource(so_target->counter_buffer), true);
822          VKCTX(CmdDrawIndirectByteCountEXT)(batch->state->cmdbuf, dinfo->instance_count, dinfo->start_instance,
823                                        zink_resource(so_target->counter_buffer)->obj->buffer, so_target->counter_buffer_offset, 0,
824                                        MIN2(so_target->stride, screen->info.tf_props.maxTransformFeedbackBufferDataStride));
825       } else if (dindirect && dindirect->buffer) {
826          assert(num_draws == 1);
827          if (needs_drawid)
828             update_drawid(ctx, drawid_offset);
829          struct zink_resource *indirect = zink_resource(dindirect->buffer);
830          zink_batch_reference_resource_rw(batch, indirect, false);
831          if (dindirect->indirect_draw_count) {
832              struct zink_resource *indirect_draw_count = zink_resource(dindirect->indirect_draw_count);
833              zink_batch_reference_resource_rw(batch, indirect_draw_count, false);
834              VKCTX(CmdDrawIndirectCount)(batch->state->cmdbuf, indirect->obj->buffer, dindirect->offset,
835                                            indirect_draw_count->obj->buffer, dindirect->indirect_draw_count_offset,
836                                            dindirect->draw_count, dindirect->stride);
837          } else
838             VKCTX(CmdDrawIndirect)(batch->state->cmdbuf, indirect->obj->buffer, dindirect->offset, dindirect->draw_count, dindirect->stride);
839       } else {
840          draw<HAS_MULTIDRAW>(ctx, dinfo, draws, num_draws, drawid_offset, needs_drawid);
841       }
842    }
843 
844    if (have_streamout) {
845       for (unsigned i = 0; i < ctx->num_so_targets; i++) {
846          struct zink_so_target *t = zink_so_target(ctx->so_targets[i]);
847          if (t) {
848             counter_buffers[i] = zink_resource(t->counter_buffer)->obj->buffer;
849             counter_buffer_offsets[i] = t->counter_buffer_offset;
850             t->counter_buffer_valid = true;
851          }
852       }
853       VKCTX(CmdEndTransformFeedbackEXT)(batch->state->cmdbuf, 0, ctx->num_so_targets, counter_buffers, counter_buffer_offsets);
854    }
855    batch->has_work = true;
856    batch->last_was_compute = false;
857    ctx->batch.work_count = work_count;
858    /* flush if there's >100k draws */
859    if (unlikely(work_count >= 30000) || ctx->oom_flush)
860       pctx->flush(pctx, NULL, 0);
861 }
862 
863 template <bool BATCH_CHANGED>
864 static void
zink_launch_grid(struct pipe_context * pctx,const struct pipe_grid_info * info)865 zink_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
866 {
867    struct zink_context *ctx = zink_context(pctx);
868    struct zink_screen *screen = zink_screen(pctx->screen);
869    struct zink_batch *batch = &ctx->batch;
870 
871    update_barriers(ctx, true);
872    if (ctx->memory_barrier)
873       zink_flush_memory_barrier(ctx, true);
874 
875    if (zink_program_has_descriptors(&ctx->curr_compute->base))
876       screen->descriptors_update(ctx, true);
877    if (ctx->di.any_bindless_dirty && ctx->curr_compute->base.dd->bindless)
878       zink_descriptors_update_bindless(ctx);
879 
880    zink_program_update_compute_pipeline_state(ctx, ctx->curr_compute, info->block);
881    VkPipeline prev_pipeline = ctx->compute_pipeline_state.pipeline;
882    VkPipeline pipeline = zink_get_compute_pipeline(screen, ctx->curr_compute,
883                                                &ctx->compute_pipeline_state);
884 
885    if (BATCH_CHANGED) {
886       zink_update_descriptor_refs(ctx, true);
887       zink_batch_reference_program(&ctx->batch, &ctx->curr_compute->base);
888    }
889 
890    if (prev_pipeline != pipeline || BATCH_CHANGED)
891       VKCTX(CmdBindPipeline)(batch->state->cmdbuf, VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
892    if (BATCH_CHANGED) {
893       ctx->pipeline_changed[1] = false;
894       zink_select_launch_grid(ctx);
895    }
896 
897    if (BITSET_TEST(ctx->compute_stage->nir->info.system_values_read, SYSTEM_VALUE_WORK_DIM))
898       VKCTX(CmdPushConstants)(batch->state->cmdbuf, ctx->curr_compute->base.layout, VK_SHADER_STAGE_COMPUTE_BIT,
899                          offsetof(struct zink_cs_push_constant, work_dim), sizeof(uint32_t),
900                          &info->work_dim);
901 
902    batch->work_count++;
903    zink_batch_no_rp(ctx);
904    if (info->indirect) {
905       /*
906          VK_ACCESS_INDIRECT_COMMAND_READ_BIT specifies read access to indirect command data read as
907          part of an indirect build, trace, drawing or dispatching command. Such access occurs in the
908          VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT pipeline stage.
909 
910          - Chapter 7. Synchronization and Cache Control
911        */
912       check_buffer_barrier(ctx, info->indirect, VK_ACCESS_INDIRECT_COMMAND_READ_BIT, VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT);
913       VKCTX(CmdDispatchIndirect)(batch->state->cmdbuf, zink_resource(info->indirect)->obj->buffer, info->indirect_offset);
914       zink_batch_reference_resource_rw(batch, zink_resource(info->indirect), false);
915    } else
916       VKCTX(CmdDispatch)(batch->state->cmdbuf, info->grid[0], info->grid[1], info->grid[2]);
917    batch->has_work = true;
918    batch->last_was_compute = true;
919    /* flush if there's >100k computes */
920    if (unlikely(ctx->batch.work_count >= 30000) || ctx->oom_flush)
921       pctx->flush(pctx, NULL, 0);
922 }
923 
924 template <zink_multidraw HAS_MULTIDRAW, zink_dynamic_state HAS_DYNAMIC_STATE, zink_dynamic_state2 HAS_DYNAMIC_STATE2,
925           zink_dynamic_vertex_input HAS_VERTEX_INPUT, bool BATCH_CHANGED>
926 static void
init_batch_changed_functions(struct zink_context * ctx,pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])927 init_batch_changed_functions(struct zink_context *ctx, pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])
928 {
929    draw_vbo_array[HAS_MULTIDRAW][HAS_DYNAMIC_STATE][HAS_DYNAMIC_STATE2][HAS_VERTEX_INPUT][BATCH_CHANGED] =
930    zink_draw_vbo<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, HAS_DYNAMIC_STATE2, HAS_VERTEX_INPUT, BATCH_CHANGED>;
931 }
932 
933 template <zink_multidraw HAS_MULTIDRAW, zink_dynamic_state HAS_DYNAMIC_STATE, zink_dynamic_state2 HAS_DYNAMIC_STATE2,
934           zink_dynamic_vertex_input HAS_VERTEX_INPUT>
935 static void
init_vertex_input_functions(struct zink_context * ctx,pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])936 init_vertex_input_functions(struct zink_context *ctx, pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])
937 {
938    init_batch_changed_functions<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, HAS_DYNAMIC_STATE2, HAS_VERTEX_INPUT, false>(ctx, draw_vbo_array);
939    init_batch_changed_functions<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, HAS_DYNAMIC_STATE2, HAS_VERTEX_INPUT, true>(ctx, draw_vbo_array);
940 }
941 
942 template <zink_multidraw HAS_MULTIDRAW, zink_dynamic_state HAS_DYNAMIC_STATE, zink_dynamic_state2 HAS_DYNAMIC_STATE2>
943 static void
init_dynamic_state2_functions(struct zink_context * ctx,pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])944 init_dynamic_state2_functions(struct zink_context *ctx, pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])
945 {
946    init_vertex_input_functions<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, HAS_DYNAMIC_STATE2, ZINK_NO_DYNAMIC_VERTEX_INPUT>(ctx, draw_vbo_array);
947    init_vertex_input_functions<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, HAS_DYNAMIC_STATE2, ZINK_DYNAMIC_VERTEX_INPUT>(ctx, draw_vbo_array);
948 }
949 
950 template <zink_multidraw HAS_MULTIDRAW, zink_dynamic_state HAS_DYNAMIC_STATE>
951 static void
init_dynamic_state_functions(struct zink_context * ctx,pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])952 init_dynamic_state_functions(struct zink_context *ctx, pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])
953 {
954    init_dynamic_state2_functions<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, ZINK_NO_DYNAMIC_STATE2>(ctx, draw_vbo_array);
955    init_dynamic_state2_functions<HAS_MULTIDRAW, HAS_DYNAMIC_STATE, ZINK_DYNAMIC_STATE2>(ctx, draw_vbo_array);
956 }
957 
958 template <zink_multidraw HAS_MULTIDRAW>
959 static void
init_multidraw_functions(struct zink_context * ctx,pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])960 init_multidraw_functions(struct zink_context *ctx, pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])
961 {
962    init_dynamic_state_functions<HAS_MULTIDRAW, ZINK_NO_DYNAMIC_STATE>(ctx, draw_vbo_array);
963    init_dynamic_state_functions<HAS_MULTIDRAW, ZINK_DYNAMIC_STATE>(ctx, draw_vbo_array);
964 }
965 
966 static void
init_all_draw_functions(struct zink_context * ctx,pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])967 init_all_draw_functions(struct zink_context *ctx, pipe_draw_vbo_func draw_vbo_array[2][2][2][2][2])
968 {
969    init_multidraw_functions<ZINK_NO_MULTIDRAW>(ctx, draw_vbo_array);
970    init_multidraw_functions<ZINK_MULTIDRAW>(ctx, draw_vbo_array);
971 }
972 
973 template <bool BATCH_CHANGED>
974 static void
init_grid_batch_changed_functions(struct zink_context * ctx)975 init_grid_batch_changed_functions(struct zink_context *ctx)
976 {
977    ctx->launch_grid[BATCH_CHANGED] = zink_launch_grid<BATCH_CHANGED>;
978 }
979 
980 static void
init_all_grid_functions(struct zink_context * ctx)981 init_all_grid_functions(struct zink_context *ctx)
982 {
983    init_grid_batch_changed_functions<false>(ctx);
984    init_grid_batch_changed_functions<true>(ctx);
985 }
986 
987 static void
zink_invalid_draw_vbo(struct pipe_context * pipe,const struct pipe_draw_info * dinfo,unsigned drawid_offset,const struct pipe_draw_indirect_info * dindirect,const struct pipe_draw_start_count_bias * draws,unsigned num_draws)988 zink_invalid_draw_vbo(struct pipe_context *pipe,
989                       const struct pipe_draw_info *dinfo,
990                       unsigned drawid_offset,
991                       const struct pipe_draw_indirect_info *dindirect,
992                       const struct pipe_draw_start_count_bias *draws,
993                       unsigned num_draws)
994 {
995    unreachable("vertex shader not bound");
996 }
997 
998 static void
zink_invalid_launch_grid(struct pipe_context * pctx,const struct pipe_grid_info * info)999 zink_invalid_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
1000 {
1001    unreachable("compute shader not bound");
1002 }
1003 
1004 template <unsigned STAGE_MASK>
1005 static uint32_t
hash_gfx_program(const void * key)1006 hash_gfx_program(const void *key)
1007 {
1008    const struct zink_shader **shaders = (const struct zink_shader**)key;
1009    uint32_t base_hash = shaders[PIPE_SHADER_VERTEX]->hash ^ shaders[PIPE_SHADER_FRAGMENT]->hash;
1010    if (STAGE_MASK == 0) //VS+FS
1011       return base_hash;
1012    if (STAGE_MASK == 1) //VS+GS+FS
1013       return base_hash ^ shaders[PIPE_SHADER_GEOMETRY]->hash;
1014    /*VS+TCS+FS isn't a thing */
1015    /*VS+TCS+GS+FS isn't a thing */
1016    if (STAGE_MASK == 4) //VS+TES+FS
1017       return base_hash ^ shaders[PIPE_SHADER_TESS_EVAL]->hash;
1018    if (STAGE_MASK == 5) //VS+TES+GS+FS
1019       return base_hash ^ shaders[PIPE_SHADER_GEOMETRY]->hash ^ shaders[PIPE_SHADER_TESS_EVAL]->hash;
1020    if (STAGE_MASK == 6) //VS+TCS+TES+FS
1021       return base_hash ^ shaders[PIPE_SHADER_TESS_CTRL]->hash ^ shaders[PIPE_SHADER_TESS_EVAL]->hash;
1022 
1023    /* all stages */
1024    return base_hash ^ shaders[PIPE_SHADER_GEOMETRY]->hash ^ shaders[PIPE_SHADER_TESS_CTRL]->hash ^ shaders[PIPE_SHADER_TESS_EVAL]->hash;
1025 }
1026 
1027 template <unsigned STAGE_MASK>
1028 static bool
equals_gfx_program(const void * a,const void * b)1029 equals_gfx_program(const void *a, const void *b)
1030 {
1031    const void **sa = (const void**)a;
1032    const void **sb = (const void**)b;
1033    if (STAGE_MASK == 0) //VS+FS
1034       return !memcmp(a, b, sizeof(void*) * 2);
1035    if (STAGE_MASK == 1) //VS+GS+FS
1036       return !memcmp(a, b, sizeof(void*) * 3);
1037    /*VS+TCS+FS isn't a thing */
1038    /*VS+TCS+GS+FS isn't a thing */
1039    if (STAGE_MASK == 4) //VS+TES+FS
1040       return sa[PIPE_SHADER_TESS_EVAL] == sb[PIPE_SHADER_TESS_EVAL] && !memcmp(a, b, sizeof(void*) * 2);
1041    if (STAGE_MASK == 5) //VS+TES+GS+FS
1042       return sa[PIPE_SHADER_TESS_EVAL] == sb[PIPE_SHADER_TESS_EVAL] && !memcmp(a, b, sizeof(void*) * 3);
1043    if (STAGE_MASK == 6) //VS+TCS+TES+FS
1044       return !memcmp(&sa[PIPE_SHADER_TESS_CTRL], &sb[PIPE_SHADER_TESS_CTRL], sizeof(void*) * 2) &&
1045              !memcmp(a, b, sizeof(void*) * 2);
1046 
1047    /* all stages */
1048    return !memcmp(a, b, sizeof(void*) * ZINK_SHADER_COUNT);
1049 }
1050 
1051 extern "C"
1052 void
zink_init_draw_functions(struct zink_context * ctx,struct zink_screen * screen)1053 zink_init_draw_functions(struct zink_context *ctx, struct zink_screen *screen)
1054 {
1055    pipe_draw_vbo_func draw_vbo_array[2][2][2][2] //multidraw, dynamic state, dynamic state2, dynamic vertex input,
1056                                     [2];   //batch changed
1057    init_all_draw_functions(ctx, draw_vbo_array);
1058    memcpy(ctx->draw_vbo, &draw_vbo_array[screen->info.have_EXT_multi_draw]
1059                                         [screen->info.have_EXT_extended_dynamic_state]
1060                                         [screen->info.have_EXT_extended_dynamic_state2]
1061                                         [screen->info.have_EXT_vertex_input_dynamic_state],
1062                                         sizeof(ctx->draw_vbo));
1063 
1064    /* Bind a fake draw_vbo, so that draw_vbo isn't NULL, which would skip
1065     * initialization of callbacks in upper layers (such as u_threaded_context).
1066     */
1067    ctx->base.draw_vbo = zink_invalid_draw_vbo;
1068 
1069    _mesa_hash_table_init(&ctx->program_cache[0], ctx, hash_gfx_program<0>, equals_gfx_program<0>);
1070    _mesa_hash_table_init(&ctx->program_cache[1], ctx, hash_gfx_program<1>, equals_gfx_program<1>);
1071    _mesa_hash_table_init(&ctx->program_cache[2], ctx, hash_gfx_program<2>, equals_gfx_program<2>);
1072    _mesa_hash_table_init(&ctx->program_cache[3], ctx, hash_gfx_program<3>, equals_gfx_program<3>);
1073    _mesa_hash_table_init(&ctx->program_cache[4], ctx, hash_gfx_program<4>, equals_gfx_program<4>);
1074    _mesa_hash_table_init(&ctx->program_cache[5], ctx, hash_gfx_program<5>, equals_gfx_program<5>);
1075    _mesa_hash_table_init(&ctx->program_cache[6], ctx, hash_gfx_program<6>, equals_gfx_program<6>);
1076    _mesa_hash_table_init(&ctx->program_cache[7], ctx, hash_gfx_program<7>, equals_gfx_program<7>);
1077 }
1078 
1079 void
zink_init_grid_functions(struct zink_context * ctx)1080 zink_init_grid_functions(struct zink_context *ctx)
1081 {
1082    init_all_grid_functions(ctx);
1083    /* Bind a fake launch_grid, so that draw_vbo isn't NULL, which would skip
1084     * initialization of callbacks in upper layers (such as u_threaded_context).
1085     */
1086    ctx->base.launch_grid = zink_invalid_launch_grid;
1087 }
1088