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/third_party/spirv-tools/source/fuzz/
Dcomparator_deep_blocks_first.h7 // http://www.apache.org/licenses/LICENSE-2.0
33 bool operator()(uint32_t bb1, uint32_t bb2) const { in operator()
34 return this->operator()(fuzzerutil::MaybeFindBlock(ir_context_, bb1), in operator()
38 bool operator()(const opt::BasicBlock* bb1, opt::BasicBlock* bb2) const { in operator()
39 assert(bb1 && bb2 && "The blocks must exist."); in operator()
40 assert(bb1->GetParent() == bb2->GetParent() && in operator()
42 return ir_context_->GetStructuredCFGAnalysis()->NestingDepth(bb1->id()) > in operator()
43 ir_context_->GetStructuredCFGAnalysis()->NestingDepth(bb2->id()); in operator()
/third_party/skia/third_party/externals/spirv-tools/source/fuzz/
Dcomparator_deep_blocks_first.h7 // http://www.apache.org/licenses/LICENSE-2.0
33 bool operator()(uint32_t bb1, uint32_t bb2) const { in operator()
34 return this->operator()(fuzzerutil::MaybeFindBlock(ir_context_, bb1), in operator()
38 bool operator()(const opt::BasicBlock* bb1, opt::BasicBlock* bb2) const { in operator()
39 assert(bb1 && bb2 && "The blocks must exist."); in operator()
40 assert(bb1->GetParent() == bb2->GetParent() && in operator()
42 return ir_context_->GetStructuredCFGAnalysis()->NestingDepth(bb1->id()) > in operator()
43 ir_context_->GetStructuredCFGAnalysis()->NestingDepth(bb2->id()); in operator()
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/fuzz/
Dcomparator_deep_blocks_first.h7 // http://www.apache.org/licenses/LICENSE-2.0
33 bool operator()(uint32_t bb1, uint32_t bb2) const { in operator()
34 return this->operator()(fuzzerutil::MaybeFindBlock(ir_context_, bb1), in operator()
38 bool operator()(const opt::BasicBlock* bb1, opt::BasicBlock* bb2) const { in operator()
39 assert(bb1 && bb2 && "The blocks must exist."); in operator()
40 assert(bb1->GetParent() == bb2->GetParent() && in operator()
42 return ir_context_->GetStructuredCFGAnalysis()->NestingDepth(bb1->id()) > in operator()
43 ir_context_->GetStructuredCFGAnalysis()->NestingDepth(bb2->id()); in operator()
/third_party/e2fsprogs/lib/ext2fs/
Dtst_badblocks.c6 * %Begin-Header%
9 * %End-Header%
114 printf("--- OK"); in print_list()
116 printf("--- NOT OK"); in print_list()
134 printf("\tblock %u is %s --- %s\n", vec[i], in validate_test_seq()
149 printf("Adding block %u --- now %s\n", vec[i], in do_test_seq()
159 printf("Removing block %u --- now %s\n", vec[i], in do_test_seq()
228 fs->magic = EXT2_ET_MAGIC_EXT2FS_FILSYS; in file_test_invalid()
229 fs->super = malloc(SUPERBLOCK_SIZE); in file_test_invalid()
230 memset(fs->super, 0, SUPERBLOCK_SIZE); in file_test_invalid()
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Dbadblocks.c2 * badblocks.c --- routines to manipulate the bad block structure
6 * %Begin-Header%
9 * %End-Header%
43 bb->magic = EXT2_ET_MAGIC_BADBLOCKS_LIST; in make_u32_list()
44 bb->size = size ? size : 10; in make_u32_list()
45 bb->num = num; in make_u32_list()
46 retval = ext2fs_get_array(bb->size, sizeof(blk_t), &bb->list); in make_u32_list()
52 memcpy(bb->list, list, bb->size * sizeof(blk_t)); in make_u32_list()
54 memset(bb->list, 0, bb->size * sizeof(blk_t)); in make_u32_list()
84 retval = make_u32_list(src->size, src->num, src->list, dest); in ext2fs_u32_copy()
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/third_party/gstreamer/gstplugins_good/gst/deinterlace/tvtime/
Dvfir.c21 * Boston, MA 02110-1301, USA.
59 * [-1 8 2 8 -1]. ffmpeg uses a similar filter but with more of
61 * filter taps here are: [-1 4 2 4 -1].
82 const guint8 *lum_m4 = scanlines->tt1; in deinterlace_line_packed_c()
83 const guint8 *lum_m3 = scanlines->t0; in deinterlace_line_packed_c()
84 const guint8 *lum_m2 = scanlines->m1; in deinterlace_line_packed_c()
85 const guint8 *lum_m1 = scanlines->b0; in deinterlace_line_packed_c()
86 const guint8 *lum = scanlines->bb1; in deinterlace_line_packed_c()
95 const guint8 *lum_m4 = scanlines->tt1; in deinterlace_line_planar_y_c()
96 const guint8 *lum_m3 = scanlines->t0; in deinterlace_line_planar_y_c()
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/third_party/skia/third_party/externals/spirv-tools/test/opt/
Ddead_branch_elim_test.cpp8 // http://www.apache.org/licenses/LICENSE-2.0
192 // From the SPIR-V spec: in TEST_F()
195 // - Scalar Boolean: false in TEST_F()
425 // Note: The SPIR-V has had store/load elimination and phi insertion in TEST_F()
498 // Note: The SPIR-V has had store/load elimination and phi insertion in TEST_F()
928 // Note: SPIR-V hand-edited to add decoration in TEST_F()
1328 // function is wrapped in a one-trip loop and returns are in TEST_F()
1430 ; CHECK-NEXT: OpBranchConditional {{%\w+}} {{%\w+}} [[merge]] in TEST_F()
1431 ; CHECK-NEXT: [[merge]] = OpLabel in TEST_F()
1432 ; CHECK-NEXT: OpReturn in TEST_F()
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/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/opt/
Ddead_branch_elim_test.cpp8 // http://www.apache.org/licenses/LICENSE-2.0
192 // From the SPIR-V spec: in TEST_F()
195 // - Scalar Boolean: false in TEST_F()
425 // Note: The SPIR-V has had store/load elimination and phi insertion in TEST_F()
498 // Note: The SPIR-V has had store/load elimination and phi insertion in TEST_F()
928 // Note: SPIR-V hand-edited to add decoration in TEST_F()
1328 // function is wrapped in a one-trip loop and returns are in TEST_F()
1430 ; CHECK-NEXT: OpBranchConditional {{%\w+}} {{%\w+}} [[merge]] in TEST_F()
1431 ; CHECK-NEXT: [[merge]] = OpLabel in TEST_F()
1432 ; CHECK-NEXT: OpReturn in TEST_F()
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/third_party/spirv-tools/test/opt/
Ddead_branch_elim_test.cpp8 // http://www.apache.org/licenses/LICENSE-2.0
192 // From the SPIR-V spec: in TEST_F()
195 // - Scalar Boolean: false in TEST_F()
425 // Note: The SPIR-V has had store/load elimination and phi insertion in TEST_F()
498 // Note: The SPIR-V has had store/load elimination and phi insertion in TEST_F()
928 // Note: SPIR-V hand-edited to add decoration in TEST_F()
1328 // function is wrapped in a one-trip loop and returns are in TEST_F()
1430 ; CHECK-NEXT: OpBranchConditional {{%\w+}} {{%\w+}} [[merge]] in TEST_F()
1431 ; CHECK-NEXT: [[merge]] = OpLabel in TEST_F()
1432 ; CHECK-NEXT: OpReturn in TEST_F()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DCodeMoverUtils.cpp1 //===- CodeMoverUtils.cpp - CodeMover Utilities ----------------------------==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
23 #define DEBUG_TYPE "codemover-utils"
39 bool llvm::isControlFlowEquivalent(const BasicBlock &BB0, const BasicBlock &BB1, in isControlFlowEquivalent() argument
42 if (&BB0 == &BB1) in isControlFlowEquivalent()
45 return ((DT.dominates(&BB0, &BB1) && PDT.dominates(&BB1, &BB0)) || in isControlFlowEquivalent()
46 (PDT.dominates(&BB0, &BB1) && DT.dominates(&BB1, &BB0))); in isControlFlowEquivalent()
72 WorkList.insert(&Succ->front()); in collectInstructionsInBetween()
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DIntegerDivision.cpp1 //===-- IntegerDivision.cpp - Expand integer division ---------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 // from compiler-rt's implementations of __udivsi3 and __udivmoddi4,
12 // but hand-tuned for targets that prefer less control flow.
14 //===----------------------------------------------------------------------===//
25 #define DEBUG_TYPE "integer-division"
35 unsigned BitWidth = Dividend->getType()->getIntegerBitWidth(); in generateSignedRemainderCode()
81 // Remainder = Dividend - Quotient*Divisor in generatedUnsignedRemainderCode()
105 // Implementation taken from compiler-rt's __divsi3 and __divdi3 in generateSignedDivisionCode()
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DFlattenCFG.cpp1 //===- FlatternCFG.cpp - Code to perform CFG flattening -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
38 /// Use parallel-and or parallel-or to generate conditions for
42 /// If \param BB is the merge block of an if-region, attempt to merge
43 /// the if-region with an adjacent if-region upstream if two if-regions
48 /// are from two if-regions whose entry blocks are \p Head1 and \p
51 /// This is used as a legality check for merging if-regions.
89 /// %cmp12 = or i1 %cmp10, %cmp11 // parallel-or mode.
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/third_party/mesa3d/src/amd/compiler/tests/
Dtest_assembler.cpp33 //~gfx[6-7]>> c7800000
34 //~gfx[6-7]! bf810000
35 //~gfx[8-9]>> s_memtime s[0:1] ; c0900000 00000000
48 //! s_branch BB1 ; bf820040
55 bld.reset(program->create_and_insert_block());
57 program->blocks[1].linear_preds.push_back(0u);
75 bld.reset(program->create_and_insert_block());
80 bld.sopp(aco_opcode::s_nop, -1, 0);
84 bld.reset(program->create_and_insert_block());
86 program->blocks[2].linear_preds.push_back(0u);
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/third_party/gstreamer/gstplugins_good/gst/deinterlace/
Dyadif.c21 * Boston, MA 02110-1301, USA.
138 memcpy (out, scanlines->m0, size); in copy_scanline()
149 dim_class->name = "YADIF Adaptive Deinterlacer"; in gst_deinterlace_method_yadif_class_init()
150 dim_class->nick = "yadif"; in gst_deinterlace_method_yadif_class_init()
151 dim_class->fields_required = 5; in gst_deinterlace_method_yadif_class_init()
152 dim_class->latency = 2; in gst_deinterlace_method_yadif_class_init()
154 dism_class->copy_scanline_planar_y = copy_scanline; in gst_deinterlace_method_yadif_class_init()
155 dism_class->copy_scanline_planar_u = copy_scanline; in gst_deinterlace_method_yadif_class_init()
156 dism_class->copy_scanline_planar_v = copy_scanline; in gst_deinterlace_method_yadif_class_init()
157 dism_class->copy_scanline_yuy2 = copy_scanline; in gst_deinterlace_method_yadif_class_init()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/IPO/
DSampleProfile.cpp1 //===- SampleProfile.cpp - Incorporate sample profiles into the IR --------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // reads a profile file generated by a sampling profiler (e.g. Linux Perf -
16 // - prof: Represents branch weights. This annotation is added to branches
22 //===----------------------------------------------------------------------===//
97 #define DEBUG_TYPE "sample-profile"
98 #define CSINLINE_DEBUG DEBUG_TYPE "-inline"
108 "sample-profile-file", cl::init(""), cl::value_desc("filename"),
109 cl::desc("Profile file loaded by -sample-profile"), cl::Hidden);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
DPostDominators.cpp1 //===- PostDominators.cpp - Post-Dominator Calculation --------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements the post-dominator construction algorithms.
11 //===----------------------------------------------------------------------===//
31 //===----------------------------------------------------------------------===//
33 //===----------------------------------------------------------------------===//
43 "Post-Dominator Tree Construction", true, true)
58 const BasicBlock *BB1 = I1->getParent(); in dominates() local
59 const BasicBlock *BB2 = I2->getParent(); in dominates()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonCFGOptimizer.cpp1 //===- HexagonCFGOptimizer.cpp - CFG optimizations ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
83 MI.getParent()->getParent()->getSubtarget().getInstrInfo(); in InvertAndChangeJumpTarget()
102 MI.setDesc(TII->get(NewOpcode)); in InvertAndChangeJumpTarget()
107 if (MBB->canFallThrough()) in isOnFallThroughPath()
109 for (MachineBasicBlock *PB : MBB->predecessors()) in isOnFallThroughPath()
110 if (PB->isLayoutSuccessor(MBB) && PB->canFallThrough()) in isOnFallThroughPath()
125 MachineBasicBlock::iterator MII = MBB->getFirstTerminator(); in runOnMachineFunction()
126 if (MII != MBB->end()) { in runOnMachineFunction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Transforms/Utils/
DCodeMoverUtils.h1 //===- Transform/Utils/CodeMoverUtils.h - CodeMover Utils -------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
28 /// and post-dominators: if A dominates B and B post-dominates A then A and B
29 /// are control-flow equivalent.
34 /// Return true if \p BB0 and \p BB1 are control flow equivalent.
37 /// post-dominators: if A dominates B and B post-dominates A then A and B are
38 /// control-flow equivalent.
39 bool isControlFlowEquivalent(const BasicBlock &BB0, const BasicBlock &BB1,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Instrumentation/
DCFGMST.h1 //===-- CFGMST.h - Minimum Spanning Tree for CFG ----------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements a Union-find algorithm to compute Minimum Spanning Tree
12 //===----------------------------------------------------------------------===//
33 /// An union-find based Minimum Spanning Tree for CFG
35 /// Implements a Union-find algorithm to compute Minimum Spanning Tree
54 if (G->Group != G) in findAndCompressGroup()
55 G->Group = findAndCompressGroup(static_cast<BBInfo *>(G->Group)); in findAndCompressGroup()
56 return static_cast<BBInfo *>(G->Group); in findAndCompressGroup()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DREADME-X86-64.txt1 //===- README_X86_64.txt - Notes for X86-64 code gen ----------------------===//
4 multiplication by a constant. How much of it applies to Intel's X86-64
5 implementation? There are definite trade-offs to consider: latency vs. register
8 //===---------------------------------------------------------------------===//
18 movabsq $-9223372036854775808, %rax
33 movabsq $-9223372036854775808, %rdx
42 //===---------------------------------------------------------------------===//
47 r8b - r15b.
54 //===---------------------------------------------------------------------===//
56 The x86-64 ABI for hidden-argument struct returns requires that the
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/third_party/boost/boost/geometry/algorithms/detail/relate/
Dde9im.hpp3 // Copyright (c) 2007-2015 Barend Gehrels, Amsterdam, the Netherlands.
6 // Modifications copyright (c) 2013-2019 Oracle and/or its affiliates.
37 \brief DE-9IM model intersection matrix.
40 Dimensionally Extended 9-Intersection Model.
89 \brief DE-9IM model intersection mask.
92 Dimensionally Extended 9-Intersection Model.
123 \brief DE-9IM model intersection mask (static version).
126 Dimensionally Extended 9-Intersection Model.
223 char BI1, char BB1, char BE1,
231 static_mask<II1, IB1, IE1, BI1, BB1, BE1, EI1, EB1, EE1>,
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/third_party/ltp/tools/sparse/sparse-src/
Dcse.c2 * CSE - walk the linearized instruction flow, and
27 const struct instruction *def1 = phi1->def; in phi_compare()
28 const struct instruction *def2 = phi2->def; in phi_compare()
30 if (def1->src1 != def2->src1) in phi_compare()
31 return def1->src1 < def2->src1 ? -1 : 1; in phi_compare()
32 if (def1->bb != def2->bb) in phi_compare()
33 return def1->bb < def2->bb ? -1 : 1; in phi_compare()
42 hash = (insn->opcode << 3) + (insn->size >> 3); in cse_collect()
43 switch (insn->opcode) { in cse_collect()
45 hash += hashval(insn->src3); in cse_collect()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/
DDivRemPairs.cpp1 //===- DivRemPairs.cpp - Hoist/[dr]ecompose division and remainder --------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
32 #define DEBUG_TYPE "div-rem-pairs"
37 DEBUG_COUNTER(DRPCounter, "div-rem-pairs-transform",
38 "Controls transformations in div-rem-pairs pass");
48 /// X - ((X ?/ Y) * Y)
67 M.Key.SignedOp = Div->getOpcode() == Instruction::SDiv; in matchExpandedRem()
74 /// A thin wrapper to store two values that we matched as div-rem pair.
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/third_party/spirv-tools/test/opt/loop_optimizations/
Dunswitch.cpp7 // http://www.apache.org/licenses/LICENSE-2.0
28 Generated from the following GLSL + --eliminate-local-multi-store
49 ; CHECK-NEXT: OpSelectionMerge [[if_merge:%\w+]] None in TEST_F()
50 ; CHECK-NEXT: OpBranchConditional [[cst_cond]] [[loop_t:%\w+]] [[loop_f:%\w+]] in TEST_F()
54 ; CHECK-NEXT: OpBranch [[loop:%\w+]] in TEST_F()
56 ; CHECK-NEXT: [[phi_i:%\w+]] = OpPhi %int %int_0 [[loop_f]] [[iv_i:%\w+]] [[continue:%\w+]] in TEST_F()
57 ; CHECK-NEXT: [[phi_j:%\w+]] = OpPhi %int %int_0 [[loop_f]] [[iv_j:%\w+]] [[continue]] in TEST_F()
58 ; CHECK-NEXT: OpLoopMerge [[merge:%\w+]] [[continue]] None in TEST_F()
60 ; CHECK-NEXT: OpBranchConditional [[loop_exit]] [[loop_body:%\w+]] [[merge]] in TEST_F()
63 ; CHECK: OpBranchConditional %false [[bb1:%\w+]] [[bb2:%\w+]] in TEST_F()
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/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/opt/loop_optimizations/
Dunswitch.cpp7 // http://www.apache.org/licenses/LICENSE-2.0
28 Generated from the following GLSL + --eliminate-local-multi-store
49 ; CHECK-NEXT: OpSelectionMerge [[if_merge:%\w+]] None in TEST_F()
50 ; CHECK-NEXT: OpBranchConditional [[cst_cond]] [[loop_t:%\w+]] [[loop_f:%\w+]] in TEST_F()
54 ; CHECK-NEXT: OpBranch [[loop:%\w+]] in TEST_F()
56 ; CHECK-NEXT: [[phi_i:%\w+]] = OpPhi %int %int_0 [[loop_f]] [[iv_i:%\w+]] [[continue:%\w+]] in TEST_F()
57 ; CHECK-NEXT: [[phi_j:%\w+]] = OpPhi %int %int_0 [[loop_f]] [[iv_j:%\w+]] [[continue]] in TEST_F()
58 ; CHECK-NEXT: OpLoopMerge [[merge:%\w+]] [[continue]] None in TEST_F()
60 ; CHECK-NEXT: OpBranchConditional [[loop_exit]] [[loop_body:%\w+]] [[merge]] in TEST_F()
63 ; CHECK: OpBranchConditional %false [[bb1:%\w+]] [[bb2:%\w+]] in TEST_F()
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