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/kernel/linux/linux-5.10/drivers/phy/rockchip/
Dphy-rockchip-inno-dsidphy.c100 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg05 */
103 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */
106 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */
109 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */
112 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */
115 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */
118 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */
124 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0d */
127 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0e */
130 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */
[all …]
/kernel/linux/linux-5.10/arch/ia64/kernel/
Derr_inject.c50 u64 data3; member
94 err_data_buffer[cpu].data3); in show()
169 err_data_buffer[cpu].data3); in store()
184 err_data_buffer[cpu].data3, in store_err_data_buffer()
190 &err_data_buffer[cpu].data3); in store_err_data_buffer()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vf_error.c54 u32 data1, data2, data3; in amdgpu_vf_error_trans_all() local
80 data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF; in amdgpu_vf_error_trans_all()
82 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); in amdgpu_vf_error_trans_all()
Duvd_v5_0.c602 uint32_t data1, data3, suvd_flags; in uvd_v5_0_enable_clock_gating() local
605 data3 = RREG32(mmUVD_CGC_GATE); in uvd_v5_0_enable_clock_gating()
614 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v5_0_enable_clock_gating()
634 data3 |= UVD_CGC_GATE__VCPU_MASK; in uvd_v5_0_enable_clock_gating()
635 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v5_0_enable_clock_gating()
638 data3 = 0; in uvd_v5_0_enable_clock_gating()
643 WREG32(mmUVD_CGC_GATE, data3); in uvd_v5_0_enable_clock_gating()
Duvd_v6_0.c1253 uint32_t data1, data3; in uvd_v6_0_enable_clock_gating() local
1256 data3 = RREG32(mmUVD_CGC_GATE); in uvd_v6_0_enable_clock_gating()
1273 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v6_0_enable_clock_gating()
1295 data3 |= UVD_CGC_GATE__VCPU_MASK; in uvd_v6_0_enable_clock_gating()
1297 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v6_0_enable_clock_gating()
1299 data3 = 0; in uvd_v6_0_enable_clock_gating()
1303 WREG32(mmUVD_CGC_GATE, data3); in uvd_v6_0_enable_clock_gating()
Dmxgpu_nv.c115 enum idh_request req, u32 data1, u32 data2, u32 data3) in xgpu_nv_mailbox_trans_msg() argument
138 WREG32_NO_KIQ(mmMAILBOX_MSGBUF_TRN_DW3, data3); in xgpu_nv_mailbox_trans_msg()
Dmxgpu_ai.c118 enum idh_request req, u32 data1, u32 data2, u32 data3) { in xgpu_ai_mailbox_trans_msg() argument
149 data3); in xgpu_ai_mailbox_trans_msg()
Damdgpu_virt.h73 void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3);
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh3/
Dprobe.c18 unsigned long addr0, addr1, data0, data1, data2, data3; in cpu_probe() local
42 data3 = __raw_readl(addr0); in cpu_probe()
59 if (data0 == data1 && data2 == data3) { /* Shadow */ in cpu_probe()
/kernel/linux/linux-5.10/drivers/usb/misc/sisusbvga/
Dsisusb.h277 __u32 data3; /* operation dependent */ member
281 #define SUCMD_GET 0x01 /* for all: data0 = index, data3 = port */
288 #define SUCMD_CLRSCR 0x07 /* data0:1:2 = length, data3 = address */
292 #define SUCMD_SETMODE 0x09 /* Set a display mode (data3 = SiS mode) */
293 #define SUCMD_SETVESAMODE 0x0a /* Set a display mode (data3 = VESA mode) */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/panel/
Dlvds.yaml72 DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__><
84 DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__><
/kernel/linux/linux-5.10/drivers/media/usb/gspca/
Dt613.c88 const u8 data3[9]; member
150 .data3 =
172 .data3 =
194 .data3 =
213 .data3 = {0x40, 0x80, 0xc0, 0x50, 0xa0, 0xf0, 0x53, 0xa6,
644 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); in sd_init()
666 reg_w_ixbuf(gspca_dev, 0xe0, sensor->data3, sizeof sensor->data3); in sd_init()
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/cxd2880/
Dcxd2880_tnrdmd_dvbt2.c159 const u8 *data3 = NULL; in x_tune_dvbt2_demod_setting() local
263 data3 = clk_mode_settings_a3; in x_tune_dvbt2_demod_setting()
268 data3 = clk_mode_settings_b3; in x_tune_dvbt2_demod_setting()
273 data3 = clk_mode_settings_c3; in x_tune_dvbt2_demod_setting()
337 0x3c, &data3[0], 2); in x_tune_dvbt2_demod_setting()
343 0x56, &data3[2], 3); in x_tune_dvbt2_demod_setting()
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstih407-pinctrl.dtsi735 DATA3 = <&pio11 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
763 DATA3 = <&pio12 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
791 DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
864 DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
904 DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
1101 data3 = <&pio34 2 ALT1 OUT>;
1124 data3 = <&pio33 2 ALT1 IN>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Ddsi.txt69 the physical data lane DATA3, logical DATA1 to physical DATA0, logic DATA2
70 to phys DATA1 and logic DATA3 to phys DATA2.
/kernel/linux/linux-5.10/drivers/scsi/lpfc/
Dlpfc_debugfs.c172 dtp->data1, dtp->data2, dtp->data3); in lpfc_debugfs_disc_trc_data()
183 dtp->data1, dtp->data2, dtp->data3); in lpfc_debugfs_disc_trc_data()
238 dtp->data1, dtp->data2, dtp->data3); in lpfc_debugfs_slow_ring_trc_data()
249 dtp->data1, dtp->data2, dtp->data3); in lpfc_debugfs_slow_ring_trc_data()
1039 uint64_t data1, data2, data3; in lpfc_debugfs_nvmestat_data() local
1191 data3 = cstat->control_requests; in lpfc_debugfs_nvmestat_data()
1192 totout += (data1 + data2 + data3); in lpfc_debugfs_nvmestat_data()
1201 i, data1, data2, data3); in lpfc_debugfs_nvmestat_data()
1204 tot, ((data1 + data2 + data3) - tot)); in lpfc_debugfs_nvmestat_data()
1258 u64 data1, data2, data3; in lpfc_debugfs_scsistat_data() local
[all …]
Dlpfc_debugfs.h223 uint32_t data3; member
232 uint32_t data3; member
/kernel/linux/linux-5.10/Documentation/i2c/busses/
Di2c-mlxcpld.rst55 specified in the four first bytes (DATA0 - DATA3). Data is read
/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/mvm/
Dutils.c309 u32 data3; /* error-specific data */ member
356 u32 data3; /* error-specific data */ member
410 u32 data3; /* error-specific data */ member
452 IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3); in iwl_mvm_dump_umac_error_log()
523 IWL_ERR(mvm, "0x%08X | data3\n", table.data3); in iwl_mvm_dump_lmac_error_log()
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9003_mac.h80 u32 data3; /* data pointer to 4th buffer */ member
Dar9003_mac.c54 WRITE_ONCE(ads->data3, i->buf_addr[3]); in ar9003_set_txdesc()
168 + ads->data3 + ads->ctl9; in ar9003_calc_ptr_chksum()
/kernel/linux/linux-5.10/Documentation/accounting/
Ddelay-accounting.rst115 bin data1 data3 data5 dev home media opt root srv sys usr
/kernel/linux/linux-5.10/include/net/
Dieee80211_radiotap.h212 __le16 data1, data2, data3, data4, data5, data6; member
/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7915/
Dmac.c256 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) | in mt7915_mac_decode_he_radiotap()
271 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | in mt7915_mac_decode_he_radiotap()
279 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); in mt7915_mac_decode_he_radiotap()
286 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); in mt7915_mac_decode_he_radiotap()
/kernel/linux/linux-5.10/drivers/regulator/
Dqcom_spmi-regulator.c1223 u32 vctl, data3, avs_ctl, pmic_sts; in spmi_saw_set_vdd() local
1230 regmap_read(saw_regmap, SAW3_SPM_PMIC_DATA_3, &data3); in spmi_saw_set_vdd()
1236 data3 &= ~SAW3_VCTL_CLEAR_MASK; in spmi_saw_set_vdd()
1237 data3 |= (u32)voltage_sel; in spmi_saw_set_vdd()
1248 regmap_write(saw_regmap, SAW3_SPM_PMIC_DATA_3, data3); in spmi_saw_set_vdd()

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