/kernel/linux/linux-5.10/net/netfilter/ipvs/ |
D | ip_vs_proto_sctp.c | 283 #define sCL IP_VS_SCTP_S_CLOSED macro 288 /* sNO, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL*/ 289 /* d */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL}, 291 /* i_a */{sCW, sCW, sCW, sCS, sCR, sCO, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL}, 292 /* c_e */{sCR, sIN, sIN, sCR, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL}, 293 /* c_a */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sES, sES, sSS, sSR, sSA, sRJ, sCL}, 294 /* s */{sSR, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sSR, sSS, sSR, sSA, sRJ, sCL}, 295 /* s_a */{sCL, sIN, sIN, sCS, sCR, sCW, sCO, sCE, sES, sCL, sSR, sCL, sRJ, sCL}, 296 /* s_c */{sCL, sCL, sCL, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sCL, sRJ, sCL}, 297 /* err */{sCL, sI1, sIN, sCS, sCR, sCW, sCO, sCL, sES, sSS, sSR, sSA, sRJ, sCL}, [all …]
|
D | ip_vs_proto_tcp.c | 415 #define sCL IP_VS_TCP_S_CLOSE macro 441 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */ 443 /*fin*/ {{sCL, sCW, sSS, sTW, sTW, sTW, sCL, sCW, sLA, sLI, sTW }}, 444 /*ack*/ {{sES, sES, sSS, sES, sFW, sTW, sCL, sCW, sCL, sLI, sES }}, 445 /*rst*/ {{sCL, sCL, sCL, sSR, sCL, sCL, sCL, sCL, sLA, sLI, sSR }}, 448 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */ 450 /*fin*/ {{sTW, sFW, sSS, sTW, sFW, sTW, sCL, sTW, sLA, sLI, sTW }}, 451 /*ack*/ {{sES, sES, sSS, sES, sFW, sTW, sCL, sCW, sLA, sES, sES }}, 452 /*rst*/ {{sCL, sCL, sSS, sCL, sCL, sTW, sCL, sCL, sCL, sCL, sCL }}, 455 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */ [all …]
|
/kernel/linux/linux-5.10/net/netfilter/ |
D | nf_conntrack_proto_sctp.c | 68 #define sCL SCTP_CONNTRACK_CLOSED macro 118 /* sNO, sCL, sCW, sCE, sES, sSS, sSR, sSA, sHS, sHA */ 119 /* init */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA, sCW, sHA}, 120 /* init_ack */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA, sCL, sHA}, 121 /* abort */ {sCL, sCL, sCL, sCL, sCL, sCL, sCL, sCL, sCL, sCL}, 122 /* shutdown */ {sCL, sCL, sCW, sCE, sSS, sSS, sSR, sSA, sCL, sSS}, 123 /* shutdown_ack */ {sSA, sCL, sCW, sCE, sES, sSA, sSA, sSA, sSA, sHA}, 124 /* error */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA, sCL, sHA},/* Can't have Stale cookie*/ 125 /* cookie_echo */ {sCL, sCL, sCE, sCE, sES, sSS, sSR, sSA, sCL, sHA},/* 5.2.4 - Big TODO */ 126 /* cookie_ack */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA, sCL, sHA},/* Can't come in orig dir */ [all …]
|
D | nf_conntrack_proto_tcp.c | 94 #define sCL TCP_CONNTRACK_CLOSE macro 145 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 160 * sCL -> sSS 162 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 174 * sCL -> sIV 176 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 177 /*fin*/ { sIV, sIV, sFW, sFW, sLA, sLA, sLA, sTW, sCL, sIV }, 191 * sCL -> sCL 193 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 194 /*ack*/ { sES, sIV, sES, sES, sCW, sCW, sTW, sTW, sCL, sIV }, [all …]
|
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_transform.h | 76 SRI(SCL_MODE, SCL, id), \ 77 SRI(SCL_TAP_CONTROL, SCL, id), \ 78 SRI(SCL_CONTROL, SCL, id), \ 79 SRI(SCL_BYPASS_CONTROL, SCL, id), \ 80 SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \ 81 SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \ 82 SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \ 83 SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \ 84 SRI(SCL_COEF_RAM_SELECT, SCL, id), \ 85 SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \ [all …]
|
D | dce_i2c_sw.c | 31 #define SCL false macro 87 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high_sw() 115 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw() 120 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw() 126 * after the SCL pulse we use to send our last data bit. in write_byte_sw() 136 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw() 147 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw() 166 * bit is read while SCL is high in read_byte_sw() 170 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw() 178 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw() [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
D | i2c-gpio.yaml | 28 scl-gpios: 30 gpio used for the scl signal, this should be flagged as 36 i2c-gpio,scl-output-only: 37 description: scl as output only 52 description: sda and scl gpio, alternative for {sda,scl}-gpios 61 i2c-gpio,scl-open-drain: 65 GPIO line used for SCL into open drain mode, and that something is not 71 - scl-gpios
|
D | i2c-rk3x.yaml | 76 SCL frequency to use (in Hz). If omitted, 100kHz is used. 78 i2c-scl-rising-time-ns: 81 Number of nanoseconds the SCL signal takes to rise 86 i2c-scl-falling-time-ns: 89 Number of nanoseconds the SCL signal takes to fall 98 (t(f) in the I2C specification). If not specified we will use the SCL 134 i2c-scl-falling-time-ns = <100>; 135 i2c-scl-rising-time-ns = <800>;
|
D | i2c.txt | 37 - i2c-scl-falling-time-ns 38 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C 41 - i2c-scl-internal-delay-ns 42 Number of nanoseconds the IP core additionally needs to setup SCL. 44 - i2c-scl-rising-time-ns 45 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C 76 add extra pinctrl to configure SCL/SDA pins to GPIO function for bus 79 - scl-gpios 80 specify the gpio related to SCL pin. Used for GPIO bus recovery.
|
/kernel/linux/linux-5.10/drivers/staging/sm750fb/ |
D | ddk750_swi2c.c | 19 * a point in time where the SCL or SDA may be changed. 23 * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change| 26 * SCL == XXXX _____________ ____________ / 28 * I.e. the SCL may only be changed in section 1. and section 3. while 39 * SCL | L | | H | | 42 * SCL | L | | H | | 45 * SCL | L | | H | | 48 * SCL | L | | H | | 104 * This function set/reset the SCL GPIO pin 107 * value - Bit value to set to the SCL or SDA (0 = low, 1 = high) [all …]
|
/kernel/linux/linux-5.10/drivers/i2c/algos/ |
D | i2c-algo-bit.c | 72 * Raise scl line, and do checking for delays. This is necessary for slower 81 /* Not all adapters have scl sense line... */ in sclhi() 104 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n", in sclhi() 117 /* assert: scl, sda are high */ in i2c_start() 125 /* assert: scl is low */ in i2c_repstart() 136 /* assert: scl is low */ in i2c_stop() 150 * -ETIMEDOUT if an error occurred (while raising the scl line) 159 /* assert: scl is low */ in i2c_outb() 194 /* assert: scl is low (sda undef) */ in i2c_outb() 206 /* assert: scl is low */ in i2c_inb() [all …]
|
/kernel/linux/linux-5.10/drivers/i2c/busses/ |
D | i2c-acorn.c | 19 #define SCL 0x02 macro 24 * Note also that we need to preserve the value of SCL and 32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl() 36 ones |= SCL; in ioc_setscl() 38 ones &= ~SCL; in ioc_setscl() 47 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda() 62 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl() 87 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
|
D | i2c-gpio.c | 23 struct gpio_desc *scl; member 48 * Toggle SCL by changing the output value of the pin. This is used 57 gpiod_set_value_cansleep(priv->scl, state); in i2c_gpio_setscl_val() 71 return gpiod_get_value_cansleep(priv->scl); in i2c_gpio_getscl() 103 WIRE_ATTRIBUTE(scl); 170 int ret, irq = gpiod_to_irq(priv->scl); in i2c_gpio_fi_act_on_scl_irq() 177 ret = gpiod_direction_input(priv->scl); in i2c_gpio_fi_act_on_scl_irq() 192 ret = gpiod_direction_output(priv->scl, 1) ?: ret; in i2c_gpio_fi_act_on_scl_irq() 221 * Interrupt on falling SCL. This ensures that the master under test has in fops_lose_arbitration_set() 250 * Interrupt on falling SCL. This ensures that the master under test has in fops_inject_panic_set() [all …]
|
D | i2c-omap.c | 139 /* I2C SCL time value when Master */ 149 #define OMAP_I2C_SYSTEST_SCL_I_FUNC (1 << 8) /* SCL line input value */ 150 #define OMAP_I2C_SYSTEST_SCL_O_FUNC (1 << 7) /* SCL line output value */ 153 /* SDA/SCL IO mode */ 154 #define OMAP_I2C_SYSTEST_SCL_I (1 << 3) /* SCL line sense in */ 155 #define OMAP_I2C_SYSTEST_SCL_O (1 << 2) /* SCL line drive out */ 286 /* SCL low and high time values */ in __omap_i2c_init() 429 unsigned long scl; in omap_i2c_init() local 432 scl = internal_clk / 400; in omap_i2c_init() 433 fsscll = scl - (scl / 3) - 7; in omap_i2c_init() [all …]
|
/kernel/linux/linux-5.10/Documentation/i2c/ |
D | gpio-fault-injection.rst | 20 "scl" 23 By reading this file, you get the current state of SCL. By writing, you can 25 "echo 0 > scl" you force SCL low and thus, no communication will be possible 27 the condition of SCL being unresponsive and report an error to the upper 62 being pulled low by the device while SCL is high. So, similar to the "sda" file 65 SDA after toggling SCL. 81 register 0x00 (if it has registers) when further clock pulses happen on SCL. 99 Arbitration lost is achieved by waiting for SCL going down by the master under 104 should be detected beforehand. Also note, that SCL going down is monitored 129 Start of a transfer is detected by waiting for SCL going down by the master
|
/kernel/linux/linux-5.10/arch/arm/boot/dts/ |
D | stih407-pinctrl.dtsi | 164 scl = <&pio4 5 ALT1 BIDIR>; 173 scl = <&pio5 0 ALT1 BIDIR>; 322 scl = <&pio4 5 ALT1 OUT>; 329 scl = <&pio4 5 ALT1 OUT>; 339 scl = <&pio3 2 ALT2 OUT>; 346 scl = <&pio3 2 ALT2 OUT>; 356 scl = <&pio3 7 ALT2 OUT>; 363 scl = <&pio3 7 ALT2 OUT>; 519 scl = <&pio10 5 ALT2 BIDIR>; 528 scl = <&pio11 0 ALT2 BIDIR>; [all …]
|
D | ste-dbx5x0-pinctrl.dtsi | 132 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ 139 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ 152 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ 159 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ 172 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ 179 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ 192 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ 199 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ 216 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ 223 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
|
/kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/ |
D | dcss-scaler.c | 71 struct dcss_scaler *scl; member 272 struct dcss_scaler *scl = ch->scl; in dcss_scaler_write() local 274 dcss_ctxld_write(scl->ctxld, scl->ctx_id, val, ch->base_ofs + ofs); in dcss_scaler_write() 277 static int dcss_scaler_ch_init_all(struct dcss_scaler *scl, in dcss_scaler_ch_init_all() argument 284 ch = &scl->ch[i]; in dcss_scaler_ch_init_all() 290 dev_err(scl->dev, "scaler: unable to remap ch base\n"); in dcss_scaler_ch_init_all() 294 ch->scl = scl; in dcss_scaler_ch_init_all() 329 void dcss_scaler_exit(struct dcss_scaler *scl) in dcss_scaler_exit() argument 334 struct dcss_scaler_ch *ch = &scl->ch[ch_no]; in dcss_scaler_exit() 342 kfree(scl); in dcss_scaler_exit() [all …]
|
/kernel/linux/linux-5.10/drivers/rtc/ |
D | rtc-rs5c313.c | 73 #define SCL SCSPTR1_SPB0DT macro 94 /* And Initialize SCL for RS5C313 clock */ in rs5c313_init_port() 95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port() 97 scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN; /* SCL output enable */ in rs5c313_init_port() 116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data() 119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data() 136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data() 139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
|
/kernel/linux/linux-5.10/include/linux/platform_data/ |
D | i2c-gpio.h | 12 * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz 14 * SCL low for longer than this, the transfer will time out. 19 * @scl_is_open_drain: SCL is set up as open drain. Same requirements 21 * @scl_is_output_only: SCL output drivers cannot be turned off.
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i3c/ |
D | i3c.txt | 24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers. 27 - i2c-scl-hz: frequency of the SCL signal used for I2C transfers. 53 frequency on SCL 118 i2c-scl-hz = <100000>;
|
D | cdns,i3c-master.txt | 21 - i2c-scl-hz 22 - i3c-scl-hz 37 i2c-scl-hz = <100000>;
|
/kernel/linux/linux-5.10/include/linux/ |
D | i2c-algo-pca.h | 36 #define I2C_PCA_ISCLL 0x02 /* SCL LOW period */ 37 #define I2C_PCA_ISCLH 0x03 /* SCL HIGH period */ 59 * @tlow: Configured SCL LOW period 60 * @thi: Configured SCL HIGH period
|
/kernel/linux/linux-5.10/drivers/media/pci/ivtv/ |
D | ivtv-i2c.c | 20 when putting out bits on the scl/sda lines. The general strategy taken 23 which poll the SCL line 5 times (ivtv_scldelay). I would guess that 35 The i2c bus is a 2 wire serial bus, with clock (SCL) and data (SDA) 382 IVTV_DEBUG_HI_I2C("SCL was high starting an ack\n"); in ivtv_ack() 385 IVTV_DEBUG_I2C("Could not set SCL low starting an ack\n"); in ivtv_ack() 398 IVTV_DEBUG_I2C("Failed to set SCL low after ACK\n"); in ivtv_ack() 413 IVTV_DEBUG_I2C("Error setting SCL low\n"); in ivtv_sendbyte() 430 IVTV_DEBUG_I2C("Error setting SCL low\n"); in ivtv_sendbyte() 451 IVTV_DEBUG_I2C("Error setting SCL high\n"); in ivtv_readbyte() 486 IVTV_DEBUG_I2C("SCL stuck low at start\n"); in ivtv_start() [all …]
|
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega10_processpptables.c | 379 static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t* sda) in get_scl_sda_value() argument 383 *scl = Vega10_I2C_DDC1CLK; in get_scl_sda_value() 387 *scl = Vega10_I2C_DDC2CLK; in get_scl_sda_value() 391 *scl = Vega10_I2C_DDC3CLK; in get_scl_sda_value() 395 *scl = Vega10_I2C_DDC4CLK; in get_scl_sda_value() 399 *scl = Vega10_I2C_DDC5CLK; in get_scl_sda_value() 403 *scl = Vega10_I2C_DDC6CLK; in get_scl_sda_value() 407 *scl = Vega10_I2C_SCL; in get_scl_sda_value() 411 *scl = Vega10_I2C_DDCVGACLK; in get_scl_sda_value() 415 *scl = 0; in get_scl_sda_value() [all …]
|