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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
Disp2401_input_system_private.h27 static inline hrt_data ibuf_ctrl_reg_load(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_reg_load() argument
30 assert(ID < N_IBUF_CTRL_ID); in ibuf_ctrl_reg_load()
31 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_load()
32 return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data)); in ibuf_ctrl_reg_load()
36 static inline void ibuf_ctrl_reg_store(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_reg_store() argument
40 assert(ID < N_IBUF_CTRL_ID); in ibuf_ctrl_reg_store()
41 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_store()
43 ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in ibuf_ctrl_reg_store()
47 static inline void ibuf_ctrl_get_proc_state(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_get_proc_state() argument
57 ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE); in ibuf_ctrl_get_proc_state()
[all …]
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
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Dnv12mt_example.svg17 id="svg2"
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
Dfifo_monitor.c44 const fifo_monitor_ID_t ID,
49 const fifo_monitor_ID_t ID,
54 const fifo_monitor_ID_t ID, in fifo_channel_get_state() argument
63 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
66 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
69 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
72 state->sink_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
77 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
80 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
83 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
[all …]
Dirq.c25 const irq_ID_t ID);
28 const irq_ID_t ID);
60 const irq_ID_t ID) in irq_clear_all() argument
64 assert(ID < N_IRQ_ID); in irq_clear_all()
65 assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); in irq_clear_all()
67 if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { in irq_clear_all()
68 mask = ~((~(hrt_data)0) >> IRQ_N_CHANNEL[ID]); in irq_clear_all()
71 irq_reg_store(ID, in irq_clear_all()
80 const irq_ID_t ID, in irq_enable_channel() argument
83 unsigned int mask = irq_reg_load(ID, in irq_enable_channel()
[all …]
Dinput_formatter.c61 const input_formatter_ID_t ID) in input_formatter_rst() argument
66 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_rst()
68 addr = HIVE_IF_SRST_ADDRESS[ID]; in input_formatter_rst()
69 rst = HIVE_IF_SRST_MASK[ID]; in input_formatter_rst()
75 if (!HIVE_IF_BIN_COPY[ID]) { in input_formatter_rst()
76 input_formatter_reg_store(ID, addr, rst); in input_formatter_rst()
83 const input_formatter_ID_t ID) in input_formatter_get_alignment() argument
85 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_get_alignment()
87 return input_formatter_alignment[ID]; in input_formatter_get_alignment()
91 const input_formatter_ID_t ID, in input_formatter_set_fifo_blocking_mode() argument
[all …]
Dgp_device.c24 const gp_device_ID_t ID, in gp_device_get_state() argument
27 assert(ID < N_GP_DEVICE_ID); in gp_device_get_state()
30 state->syncgen_enable = gp_device_reg_load(ID, in gp_device_get_state()
32 state->syncgen_free_running = gp_device_reg_load(ID, in gp_device_get_state()
34 state->syncgen_pause = gp_device_reg_load(ID, in gp_device_get_state()
36 state->nr_frames = gp_device_reg_load(ID, in gp_device_get_state()
38 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
40 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
42 state->syngen_nr_lines = gp_device_reg_load(ID, in gp_device_get_state()
44 state->syngen_hblank_cycles = gp_device_reg_load(ID, in gp_device_get_state()
[all …]
Dsp_private.h26 const sp_ID_t ID, in sp_ctrl_store() argument
30 assert(ID < N_SP_ID); in sp_ctrl_store()
31 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_store()
32 ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in sp_ctrl_store()
37 const sp_ID_t ID, in sp_ctrl_load() argument
40 assert(ID < N_SP_ID); in sp_ctrl_load()
41 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_load()
42 return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data)); in sp_ctrl_load()
46 const sp_ID_t ID, in sp_ctrl_getbit() argument
50 hrt_data val = sp_ctrl_load(ID, reg); in sp_ctrl_getbit()
[all …]
Disp.c28 const isp_ID_t ID, in cnd_isp_irq_enable() argument
32 isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); in cnd_isp_irq_enable()
34 isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); in cnd_isp_irq_enable()
36 isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, in cnd_isp_irq_enable()
43 const isp_ID_t ID, in isp_get_state() argument
47 hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); in isp_get_state()
58 state->pc = isp_ctrl_load(ID, ISP_PC_REG); in isp_get_state()
60 state->is_broken = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_BROKEN_BIT); in isp_get_state()
61 state->is_idle = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); in isp_get_state()
62 state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); in isp_get_state()
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2401_system/host/
Dpixelgen_private.h33 const pixelgen_ID_t ID, in pixelgen_ctrl_reg_load() argument
36 assert(ID < N_PIXELGEN_ID); in pixelgen_ctrl_reg_load()
37 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); in pixelgen_ctrl_reg_load()
38 return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof( in pixelgen_ctrl_reg_load()
47 const pixelgen_ID_t ID, in pixelgen_ctrl_reg_store() argument
51 assert(ID < N_PIXELGEN_ID); in pixelgen_ctrl_reg_store()
52 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); in pixelgen_ctrl_reg_store()
54 ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data), in pixelgen_ctrl_reg_store()
70 const pixelgen_ID_t ID, in pixelgen_ctrl_get_state() argument
74 pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); in pixelgen_ctrl_get_state()
[all …]
Dcsi_rx_private.h38 const csi_rx_frontend_ID_t ID, in csi_rx_fe_ctrl_reg_load() argument
41 assert(ID < N_CSI_RX_FRONTEND_ID); in csi_rx_fe_ctrl_reg_load()
42 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_load()
43 return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( in csi_rx_fe_ctrl_reg_load()
52 const csi_rx_frontend_ID_t ID, in csi_rx_fe_ctrl_reg_store() argument
56 assert(ID < N_CSI_RX_FRONTEND_ID); in csi_rx_fe_ctrl_reg_store()
57 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_store()
59 ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), in csi_rx_fe_ctrl_reg_store()
68 const csi_rx_backend_ID_t ID, in csi_rx_be_ctrl_reg_load() argument
71 assert(ID < N_CSI_RX_BACKEND_ID); in csi_rx_be_ctrl_reg_load()
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/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-sh7760.c114 struct cami2c *id = ptr; in sh7760_i2c_irq() local
115 struct i2c_msg *msg = id->msg; in sh7760_i2c_irq()
119 msr = IN32(id, I2CMSR); in sh7760_i2c_irq()
120 fsr = IN32(id, I2CFSR); in sh7760_i2c_irq()
124 OUT32(id, I2CMCR, 0); in sh7760_i2c_irq()
125 OUT32(id, I2CSCR, 0); in sh7760_i2c_irq()
126 OUT32(id, I2CSAR, 0); in sh7760_i2c_irq()
127 id->status |= IDS_DONE | IDS_ARBLOST; in sh7760_i2c_irq()
139 OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST); in sh7760_i2c_irq()
140 OUT32(id, I2CMCR, MCR_MIE | MCR_FSB); in sh7760_i2c_irq()
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Di2c-cadence.c131 #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
132 #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
222 * @id: Pointer to driver data struct
226 static void cdns_i2c_clear_bus_hold(struct cdns_i2c *id) in cdns_i2c_clear_bus_hold() argument
233 static inline bool cdns_is_holdquirk(struct cdns_i2c *id, bool hold_wrkaround) in cdns_is_holdquirk() argument
236 (id->curr_recv_count == CDNS_I2C_FIFO_DEPTH + 1)); in cdns_is_holdquirk()
240 static void cdns_i2c_set_mode(enum cdns_i2c_mode mode, struct cdns_i2c *id) in cdns_i2c_set_mode() argument
249 id->dev_mode = mode; in cdns_i2c_set_mode()
250 id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE; in cdns_i2c_set_mode()
255 cdns_i2c_writereg(id->ctrl_reg_diva_divb | in cdns_i2c_set_mode()
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/kernel/linux/linux-5.10/Documentation/userspace-api/media/
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/kernel/linux/linux-5.10/Documentation/userspace-api/media/dvb/
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dpp.h33 #define DPP_REG_LIST_DCN30_COMMON(id)\ argument
34 SRI(CM_DEALPHA, CM, id),\
35 SRI(CM_MEM_PWR_STATUS, CM, id),\
36 SRI(CM_BIAS_CR_R, CM, id),\
37 SRI(CM_BIAS_Y_G_CB_B, CM, id),\
38 SRI(PRE_DEGAM, CNVC_CFG, id),\
39 SRI(CM_GAMCOR_CONTROL, CM, id),\
40 SRI(CM_GAMCOR_LUT_CONTROL, CM, id),\
41 SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
42 SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/bios/
Dbios_parser_common.c63 enum object_enum_id id; in enum_id_from_bios_object_id() local
67 id = ENUM_ID_1; in enum_id_from_bios_object_id()
70 id = ENUM_ID_2; in enum_id_from_bios_object_id()
73 id = ENUM_ID_3; in enum_id_from_bios_object_id()
76 id = ENUM_ID_4; in enum_id_from_bios_object_id()
79 id = ENUM_ID_5; in enum_id_from_bios_object_id()
82 id = ENUM_ID_6; in enum_id_from_bios_object_id()
85 id = ENUM_ID_7; in enum_id_from_bios_object_id()
88 id = ENUM_ID_UNKNOWN; in enum_id_from_bios_object_id()
92 return id; in enum_id_from_bios_object_id()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h39 #define AUX_REG_LIST(id)\ argument
40 SRI(AUX_CONTROL, DP_AUX, id), \
41 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
44 #define HPD_REG_LIST(id)\ argument
45 SRI(DC_HPD_CONTROL, HPD, id)
47 #define LE_COMMON_REG_LIST_BASE(id) \ argument
52 SRI(DIG_BE_CNTL, DIG, id), \
53 SRI(DIG_BE_EN_CNTL, DIG, id), \
54 SRI(DP_CONFIG, DP, id), \
[all …]
Ddce_transform.h38 #define XFM_COMMON_REG_LIST_DCE_BASE(id) \ argument
39 SRI(LB_DATA_FORMAT, LB, id), \
40 SRI(GAMUT_REMAP_CONTROL, DCP, id), \
41 SRI(GAMUT_REMAP_C11_C12, DCP, id), \
42 SRI(GAMUT_REMAP_C13_C14, DCP, id), \
43 SRI(GAMUT_REMAP_C21_C22, DCP, id), \
44 SRI(GAMUT_REMAP_C23_C24, DCP, id), \
45 SRI(GAMUT_REMAP_C31_C32, DCP, id), \
46 SRI(GAMUT_REMAP_C33_C34, DCP, id), \
47 SRI(OUTPUT_CSC_C11_C12, DCP, id), \
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
Dsp_public.h25 /*! Enable or disable the program complete irq signal of SP[ID]
27 \param ID[in] SP identifier
30 \return none, if(cnd) enable(SP[ID].irq) else disable(SP[ID].irq)
33 const sp_ID_t ID,
36 /*! Read the state of cell SP[ID]
38 \param ID[in] SP identifier
42 \return none, state = SP[ID].state, stall = SP[ID].stall
45 const sp_ID_t ID,
49 /*! Write to the status and control register of SP[ID]
51 \param ID[in] SP identifier
[all …]
Disp_public.h22 /*! Enable or disable the program complete irq signal of ISP[ID]
24 \param ID[in] SP identifier
27 \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq)
30 const isp_ID_t ID,
33 /*! Read the state of cell ISP[ID]
35 \param ID[in] ISP identifier
39 \return none, state = ISP[ID].state, stall = ISP[ID].stall
42 const isp_ID_t ID,
46 /*! Write to the status and control register of ISP[ID]
48 \param ID[in] ISP identifier
[all …]
/kernel/linux/linux-5.10/scripts/
Dextract_xc3028.pl163 # Firmware 0, type: BASE FW F8MHZ (0x00000003), id: (0000000000000000), size: 6635
167 write_le64(0x00000000, 0x00000000); # ID
172 # Firmware 1, type: BASE FW F8MHZ MTS (0x00000007), id: (0000000000000000), size: 6635
176 write_le64(0x00000000, 0x00000000); # ID
181 # Firmware 2, type: BASE FW FM (0x00000401), id: (0000000000000000), size: 6525
185 write_le64(0x00000000, 0x00000000); # ID
190 # Firmware 3, type: BASE FW FM INPUT1 (0x00000c01), id: (0000000000000000), size: 6539
194 write_le64(0x00000000, 0x00000000); # ID
199 # Firmware 4, type: BASE FW (0x00000001), id: (0000000000000000), size: 6633
203 write_le64(0x00000000, 0x00000000); # ID
[all …]
/kernel/linux/linux-5.10/tools/perf/arch/x86/util/
Dunwind-libunwind.c14 int id; in LIBUNWIND__ARCH_REG_ID() local
18 id = PERF_REG_X86_AX; in LIBUNWIND__ARCH_REG_ID()
21 id = PERF_REG_X86_DX; in LIBUNWIND__ARCH_REG_ID()
24 id = PERF_REG_X86_CX; in LIBUNWIND__ARCH_REG_ID()
27 id = PERF_REG_X86_BX; in LIBUNWIND__ARCH_REG_ID()
30 id = PERF_REG_X86_SI; in LIBUNWIND__ARCH_REG_ID()
33 id = PERF_REG_X86_DI; in LIBUNWIND__ARCH_REG_ID()
36 id = PERF_REG_X86_BP; in LIBUNWIND__ARCH_REG_ID()
39 id = PERF_REG_X86_SP; in LIBUNWIND__ARCH_REG_ID()
42 id = PERF_REG_X86_R8; in LIBUNWIND__ARCH_REG_ID()
[all …]
/kernel/linux/linux-5.10/drivers/clk/at91/
Dsam9x60.c77 u8 id; member
79 { .n = "ddrck", .p = "masterck", .id = 2 },
80 { .n = "uhpck", .p = "usbck", .id = 6 },
81 { .n = "pck0", .p = "prog0", .id = 8 },
82 { .n = "pck1", .p = "prog1", .id = 9 },
83 { .n = "qspick", .p = "masterck", .id = 19 },
88 u8 id; member
90 { .n = "pioA_clk", .id = 2, },
91 { .n = "pioB_clk", .id = 3, },
92 { .n = "pioC_clk", .id = 4, },
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