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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra30-cpu-opp.dtsi9 clock-latency-ns = <100000>;
15 clock-latency-ns = <100000>;
21 clock-latency-ns = <100000>;
27 clock-latency-ns = <100000>;
33 clock-latency-ns = <100000>;
39 clock-latency-ns = <100000>;
45 clock-latency-ns = <100000>;
51 clock-latency-ns = <100000>;
57 clock-latency-ns = <100000>;
63 clock-latency-ns = <100000>;
[all …]
Dtegra20-cpu-opp.dtsi9 clock-latency-ns = <400000>;
15 clock-latency-ns = <400000>;
21 clock-latency-ns = <400000>;
27 clock-latency-ns = <400000>;
33 clock-latency-ns = <400000>;
39 clock-latency-ns = <400000>;
46 clock-latency-ns = <400000>;
52 clock-latency-ns = <400000>;
58 clock-latency-ns = <400000>;
64 clock-latency-ns = <400000>;
[all …]
Dexynos5800.dtsi27 clock-latency-ns = <140000>;
32 clock-latency-ns = <140000>;
37 clock-latency-ns = <140000>;
75 clock-latency-ns = <140000>;
80 clock-latency-ns = <140000>;
85 clock-latency-ns = <140000>;
90 clock-latency-ns = <140000>;
95 clock-latency-ns = <140000>;
103 clock-latency-ns = <140000>;
132 clock-latency-ns = <140000>;
[all …]
/kernel/linux/linux-5.10/arch/sh/lib/
Dmemcpy-sh4.S31 mov r4,r2 ! 5 MT (0 cycles latency)
33 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
40 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK
41 mov r7, r3 ! 5 MT (latency=0) ! RQPO
46 mov r1,r6 ! 5 MT (latency=0)
50 mov r1, r7 ! 5 MT (latency=0)
57 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN
58 mov r7,r3 ! 5 MT (latency=0) ! OPQR
64 mov r1,r6 ! 5 MT (latency=0)
67 mov r1,r7 ! 5 MT (latency=0)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/opp/
Dqcom-nvmem-cpufreq.txt152 clock-latency-ns = <200000>;
158 clock-latency-ns = <200000>;
164 clock-latency-ns = <200000>;
170 clock-latency-ns = <200000>;
176 clock-latency-ns = <200000>;
182 clock-latency-ns = <200000>;
188 clock-latency-ns = <200000>;
194 clock-latency-ns = <200000>;
200 clock-latency-ns = <200000>;
206 clock-latency-ns = <200000>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Didle-states.yaml39 Idle state parameters (e.g. entry latency) are platform specific and need to
61 | latency |
63 | latency |
65 |<------- wakeup-latency ------->|
73 event conditions. The abort latency is assumed to be negligible
87 entry-latency: Worst case latency required to enter the idle state. The
88 exit-latency may be guaranteed only after entry-latency has passed.
93 wakeup-latency: Maximum delay between the signaling of a wake-up event and the
95 to be entry-latency + exit-latency.
107 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
[all …]
/kernel/linux/linux-5.10/Documentation/power/
Dpm_qos_interface.rst10 * CPU latency QoS.
12 per-device latency constraints and PM QoS flags.
14 The latency unit used in the PM QoS framework is the microsecond (usec).
20 A global list of CPU latency QoS requests is maintained along with an aggregated
22 to the request list or elements of the list. For CPU latency QoS, the
32 Will insert an element into the CPU latency QoS list with the target value.
49 Returns the aggregated value for the CPU latency QoS.
53 CPU latency QoS list.
56 Adds a notification callback function to the CPU latency QoS. The callback is
57 called when the aggregated value for the CPU latency QoS is changed.
[all …]
/kernel/linux/linux-5.10/kernel/
Dlatencytop.c3 * latencytop.c: Latency display infrastructure
10 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is
11 * used by the "latencytop" userspace tool. The latency that is tracked is not
12 * the 'traditional' interrupt latency (which is primarily caused by something
13 * else consuming CPU), but instead, it is the latency an application encounters
17 * 1) System level latency
18 * 2) Per process latency
20 * The latency is stored in fixed sized data structures in an accumulated form;
21 * if the "same" latency cause is hit twice, this will be tracked as one entry
22 * in the data structure. Both the count, total accumulated latency and maximum
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Ddomain-idle-state.yaml30 entry-latency-us:
32 The worst case latency in microseconds required to enter the idle
33 state. Note that, the exit-latency-us duration may be guaranteed only
34 after the entry-latency-us has passed.
36 exit-latency-us:
38 The worst case latency in microseconds required to exit the idle
49 - entry-latency-us
50 - exit-latency-us
61 entry-latency-us = <20>;
62 exit-latency-us = <40>;
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/
Dmemory.json293 …ds when the latency from first dispatch to completion is greater than 4 cycles. Reported latency
302 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
308 …ds when the latency from first dispatch to completion is greater than 8 cycles. Reported latency
317 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
323 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency
332 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
338 …ds when the latency from first dispatch to completion is greater than 32 cycles. Reported latency
347 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
353 …ds when the latency from first dispatch to completion is greater than 64 cycles. Reported latency
362 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/
Dmemory.json42 "PublicDescription": "Loads with latency value being above 4.",
50 "BriefDescription": "Loads with latency value being above 4",
56 "PublicDescription": "Loads with latency value being above 8.",
64 "BriefDescription": "Loads with latency value being above 8",
70 "PublicDescription": "Loads with latency value being above 16.",
78 "BriefDescription": "Loads with latency value being above 16",
84 "PublicDescription": "Loads with latency value being above 32.",
92 "BriefDescription": "Loads with latency value being above 32",
98 "PublicDescription": "Loads with latency value being above 64.",
106 "BriefDescription": "Loads with latency value being above 64",
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dbaikal,bt1-l2-ctl.yaml27 baikal,l2-ws-latency:
29 description: Cycles of latency for Way-select RAM accesses
34 baikal,l2-tag-latency:
36 description: Cycles of latency for Tag RAM accesses
41 baikal,l2-data-latency:
43 description: Cycles of latency for Data RAM accesses
59 baikal,l2-ws-latency = <1>;
60 baikal,l2-tag-latency = <1>;
61 baikal,l2-data-latency = <2>;
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/power8/
Dmetrics.json744 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
750 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
762 …"BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dca…
768 …"BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache…
774 …"BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache…
780 …"BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi",
786 …"BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache…
792 …"BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache…
798 …"BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi…
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-cpu-opp.dtsi12 clock-latency-ns = <244144>; /* 8 32k periods */
18 clock-latency-ns = <244144>; /* 8 32k periods */
24 clock-latency-ns = <244144>; /* 8 32k periods */
30 clock-latency-ns = <244144>; /* 8 32k periods */
36 clock-latency-ns = <244144>; /* 8 32k periods */
42 clock-latency-ns = <244144>; /* 8 32k periods */
48 clock-latency-ns = <244144>; /* 8 32k periods */
54 clock-latency-ns = <244144>; /* 8 32k periods */
60 clock-latency-ns = <244144>; /* 8 32k periods */
Dsun50i-a64-cpu-opp.dtsi14 clock-latency-ns = <244144>; /* 8 32k periods */
20 clock-latency-ns = <244144>; /* 8 32k periods */
26 clock-latency-ns = <244144>; /* 8 32k periods */
32 clock-latency-ns = <244144>; /* 8 32k periods */
38 clock-latency-ns = <244144>; /* 8 32k periods */
44 clock-latency-ns = <244144>; /* 8 32k periods */
50 clock-latency-ns = <244144>; /* 8 32k periods */
56 clock-latency-ns = <244144>; /* 8 32k periods */
Dsun50i-h6-cpu-opp.dtsi12 clock-latency-ns = <244144>; /* 8 32k periods */
21 clock-latency-ns = <244144>; /* 8 32k periods */
30 clock-latency-ns = <244144>; /* 8 32k periods */
39 clock-latency-ns = <244144>; /* 8 32k periods */
48 clock-latency-ns = <244144>; /* 8 32k periods */
57 clock-latency-ns = <244144>; /* 8 32k periods */
66 clock-latency-ns = <244144>; /* 8 32k periods */
75 clock-latency-ns = <244144>; /* 8 32k periods */
84 clock-latency-ns = <244144>; /* 8 32k periods */
93 clock-latency-ns = <244144>; /* 8 32k periods */
/kernel/linux/linux-5.10/arch/x86/kernel/cpu/resctrl/
Dpseudo_lock_event.h11 TP_PROTO(u32 latency),
12 TP_ARGS(latency),
13 TP_STRUCT__entry(__field(u32, latency)),
14 TP_fast_assign(__entry->latency = latency),
15 TP_printk("latency=%u", __entry->latency)
/kernel/linux/linux-5.10/drivers/char/tpm/st33zp24/
Dspi.c45 * Between command and response, there are latency byte (up to 15
51 * some latency byte before the answer is available (max 15).
65 int latency; member
124 memset(&phy->tx_buf[total_length], TPM_DUMMY_BYTE, phy->latency); in st33zp24_spi_send()
126 spi_xfer.len = total_length + phy->latency; in st33zp24_spi_send()
130 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_send()
160 phy->latency + tpm_size); in st33zp24_spi_read8_reg()
162 spi_xfer.len = total_length + phy->latency + tpm_size; in st33zp24_spi_read8_reg()
167 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_read8_reg()
169 memcpy(tpm_data, phy->rx_buf + total_length + phy->latency, in st33zp24_spi_read8_reg()
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/timers/
Dnsleep-lat.c1 /* Measure nanosleep timer latency
101 long long latency = 0; in nanosleep_lat_test() local
114 /* First check relative latency */ in nanosleep_lat_test()
121 printf("Large rel latency: %lld ns :", (timespec_sub(start, end)/count)-ns); in nanosleep_lat_test()
125 /* Next check absolute latency */ in nanosleep_lat_test()
131 latency += timespec_sub(target, end); in nanosleep_lat_test()
134 if (latency/count > UNRESONABLE_LATENCY) { in nanosleep_lat_test()
135 printf("Large abs latency: %lld ns :", latency/count); in nanosleep_lat_test()
157 printf("nsleep latency %-26s ", clockstring(clockid)); in main()
/kernel/linux/linux-5.10/sound/soc/ti/
Domap-mcpdm.c44 int latency[2]; member
283 if (mcpdm->latency[stream2]) in omap_mcpdm_dai_shutdown()
285 mcpdm->latency[stream2]); in omap_mcpdm_dai_shutdown()
286 else if (mcpdm->latency[stream1]) in omap_mcpdm_dai_shutdown()
289 mcpdm->latency[stream1] = 0; in omap_mcpdm_dai_shutdown()
302 int channels, latency; in omap_mcpdm_dai_hw_params() local
346 latency = threshold; in omap_mcpdm_dai_hw_params()
353 latency = (MCPDM_DN_THRES_MAX - threshold); in omap_mcpdm_dai_hw_params()
357 * The DMA must act to a DMA request within latency time (usec) to avoid in omap_mcpdm_dai_hw_params()
360 mcpdm->latency[stream] = latency * USEC_PER_SEC / params_rate(params); in omap_mcpdm_dai_hw_params()
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/power9/
Dmetrics.json62 "BriefDescription": "Stalls due to short latency decimal floating ops.",
128 "BriefDescription": "Stalls due to short latency double precision ops.",
193 …"BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (divisi…
199 "BriefDescription": "Stalls due to short latency integer ops",
560 "BriefDescription": "Vector stalls due to small latency double precision ops",
583 …"BriefDescription": "Completion stall due to a long latency vector fixed point instruction (divisi…
589 "BriefDescription": "Vector stalls due to small latency integer ops",
805 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m…
811 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m…
817 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m…
[all …]
/kernel/linux/linux-5.10/drivers/iio/common/hid-sensors/
Dhid-sensor-trigger.c29 int latency; in _hid_sensor_set_report_latency() local
35 latency = integer * 1000 + fract / 1000; in _hid_sensor_set_report_latency()
36 ret = hid_sensor_set_report_latency(attrb, latency); in _hid_sensor_set_report_latency()
51 int latency; in _hid_sensor_get_report_latency() local
53 latency = hid_sensor_get_report_latency(attrb); in _hid_sensor_get_report_latency()
54 if (latency < 0) in _hid_sensor_get_report_latency()
55 return latency; in _hid_sensor_get_report_latency()
57 return sprintf(buf, "%d.%06u\n", latency / 1000, (latency % 1000) * 1000); in _hid_sensor_get_report_latency()
66 int latency; in _hid_sensor_get_fifo_state() local
68 latency = hid_sensor_get_report_latency(attrb); in _hid_sensor_get_fifo_state()
[all …]
/kernel/linux/linux-5.10/Documentation/arm/omap/
Domap_pm.rst6 authors use these functions to communicate minimum latency or
17 latency framework or something else;
20 latency and throughput, rather than units which are specific to OMAP
34 1. Set the maximum MPU wakeup latency::
38 2. Set the maximum device wakeup latency::
42 3. Set the maximum system DMA transfer start latency (CORE pwrdm)::
88 latency, and the set_max_dev_wakeup_lat() function to constrain the
89 device wakeup latency (from clk_enable() to accessibility). For
92 /* Limit MPU wakeup latency */
96 /* Limit device powerdomain wakeup latency */
[all …]
/kernel/linux/linux-5.10/drivers/cpuidle/
Dcpuidle-pseries.c99 * CEDE_LATENCY_TOKEN corresponds to the token value for Cede Latency
105 * If the platform supports the cede latency settings information system
109 * a. The first byte is the length “N” of each cede latency setting record minus
112 * b. For each supported cede latency setting a cede latency setting record
119 * | Cede Latency | 1 Byte |
123 * | latency in | 8 Bytes |
131 * This version has cede latency record size = 10.
207 pr_info("xcede: Record %d : hint = %u, latency = 0x%llx tb ticks, Wake-on-irq = %u\n", in parse_cede_parameters()
352 min_latency_us = dedicated_states[1].exit_latency; // CEDE latency in fixup_cede0_latency()
367 pr_warn("cpuidle: xcede record %d has an unrealistic latency of 0us.\n", i); in fixup_cede0_latency()
[all …]
/kernel/linux/linux-5.10/tools/power/cpupower/man/
Dcpupower-idle-set.122 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
23 Disable all idle states with a equal or higher latency than <LATENCY>.
25 Enable all idle states with a latency lower than <LATENCY>.

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