| /kernel/linux/linux-5.10/drivers/edac/ |
| D | pasemi_edac.c | 183 struct edac_mc_layer layers[2]; in pasemi_edac_probe() local
200 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in pasemi_edac_probe()
201 layers[0].size = PASEMI_EDAC_NR_CSROWS; in pasemi_edac_probe()
202 layers[0].is_virt_csrow = true; in pasemi_edac_probe()
203 layers[1].type = EDAC_MC_LAYER_CHANNEL; in pasemi_edac_probe()
204 layers[1].size = PASEMI_EDAC_NR_CHANS; in pasemi_edac_probe()
205 layers[1].is_virt_csrow = false; in pasemi_edac_probe()
206 mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, in pasemi_edac_probe()
|
| D | highbank_mc_edac.c | 148 struct edac_mc_layer layers[2]; in highbank_mc_probe() local
162 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in highbank_mc_probe()
163 layers[0].size = 1; in highbank_mc_probe()
164 layers[0].is_virt_csrow = true; in highbank_mc_probe()
165 layers[1].type = EDAC_MC_LAYER_CHANNEL; in highbank_mc_probe()
166 layers[1].size = 1; in highbank_mc_probe()
167 layers[1].is_virt_csrow = false; in highbank_mc_probe()
168 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, in highbank_mc_probe()
|
| D | cell_edac.c | 172 struct edac_mc_layer layers[2]; in cell_edac_probe() local
202 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in cell_edac_probe()
203 layers[0].size = 1; in cell_edac_probe()
204 layers[0].is_virt_csrow = true; in cell_edac_probe()
205 layers[1].type = EDAC_MC_LAYER_CHANNEL; in cell_edac_probe()
206 layers[1].size = num_chans; in cell_edac_probe()
207 layers[1].is_virt_csrow = false; in cell_edac_probe()
208 mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, in cell_edac_probe()
|
| D | amd76x_edac.c | 238 struct edac_mc_layer layers[2]; in amd76x_probe1() local
247 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in amd76x_probe1()
248 layers[0].size = AMD76X_NR_CSROWS; in amd76x_probe1()
249 layers[0].is_virt_csrow = true; in amd76x_probe1()
250 layers[1].type = EDAC_MC_LAYER_CHANNEL; in amd76x_probe1()
251 layers[1].size = 1; in amd76x_probe1()
252 layers[1].is_virt_csrow = false; in amd76x_probe1()
253 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in amd76x_probe1()
|
| D | aspeed_edac.c | 282 struct edac_mc_layer layers[2]; in aspeed_probe() local
307 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in aspeed_probe()
308 layers[0].size = 1; in aspeed_probe()
309 layers[0].is_virt_csrow = true; in aspeed_probe()
310 layers[1].type = EDAC_MC_LAYER_CHANNEL; in aspeed_probe()
311 layers[1].size = 1; in aspeed_probe()
312 layers[1].is_virt_csrow = false; in aspeed_probe()
314 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in aspeed_probe()
|
| D | i82860_edac.c | 188 struct edac_mc_layer layers[2]; in i82860_probe1() local
201 layers[0].type = EDAC_MC_LAYER_CHANNEL; in i82860_probe1()
202 layers[0].size = 2; in i82860_probe1()
203 layers[0].is_virt_csrow = true; in i82860_probe1()
204 layers[1].type = EDAC_MC_LAYER_SLOT; in i82860_probe1()
205 layers[1].size = 8; in i82860_probe1()
206 layers[1].is_virt_csrow = true; in i82860_probe1()
207 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in i82860_probe1()
|
| D | octeon_edac-lmc.c | 228 struct edac_mc_layer layers[1]; in octeon_lmc_edac_probe() local
233 layers[0].type = EDAC_MC_LAYER_CHANNEL; in octeon_lmc_edac_probe()
234 layers[0].size = 1; in octeon_lmc_edac_probe()
235 layers[0].is_virt_csrow = false; in octeon_lmc_edac_probe()
246 mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, sizeof(struct octeon_lmc_pvt)); in octeon_lmc_edac_probe()
278 mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, sizeof(struct octeon_lmc_pvt)); in octeon_lmc_edac_probe()
|
| D | r82600_edac.c | 272 struct edac_mc_layer layers[2]; in r82600_probe1() local
286 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in r82600_probe1()
287 layers[0].size = R82600_NR_CSROWS; in r82600_probe1()
288 layers[0].is_virt_csrow = true; in r82600_probe1()
289 layers[1].type = EDAC_MC_LAYER_CHANNEL; in r82600_probe1()
290 layers[1].size = R82600_NR_CHANS; in r82600_probe1()
291 layers[1].is_virt_csrow = false; in r82600_probe1()
292 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in r82600_probe1()
|
| D | i82443bxgx_edac.c | 235 struct edac_mc_layer layers[2]; in i82443bxgx_edacmc_probe1() local
249 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in i82443bxgx_edacmc_probe1()
250 layers[0].size = I82443BXGX_NR_CSROWS; in i82443bxgx_edacmc_probe1()
251 layers[0].is_virt_csrow = true; in i82443bxgx_edacmc_probe1()
252 layers[1].type = EDAC_MC_LAYER_CHANNEL; in i82443bxgx_edacmc_probe1()
253 layers[1].size = I82443BXGX_NR_CHANS; in i82443bxgx_edacmc_probe1()
254 layers[1].is_virt_csrow = false; in i82443bxgx_edacmc_probe1()
255 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in i82443bxgx_edacmc_probe1()
|
| D | i3200_edac.c | 341 struct edac_mc_layer layers[2]; in i3200_probe1() local
356 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in i3200_probe1()
357 layers[0].size = I3200_DIMMS; in i3200_probe1()
358 layers[0].is_virt_csrow = true; in i3200_probe1()
359 layers[1].type = EDAC_MC_LAYER_CHANNEL; in i3200_probe1()
360 layers[1].size = nr_channels; in i3200_probe1()
361 layers[1].is_virt_csrow = false; in i3200_probe1()
362 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, in i3200_probe1()
|
| D | x38_edac.c | 323 struct edac_mc_layer layers[2]; in x38_probe1() local
339 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in x38_probe1()
340 layers[0].size = X38_RANKS; in x38_probe1()
341 layers[0].is_virt_csrow = true; in x38_probe1()
342 layers[1].type = EDAC_MC_LAYER_CHANNEL; in x38_probe1()
343 layers[1].size = x38_channel_num; in x38_probe1()
344 layers[1].is_virt_csrow = false; in x38_probe1()
345 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in x38_probe1()
|
| D | i3000_edac.c | 314 struct edac_mc_layer layers[2]; in i3000_probe1() local
357 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in i3000_probe1()
358 layers[0].size = I3000_RANKS / nr_channels; in i3000_probe1()
359 layers[0].is_virt_csrow = true; in i3000_probe1()
360 layers[1].type = EDAC_MC_LAYER_CHANNEL; in i3000_probe1()
361 layers[1].size = nr_channels; in i3000_probe1()
362 layers[1].is_virt_csrow = false; in i3000_probe1()
363 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); in i3000_probe1()
|
| D | bluefield_edac.c | 246 struct edac_mc_layer layers[1]; in bluefield_edac_mc_probe() local
273 layers[0].type = EDAC_MC_LAYER_SLOT; in bluefield_edac_mc_probe()
274 layers[0].size = dimm_count; in bluefield_edac_mc_probe()
275 layers[0].is_virt_csrow = true; in bluefield_edac_mc_probe()
277 mci = edac_mc_alloc(mc_idx, ARRAY_SIZE(layers), layers, sizeof(*priv)); in bluefield_edac_mc_probe()
|
| D | i82875p_edac.c | 392 struct edac_mc_layer layers[2]; in i82875p_probe1() local
407 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; in i82875p_probe1()
408 layers[0].size = I82875P_NR_CSROWS(nr_chans); in i82875p_probe1()
409 layers[0].is_virt_csrow = true; in i82875p_probe1()
410 layers[1].type = EDAC_MC_LAYER_CHANNEL; in i82875p_probe1()
411 layers[1].size = nr_chans; in i82875p_probe1()
412 layers[1].is_virt_csrow = false; in i82875p_probe1()
413 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); in i82875p_probe1()
|
| D | edac_mc.c | 70 edac_layer_name[mci->layers[i].type], in edac_dimm_info_location()
344 edac_layer_name[mci->layers[layer].type], in edac_mc_alloc_dimms()
360 if (mci->layers[0].is_virt_csrow) { in edac_mc_alloc_dimms()
377 if (pos[layer] < mci->layers[layer].size) in edac_mc_alloc_dimms()
388 struct edac_mc_layer *layers, in edac_mc_alloc() argument
406 tot_dimms *= layers[idx].size; in edac_mc_alloc()
408 if (layers[idx].is_virt_csrow) in edac_mc_alloc()
409 tot_csrows *= layers[idx].size; in edac_mc_alloc()
411 tot_channels *= layers[idx].size; in edac_mc_alloc()
413 if (layers[idx].type == EDAC_MC_LAYER_CHIP_SELECT) in edac_mc_alloc()
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | tc90522.c | 201 int layers; in tc90522s_get_frontend() local
209 layers = 0; in tc90522s_get_frontend()
236 layers = (v > 0) ? 2 : 1; in tc90522s_get_frontend()
284 stats->len = layers; in tc90522s_get_frontend()
287 for (i = 0; i < layers; i++) in tc90522s_get_frontend()
290 for (i = 0; i < layers; i++) { in tc90522s_get_frontend()
298 stats->len = layers; in tc90522s_get_frontend()
300 for (i = 0; i < layers; i++) in tc90522s_get_frontend()
303 for (i = 0; i < layers; i++) { in tc90522s_get_frontend()
336 int layers; in tc90522t_get_frontend() local
[all …]
|
| /kernel/linux/linux-5.10/Documentation/block/ |
| D | inline-encryption.rst | 44 - We need a way for upper layers like filesystems to specify an encryption
49 capabilities in a unified way to the upper layers.
57 encryption context from the upper layers (like the fs layer) to the
67 upper layers. The generic mode of operation is: each device driver that wants
69 Upper layers that want to use IE on this device can then use this KSM in
93 We introduce ``block/blk-crypto-fallback.c``, which allows upper layers to remain
149 ``blk_crypto_init_key`` allows upper layers to initialize such a
158 ``blk_crypto_config_supported`` allows upper layers to query whether or not the
166 ``blk_crypto_start_using_key`` - Upper layers must call this function on
174 ``blk_crypto_evict_key`` *must* be called by upper layers before a
|
| /kernel/linux/linux-5.10/Documentation/scsi/ |
| D | scsi_eh.rst | 151 Note that this does not mean lower layers are quiescent. If a LLDD
152 completed a scmd with error status, the LLDD and lower layers are
154 has timed out, unless hostt->eh_timed_out() made lower layers forget
156 active as long as lower layers are concerned and completion could
205 lower layers and lower layers are ready to process or fail the scmd
388 that lower layers have forgotten about the scmd and we can
397 and STU doesn't make lower layers forget about those
399 if STU succeeds leaving lower layers in an inconsistent
452 On completion, the handler should have made lower layers forget about
495 - Know that timed out scmds are still active on lower layers. Make
[all …]
|
| D | ufs.rst | 56 UFS communication architecture consists of following layers,
77 layers. Device level configurations involve handling of query
85 the higher layers through Service Access Points. UTP defines 3
86 service access points for higher layers.
107 * UIO_SAP: To issue commands to Unipro layers.
|
| /kernel/linux/linux-5.10/Documentation/driver-api/fpga/ |
| D | intro.rst | 9 * The FPGA subsystem separates upper layers (userspace interfaces and
10 enumeration) from lower layers that know how to program a specific
13 * Code should not be shared between upper and lower layers. This
|
| /kernel/linux/linux-5.10/fs/overlayfs/ |
| D | super.c | 232 /* Hack! Reuse ofs->layers as a vfsmount array before freeing it */ in ovl_free_fs()
233 mounts = (struct vfsmount **) ofs->layers; in ovl_free_fs()
235 iput(ofs->layers[i].trap); in ovl_free_fs()
236 mounts[i] = ofs->layers[i].mnt; in ovl_free_fs()
239 kfree(ofs->layers); in ovl_free_fs()
894 * file handles, so they require that all layers support them. in ovl_lower_dir()
1127 pr_err("upper fs is r/o, try multi-lower layers mount\n"); in ovl_get_upper()
1528 * as all lower layers with null uuid are on the same fs. in ovl_lower_uuid_ok()
1582 struct ovl_layer *layers) in ovl_get_layers() argument
1596 * All lower layers that share the same fs as upper layer, use the same in ovl_get_layers()
[all …]
|
| /kernel/linux/linux-5.10/include/net/caif/ |
| D | caif_layer.h | 129 * It defines CAIF layering structure, used by all CAIF Layers and the
130 * layers interfacing CAIF.
136 * Principles for layering of protocol layers:
137 * - All layers must use this structure. If embedding it, then place this
169 * - If parsing succeeds (and above layers return OK) then
253 * logical CAIF connection. Used by service layers to
|
| /kernel/linux/linux-5.10/drivers/staging/most/Documentation/ |
| D | driver_usage.txt | 8 MOST defines the protocol, hardware and software layers necessary to allow
19 consumer devices via optical or electrical physical layers directly to one
27 three layers. From bottom up these layers are: the adapter layer, the core
31 routing through all three layers, the configuration of the driver, the
35 For each of the other two layers a set of modules is provided. Those can be
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/atmel-hlcdc/ |
| D | atmel_hlcdc_dc.h | 135 * can be placed differently on 2 different layers depending on its
307 * @layers: a layer description table describing available layers
320 const struct atmel_hlcdc_layer_desc *layers; member
333 * @layers: active HLCDC layers
343 struct atmel_hlcdc_layer *layers[ATMEL_HLCDC_MAX_LAYERS]; member
|
| /kernel/linux/linux-5.10/Documentation/filesystems/ |
| D | overlayfs.rst | 32 In the special case of all overlay layers on the same underlying
39 On 64bit systems, even if all overlay layers are not on the same
66 | All layers | Y | Y | Y | Y | Y | Y | Y | Y |
69 | Layers not | N | Y | Y | N | N | Y | N | Y |
309 Check (b) ensures that no task gains permissions to underlying layers that
328 Multiple lower layers
331 Multiple lower layers can now be given using the colon (":") as a
366 for untrusted layers like from a pen drive.
374 Sharing and copying layers
377 Lower layers may be shared among several overlay mounts and that is indeed
[all …]
|