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/kernel/linux/linux-5.10/drivers/gpu/drm/panel/
Dpanel-lvds.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic LVDS panel driver
26 struct drm_panel panel; member
44 static inline struct panel_lvds *to_panel_lvds(struct drm_panel *panel) in to_panel_lvds() argument
46 return container_of(panel, struct panel_lvds, panel); in to_panel_lvds()
49 static int panel_lvds_unprepare(struct drm_panel *panel) in panel_lvds_unprepare() argument
51 struct panel_lvds *lvds = to_panel_lvds(panel); in panel_lvds_unprepare() local
53 if (lvds->enable_gpio) in panel_lvds_unprepare()
54 gpiod_set_value_cansleep(lvds->enable_gpio, 0); in panel_lvds_unprepare()
56 if (lvds->supply) in panel_lvds_unprepare()
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/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_lvds.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
25 struct drm_panel *panel; member
44 struct sun4i_lvds *lvds = in sun4i_lvds_get_modes() local
47 return drm_panel_get_modes(lvds->panel, connector); in sun4i_lvds_get_modes()
70 struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); in sun4i_lvds_encoder_enable() local
72 DRM_DEBUG_DRIVER("Enabling LVDS output\n"); in sun4i_lvds_encoder_enable()
74 if (lvds->panel) { in sun4i_lvds_encoder_enable()
75 drm_panel_prepare(lvds->panel); in sun4i_lvds_encoder_enable()
76 drm_panel_enable(lvds->panel); in sun4i_lvds_encoder_enable()
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/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
Drockchip_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Mark Yao <mark.yao@rock-chips.com>
6 * Sandy Huang <hjc@rock-chips.com>
45 * rockchip_lvds_soc_data - rockchip lvds Soc private data
46 * @probe: LVDS platform probe function
47 * @helper_funcs: LVDS connector helper functions
50 int (*probe)(struct platform_device *pdev, struct rockchip_lvds *lvds);
61 int output; /* rgb lvds or dual lvds output */
64 struct drm_panel *panel; member
71 static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, in rk3288_writel() argument
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/panel/
Dadvantech,idk-2121wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
18 The panel expects odd pixels on the first port, and even pixels on the
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Dlvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LVDS Display Panel
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
16 to LVDS panels. This bindings supports display panels compatible with the
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
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Dsgd,gktw70sdae4se.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/sgd,gktw70sdae4se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel
10 - Neil Armstrong <narmstrong@baylibre.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: lvds.yaml#
19 - const: sgd,gktw70sdae4se
20 - {} # panel-lvds, but not listed here to avoid false select
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Dmitsubishi,aa104xd12.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/mitsubishi,aa104xd12.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mitsubishi AA104XD12 10.4" XGA LVDS Display Panel
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: lvds.yaml#
19 - const: mitsubishi,aa104xd12
20 - {} # panel-lvds, but not listed here to avoid false select
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Dmitsubishi,aa121td01.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/mitsubishi,aa121td01.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mitsubishi AA121TD01 12.1" WXGA LVDS Display Panel
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: lvds.yaml#
19 - const: mitsubishi,aa121td01
20 - {} # panel-lvds, but not listed here to avoid false select
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Dadvantech,idk-1110wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-1110wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-1110WR 10.1" WSVGA LVDS Display Panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: lvds.yaml#
19 - const: advantech,idk-1110wr
20 - {} # panel-lvds, but not listed here to avoid false select
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Dpanel-simple.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Sam Ravnborg <sam@ravnborg.org>
15 requires only a single power-supply.
17 The panel may use an OF graph binding for the association to the display,
20 If the panel is more advanced a dedicated binding file is required.
23 - $ref: panel-common.yaml#
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Dinnolux,ee101ia-01d.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/innolux,ee101ia-01d.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel
10 - Heiko Stuebner <heiko.stuebner@bq.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: lvds.yaml#
19 - const: innolux,ee101ia-01d
20 - {} # panel-lvds, but not listed here to avoid false select
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
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/kernel/linux/linux-5.10/drivers/gpu/drm/
Ddrm_of.c1 // SPDX-License-Identifier: GPL-2.0-only
27 * drm_of_crtc_port_mask - find the mask of a registered CRTC by port OF node
41 if (tmp->port == port) in drm_of_crtc_port_mask()
52 * drm_of_find_possible_crtcs - find the possible CRTCs for an encoder port
85 * drm_of_component_match_add - Add a component helper OF node match rule
103 * drm_of_component_probe - Generic probe function for a component based master
123 if (!dev->of_node) in drm_of_component_probe()
124 return -EINVAL; in drm_of_component_probe()
131 port = of_parse_phandle(dev->of_node, "ports", i); in drm_of_component_probe()
135 if (of_device_is_available(port->parent)) in drm_of_component_probe()
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/kernel/linux/linux-5.10/drivers/gpu/drm/rcar-du/
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * rcar_lvds.c -- R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
47 #define RCAR_LVDS_QUIRK_LANES BIT(0) /* LVDS lanes 1 and 3 inverted */
51 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
56 void (*pll_setup)(struct rcar_lvds *lvds, unsigned int freq);
67 struct drm_panel *panel; member
86 static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data) in rcar_lvds_write() argument
88 iowrite32(data, lvds->mmio + reg); in rcar_lvds_write()
91 /* -----------------------------------------------------------------------------
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a774c0-ek874-idk-2121wr.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
9 #include "r8a774c0-ek874.dts"
13 compatible = "pwm-backlight";
16 brightness-levels = <0 4 8 16 32 64 128 255>;
17 default-brightness-level = <6>;
19 power-supply = <&reg_12p0v>;
20 enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
23 panel-lvds {
24 compatible = "advantech,idk-2121wr", "panel-lvds";
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Drzg2-advantech-idk-1110wr-panel.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Advantech idk-1110wr LVDS panel connected
10 panel-lvds {
11 compatible = "advantech,idk-1110wr", "panel-lvds";
13 width-mm = <223>;
14 height-mm = <125>;
16 data-mapping = "jeida-24";
18 panel-timing {
20 clock-frequency = <51200000>;
23 hsync-len = <240>;
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358775 DSI to LVDS bridge bindings
10 - Vinay Simha BN <simhavcs@gmail.com>
13 This binding supports DSI to LVDS bridge TC358775
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
18 limited by 135 MHz LVDS speed
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_lvds.c2 * Copyright © 2006-2007 Intel Corporation
49 /* Private structure for the integrated LVDS support */
101 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_get_hw_state()
102 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); in intel_lvds_get_hw_state()
107 encoder->power_domain); in intel_lvds_get_hw_state()
111 ret = intel_lvds_port_enabled(dev_priv, lvds_encoder->reg, pipe); in intel_lvds_get_hw_state()
113 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_lvds_get_hw_state()
121 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_get_config()
122 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); in intel_lvds_get_config()
125 pipe_config->output_types |= BIT(INTEL_OUTPUT_LVDS); in intel_lvds_get_config()
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/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
Dcdv_intel_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
25 * LVDS I2C backlight control macros
60 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_intel_lvds_get_max_backlight()
70 retval = ((dev_priv->regs.saveBLC_PWM_CTL & in cdv_intel_lvds_get_max_backlight()
84 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_intel_lvds_set_backlight()
95 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL & in cdv_intel_lvds_set_backlight()
97 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | in cdv_intel_lvds_set_backlight()
103 * Sets the power state for the panel.
108 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_intel_lvds_set_power()
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Doaktrail.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2007-2011, Intel Corporation.
70 u32 Panel_Port_Control; /* 1 dword, Register 0x61180 if LVDS */
78 /* Bit 0, Frequency, 15 bits,0 - 32767Hz */
82 /* if MIPI, 0x0000 if LVDS */
84 /* 0: Type-1, */
85 /* 1: Type-2, */
86 /* 2: Type-3, */
87 /* 3: Type-4 */
94 /* Bit 8, Minimum Supported Frame Rate, 6 bits, 0 - 63Hz */
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Dpsb_intel_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2007 Intel Corporation
23 * LVDS I2C backlight control macros
62 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_lvds_get_max_backlight()
69 ret = dev_priv->regs.saveBLC_PWM_CTL; in psb_intel_lvds_get_max_backlight()
77 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n", in psb_intel_lvds_get_max_backlight()
78 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
83 * Set LVDS backlight level by I2C command
92 (struct drm_psb_private *)dev->dev_private; in psb_lvds_i2c_set_brightness()
94 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus; in psb_lvds_i2c_set_brightness()
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Doaktrail_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2009 Intel Corporation
14 #include <asm/intel-mid.h>
24 /* The max/min PWM frequency in BPCR[31:17] - */
26 * 15-bit field of the and then*/
27 /* shifts to the left by one bit to get the actual 16-bit
28 * value that the 15-bits correspond to.*/
33 * Sets the power state for the panel.
40 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_lvds_set_power()
51 dev_priv->is_lvds_on = true; in oaktrail_lvds_set_power()
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/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dlvds-codec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 return drm_bridge_attach(bridge->encoder, lvds_codec->panel_bridge, in lvds_codec_attach()
46 ret = regulator_enable(lvds_codec->vcc); in lvds_codec_enable()
48 dev_err(lvds_codec->dev, in lvds_codec_enable()
53 if (lvds_codec->powerdown_gpio) in lvds_codec_enable()
54 gpiod_set_value_cansleep(lvds_codec->powerdown_gpio, 0); in lvds_codec_enable()
62 if (lvds_codec->powerdown_gpio) in lvds_codec_disable()
63 gpiod_set_value_cansleep(lvds_codec->powerdown_gpio, 1); in lvds_codec_disable()
65 ret = regulator_disable(lvds_codec->vcc); in lvds_codec_disable()
67 dev_err(lvds_codec->dev, in lvds_codec_disable()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
5 - compatible: matching the soc type, one of
6 - "rockchip,rk3288-lvds";
7 - "rockchip,px30-lvds";
9 - reg: physical base address of the controller and length
11 - clocks: must include clock specifiers corresponding to entries in the
12 clock-names property.
13 - clock-names: must contain "pclk_lvds"
15 - avdd1v0-supply: regulator phandle for 1.0V analog power
16 - avdd1v8-supply: regulator phandle for 1.8V analog power
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/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Drgb.c1 // SPDX-License-Identifier: GPL-2.0-only
93 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); in tegra_rgb_encoder_disable()
94 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_disable()
103 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable)); in tegra_rgb_encoder_enable()
106 tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS); in tegra_rgb_encoder_enable()
109 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
112 tegra_dc_writel(rgb->dc, value, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
117 tegra_dc_writel(rgb->dc, value, DC_DISP_DISP_INTERFACE_CONTROL); in tegra_rgb_encoder_enable()
121 tegra_dc_writel(rgb->dc, value, DC_DISP_SHIFT_CLOCK_OPTIONS); in tegra_rgb_encoder_enable()
123 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_enable()
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