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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Dmipi-dsi-bus.txt5 communication between a host and up to four peripherals. This document will
13 peripherals on that bus.
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
42 Peripherals with DSI as control bus, or no control bus
45 Peripherals with the DSI bus as the primary control bus, or peripherals with
48 DSI peripherals, but individual bindings may want to define additional,
55 Some DSI peripherals respond to more than a single virtual channel. In that
64 Peripherals with a different control bus
67 There are peripherals that have I2C/SPI (or some other non-DSI bus) as the
69 path). Connections between such peripherals and a DSI host can be represented
[all …]
/kernel/linux/linux-5.10/drivers/usb/
DKconfig53 traditional PC serial port. The bus supplies power to peripherals
54 and allows for hot swapping. Up to 127 USB peripherals can be
57 The USB host is the root of the tree, the peripherals are the
59 Most PCs now have USB host ports, used to connect peripherals
74 After choosing your HCD, then select drivers for the USB peripherals
139 port and provide USB compatibility to peripherals designed with
/kernel/linux/linux-5.10/drivers/clk/meson/
DKconfig58 want peripherals and CPU frequency scaling to work.
74 Say Y if you want peripherals and CPU frequency scaling to work.
89 Say Y if you want peripherals and CPU frequency scaling to work.
117 devices, aka g12a. Say Y if you want peripherals to work.
/kernel/linux/linux-5.10/drivers/usb/core/
DKconfig73 bool "Rely on OTG and EH Targeted Peripherals List"
77 product list, so USB peripherals not listed there will be
80 "Targeted Peripherals List". "Embedded Hosts" are likewise
81 allowed to support only a limited number of peripherals.
/kernel/linux/linux-5.10/arch/arm/mach-u300/
Dcore.c35 /* AHB Peripherals */
38 /* FAST Peripherals */
41 /* SLOW Peripherals */
51 * AHB peripherals
54 /* AHB Peripherals Bridge Controller */
68 * FAST peripherals
89 * SLOW peripherals
120 * REST peripherals
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Dbaikal,bt1-axi.yaml18 another: from CPU to SoC peripherals and between some SoC peripherals
20 some peripherals). In case of any protocol error, device not responding
Dts-nbus.txt3 The NBUS is a bus used to interface with peripherals in the Technologic
20 The NBUS node can contain zero or more child nodes representing peripherals
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dbast.h51 /* irq numbers to onboard peripherals */
68 * peripherals that live in the nGCS[x] areas, which are quite numerous
173 /* physical offset addresses for the peripherals */
185 /* some configurations for the peripherals */
Dotom.h11 * peripherals that live in the nGCS[x] areas, which are quite numerous
21 /* physical offset addresses for the peripherals */
Dvr1000.h16 /* irq numbers to onboard peripherals */
95 /* physical offset addresses for the peripherals */
109 /* some configurations for the peripherals */
/kernel/linux/linux-5.10/include/dt-bindings/pinctrl/
Drzn1-pinctrl.h101 /* These are MDIO0 peripherals for the RZN1_FUNC_ETH_MDIO function */
110 /* These are MDIO0 peripherals for the RZN1_FUNC_ETH_MDIO_E1 function */
120 /* These are MDIO1 peripherals for the RZN1_FUNC_ETH_MDIO function */
129 /* These are MDIO1 peripherals for the RZN1_FUNC_ETH_MDIO_E1 function */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/
Dge-achc.txt3 A device which handles data aquisition from compatible USB based peripherals.
6 Note: This device does not expose the peripherals as USB devices.
/kernel/linux/linux-5.10/sound/pci/ice1712/
Damp.h8 * Lowlevel functions for Advanced Micro Peripherals Ltd AUDIO2000
17 #define VT1724_SUBDEVICE_AUDIO2000 0x12142417 /* Advanced Micro Peripherals Ltd AUDIO2000 */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dbrcm,bcm2835-aux-clock.txt6 The auxiliary peripherals (UART, SPI1, and SPI2) have a small register
7 area controlling clock gating to the peripherals, and providing an IRQ
Dqcom,spmi-clkdiv.txt19 Definition: base address of CLKDIV peripherals.
24 Definition: number of CLKDIV peripherals.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Dprimecell.yaml7 title: ARM Primecell Peripherals
13 ARM, Ltd. Primecell peripherals have a standard id register that can be used to
/kernel/linux/linux-5.10/Documentation/devicetree/
Doverlay-notes.rst33 /* On chip peripherals */
35 /* peripherals that are always instantiated */
67 /* On chip peripherals */
69 /* peripherals that are always instantiated */
/kernel/linux/linux-5.10/arch/arm/include/debug/
Dat91.S14 ldr \rp, =CONFIG_DEBUG_UART_PHYS @ System peripherals (phys address)
15 ldr \rv, =CONFIG_DEBUG_UART_VIRT @ System peripherals (virt address)
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmarvell,pxa1928.h9 /* apb peripherals */
42 /* axi peripherals */
/kernel/linux/linux-5.10/drivers/pnp/
DKconfig11 Plug and Play (PnP) is a standard for peripherals which allows those
12 peripherals to be configured by software, e.g. assign IRQ's or other
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-temp-alarm.txt3 QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
4 that utilize the Qualcomm SPMI implementation. These peripherals provide an
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dhi3798cv200-perictrl.yaml13 The Hi3798CV200 Peripheral Controller controls peripherals, queries
14 their status, and configures some functions of peripherals.
/kernel/linux/linux-5.10/Documentation/arm/samsung-s3c24xx/
Dsmdk2440.rst33 Peripherals chapter
36 There is no current support for any of the extra peripherals on the
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/x86/
Dce4100.txt4 The CE4100 SoC uses for in core peripherals the following compatible
44 This node describes the in-core peripherals. Required property:
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dio_no.h40 * The ColdFire SoC internal peripherals are mapped into virtual address
59 * We need to treat built-in peripherals and bus based address ranges
60 * differently. Local built-in peripherals (and the ColdFire SoC parts

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